Micron technology, inc. (20240160527). APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES simplified abstract
Contents
- 1 APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES
Organization Name
Inventor(s)
Sujeet Ayyapureddi of Boise ID (US)
Scott E. Smith of Boise ID (US)
APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240160527 titled 'APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES
Simplified Explanation
The patent application describes apparatuses, systems, and methods for an enhanced ECC mode in a memory device. In this mode, data is stored in a subset of data column planes, while corresponding parity data is stored in a different column plane. This allows for single error correction or single error correction with double error detection (SECDED) depending on the selected mode.
- Memory array includes data column planes and an extra column plane
- Enhanced ECC mode stores data in a subset of data column planes
- Error correction code circuit stores corresponding parity data in a different column plane
- Enables single error correction or SECDED depending on mode selected
Potential Applications
This technology could be applied in:
- Data storage devices
- Computer memory systems
- Communication systems
Problems Solved
This technology addresses issues such as:
- Data corruption in memory devices
- Error detection and correction in data storage
- Improving data reliability in memory systems
Benefits
The benefits of this technology include:
- Enhanced error correction capabilities
- Improved data integrity
- Increased reliability of memory systems
Potential Commercial Applications
This technology could be commercially benefit:
- Memory device manufacturers
- Data center operators
- Communication equipment providers
Possible Prior Art
One possible prior art for this technology could be:
- Existing ECC modes in memory devices
- Error correction techniques in data storage systems
What are the specific technical details of the enhanced ECC mode described in the patent application?
The specific technical details of the enhanced ECC mode include:
- Storing data in a subset of data column planes
- Storing corresponding parity data in a different column plane
- Capable of performing single error correction or SECDED
- Mode selection for error correction capabilities
How does the enhanced ECC mode improve data reliability in memory systems?
The enhanced ECC mode improves data reliability in memory systems by:
- Allowing for error correction and detection capabilities
- Storing parity data separately from the data
- Providing options for single error correction or SECDED
- Enhancing overall data integrity in memory devices
Original Abstract Submitted
apparatuses, systems, and methods for an enhanced ecc mode. the memory array includes a number of data column planes and an extra column plane. when the memory device is set in an enhanced ecc mode, data is stored in a subset of the data column planes, and an error correction code circuit (ecc) stores corresponding parity data in one of a column plane other than one of the subset of data column planes or the extra column plane. in this manner, memory may be capable of performing single error correction or single error correction with double error detection (secded) depending on the mode selected.
