Micron Technology, Inc. patent applications published on September 26th, 2024

Summary of the patent applications from Micron Technology, Inc. on September 26th, 2024

1. **Summary**: Micron Technology, Inc. has recently filed patents for innovative technologies in memory devices, image compression, and symbol decoding reliability in high-frequency bus systems. These patents focus on improving performance, efficiency, and reliability in various electronic applications.

2. **Key Points of Patents**:

  * Integrated assembly with semiconductor pillars, source/drain regions, bottom electrodes, leaker-device-structures, top-electrode-material, and ferroelectric-insulative-material.
  * Method for compressing images using image processing and inference logic circuits.
  * Equalization with PAM signaling for enhanced symbol decoding reliability in high-frequency bus systems.

3. **Notable Applications**:

  * Memory devices, semiconductor technology, and electronics manufacturing.
  * Image compression in cameras, smartphones, and computers.
  * High-speed data communication systems, networking equipment, and telecommunications devices.

These patents offer advancements in memory device technology, image processing, and data communication systems, with potential applications in various sectors such as consumer electronics, telecommunications, and high-speed data transmission.

Patent applications for Micron Technology, Inc. on September 26th, 2024

MANAGING WRITE COMMAND EXECUTION DURING A POWER FAILURE IN A MEMORY SUB-SYSTEM (18606794)

Main Inventor

Raja V.S. Halaharivi

TUNED DATAPATH IN STACKED MEMORY DEVICE (18736247)

Main Inventor

Hari Giduturi

COMPUTE EXPRESS LINK DRAM + NAND SYSTEM SOLUTION (18598712)

Main Inventor

Rohit SEHGAL

ADAPTIVE TIME SENSE PARAMETERS AND OVERDRIVE VOLTAGE PARAMETERS FOR RESPECTIVE GROUPS OF WORDLINES IN A MEMORY SUB-SYSTEM (18662940)

Main Inventor

Zhenming Zhou

TWO-STAGE BUFFER OPERATIONS SUPPORTING WRITE COMMANDS (18620773)

Main Inventor

Hua Tan

MODIFICATION OF PROGRAM VOLTAGE LEVEL WITH READ OR PROGRAM-VERIFY ADJUSTMENT FOR IMPROVING RELIABILITY IN MEMORY DEVICES (18421893)

Main Inventor

Peng Zhang

HOST INTERFACE FOR COMPUTE EXPRESS LINK DRAM + NAND SYSTEM SOLUTION (18598767)

Main Inventor

Rohit SEHGAL

ASSIGNING BLOCKS OF MEMORY SYSTEMS (18634584)

Main Inventor

Deping He

OPERATION BASED ON CONSOLIDATED MEMORY REGION DESCRIPTION DATA (18733495)

Main Inventor

David Matthew Springberg

WRITE BUFFER EXTENSIONS FOR STORAGE INTERFACE CONTROLLERS (18626888)

Main Inventor

Sharath Chandra Ambula

MEMORY DEVICE OPERATIONS FOR UNALIGNED WRITE OPERATIONS (18731756)

Main Inventor

Scheheresade VIRANI

MANAGING DATA PLACEMENT FOR DIRECT ASSIGNED VIRTUAL MACHINES IN A MEMORY SUB-SYSTEM (18590807)

Main Inventor

Luca Bert

ADAPTIVE WEAR LEVELING FOR ENDURANCE COMPENSATION (18672635)

Main Inventor

Charles See Yeung Kwong

ERROR CORRECTION VIA ARTIFICIAL INTELLIGENCE (18611423)

Main Inventor

Febin Sunny

EVALUATION OF MEMORY DEVICE HEALTH MONITORING LOGIC (18680470)

Main Inventor

Scott E. Schaefer

MEMORY WITH IMPROVED INCOMPLETE ACTIVE PERFORMANCE LOSS TASK COMPLETION DETECTION (18583795)

Main Inventor

Hui Ye

APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS (18595703)

Main Inventor

Akira Goda

ENHANCED DATA RELIABILITY IN MULTI-LEVEL MEMORY CELLS (18616993)

Main Inventor

Deping He

NAND PAGE BUFFER BASED SECURITY OPERATIONS (18672394)

Main Inventor

Jeremy BINFET

COMBINING READ REQUESTS HAVING SPATIAL LOCALITY (18598722)

Main Inventor

Nikesh AGARWAL

DELAY ELEMENTS FOR COMMAND TIMING IN A MEMORY DEVICE (18731979)

Main Inventor

James S. Rehmeyer

ADAPTIVE REORDERING TECHNIQUE FOR EFFICIENT FLIT PACKAGING AND PERFORMANCE OPTIMIZATIONS (18598791)

Main Inventor

Nikesh AGARWAL

SYSTEM AND METHOD FOR EFFICIENT HARDWARE-ACCELERATED NEURAL NETWORK CONVOLUTION (18590759)

Main Inventor

Christian Stroemel

PRE-DECODER CIRCUITRY (18677609)

Main Inventor

Byung S. Moon

APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT A MEMORY (18734189)

Main Inventor

Sujeet Ayyapureddi

SELECTIVE ACCESS FOR GROUPED MEMORY DIES (18680550)

Main Inventor

Yang Lu

DIVIDED CLOCK CONTROL (18590760)

Main Inventor

Jongtae Kwak

APPARATUS OPERATING IN GEARDOWN MODE (18583267)

Main Inventor

Navya Sri Sreeram

TECHNIQUES AND DEVICES TO REDUCE BUS CROSS TALK FOR MEMORY SYSTEMS (18588686)

Main Inventor

Martin Brox

READING A MULTI-LEVEL MEMORY CELL (18643126)

Main Inventor

Mattia Robustelli

SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS (18622033)

Main Inventor

Christophe Vincent Antoine Laurent

REFRESH OF NEIGHBORING MEMORY CELLS BASED ON READ STATUS (18734724)

Main Inventor

Li-Te Chang

WRITE ERROR COUNTER FOR MEDIA MANAGEMENT IN A MEMORY DEVICE (18731706)

Main Inventor

John Christopher M. Sancon

PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY DEVICES (18678802)

Main Inventor

Andrea Ghetti

TRACKING RC TIME CONSTANT BY WORDLINE IN MEMORY DEVICES (18671835)

Main Inventor

Tommaso Vali

VOLTAGE DOMAIN BASED ERROR MANAGEMENT (18602782)

Main Inventor

Leon Zlotnik

SYSTEMS FOR PROCESSING ONE OR MORE SEMICONDUCTOR DEVICES, AND RELATED METHODS (18732053)

Main Inventor

Michael E. Koltonski

MICROELECTRONIC DEVICES INCLUDING CONTACT STRUCTURES, AND RELATED ELECTRONIC SYSTEMS AND METHODS (18427720)

Main Inventor

Zhou Xuan

MEMORY DEVICES INCLUDING SLOT STRUCTURES (18677693)

Main Inventor

Adam W. Saxler

SEMICONDUCTOR ASSEMBLIES WITH REDISTRIBUTION STRUCTURES FOR DIE STACK SIGNAL ROUTING (18668777)

Main Inventor

Owen R. Fay

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING CAPACITOR PILLAR (18588454)

Main Inventor

Keisuke Otsuka

HIGH VOLTAGE DIODES FOR WAFER ON WAFER PACKAGING OF SEMICONDUCTOR DEVICE (18588352)

Main Inventor

Shyam Surthi

VOLTAGE DOMAIN BASED ERROR MANAGEMENT (18602819)

Main Inventor

Leon Zlotnik

COMMAND ADDRESS FAULT DETECTION (18735981)

Main Inventor

Aaron P. BOEHM

Verify Public Keys by Devices without Secrets for the Generation of Respective Private Keys (18425927)

Main Inventor

Paul Aerick Lambert

Equalization for Pulse-Amplitude Modulation (18734721)

Main Inventor

Kang-Yong Kim

Image Compression using Integrated Circuit Devices having Analog Inference Capability (18735786)

Main Inventor

Poorna Kale

MEMORY DEVICE HAVING A DIAGONALLY OPPOSITE GATE PAIR PER MEMORY CELL (18731738)

Main Inventor

Giorgio SERVALLI

Integrated Assemblies and Methods of Forming Integrated Assemblies (18680742)

Main Inventor

Giorgio Servalli