Micron Technology, Inc. patent applications published on September 19th, 2024

Patent applications for Micron Technology, Inc. on September 19th, 2024

RUNTIME STORAGE CAPACITY REDUCTION AVOIDANCE IN SEQUENTIALLY-WRITTEN MEMORY DEVICES (18675934)

Main Inventor

Vinay Vijendra Kumar Lakshmi

USING A PERSISTENT BYTE-ADDRESSABLE MEMORY IN A COMPUTE EXPRESS LINK (CXL) MEMORY DEVICE FOR EFFICIENT POWER LOSS RECOVERY (18587865)

Main Inventor

Rohit Sehgal

DYNAMIC SUPERBLOCK CONSTRUCTION (18669038)

Main Inventor

Kishore K. Muchherla

MULTI-PARTITION FILE SYSTEM FOR STORING VIDEO STREAMS IN A MANAGED NON-VOLATILE MEMORY DEVICE (18669457)

Main Inventor

Lei PAN

CONFIGURING ERASE BLOCKS COUPLED TO A SAME STRING AS ZONES (18606742)

Main Inventor

Daniel J. Hubbard

AGGREGATING LOG DATA TO A REDUNDANT DIE OF A MEMORY SUB-SYSTEM (18586861)

Main Inventor

Yue Wei

ADAPTIVE TIME SENSE PARAMETERS AND OVERDRIVE VOLTAGE PARAMETERS FOR WORDLINES AT CORNER TEMPERATURES IN A MEMORY SUB-SYSTEM (18671855)

Main Inventor

Zhenming Zhou

CACHE MANAGEMENT IN A MEMORY SUBSYSTEM (18612870)

Main Inventor

Chinnakrishnan Ballapuram

MANAGING POWER CONSUMPTION ASSOCIATED WITH COMMUNICATING DATA IN A MEMORY SYSTEM (18595590)

Main Inventor

Deping He

PROGRAMMING ERASE BLOCKS COUPLED TO A SAME STRING (18606670)

Main Inventor

Daniel J. Hubbard

NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION (18606809)

Main Inventor

David Andrew Roberts

DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION (18669104)

Main Inventor

Tony Brewer

APPARATUSES AND METHODS TO PERFORM DATA SWAPPING ON A HOST (18525395)

Main Inventor

Sujeet Ayyapureddi

APPARATUSES AND METHODS TO PERFORM DQ SWAPPING ON MEMORY (18525354)

Main Inventor

Wesley W. Borie

DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWIDTH PERFORMANCE (18679341)

Main Inventor

Gil Golov

INTERNAL LOG MANAGEMENT IN MEMORY SYSTEMS (18591692)

Main Inventor

Kyle Brock-Petersen

NAMESPACE MAPPING OPTIMIZATION IN NON-VOLATILE MEMORY DEVICES (18671822)

Main Inventor

Alex Frolikov

SELECTIVE GARBAGE COLLECTION (18419173)

Main Inventor

Antonio Mauro

MEMORY SUB-SYSTEM CACHE EXTENSION TO PAGE BUFFERS OF A MEMORY ARRAY (18672310)

Main Inventor

Deping He

VARIABLE EXECUTION TIME ATOMIC OPERATIONS (18618483)

Main Inventor

Dean E. Walker

CONCURRENT PAGE CACHE RESOURCE ACCESS IN A MULTI-PLANE MEMORY DEVICE (18671846)

Main Inventor

Sundararajan Sankaranarayanan

PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS (18672645)

Main Inventor

Kishore Kumar Muchherla

ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE (18672640)

Main Inventor

Li-Te Chang

LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE (18675997)

Main Inventor

Shuai Xu

SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER (18674788)

Main Inventor

Mieko Kojima

DIE LOCATION DETECTION FOR GROUPED MEMORY DIES (18672339)

Main Inventor

Hyunyoo Lee

ACTIVE MATERIALS FOR REDUCING HOT ELECTRON-INDUCED PUNCH-THROUGH AND RELATED APPARATUSES AND COMPUTING SYSTEMS (18441962)

Main Inventor

Guy S. Perry, IV

MEMORY DEVICES AND SYSTEMS CONFIGURED TO COMMUNICATE A DELAY SIGNAL AND METHODS FOR OPERATING THE SAME (18674284)

Main Inventor

Sujeet Ayyapureddi

VARYING-POLARITY READ OPERATIONS FOR POLARITY-WRITTEN MEMORY CELLS (18586149)

Main Inventor

Innocenzo Tortorelli

TRENCH AND MULTIPLE PIER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS (18593671)

Main Inventor

Fabio Pellizzer

RE-DRIVING DATA TO A SUB-BLOCK DURING PROGRAMMING OF MULTIPLE SUB-BLOCKS (18605169)

Main Inventor

Eric N. Lee

PARTIAL BLOCK HANDLING PROTOCOL IN A NON-VOLATILE MEMORY DEVICE (18670073)

Main Inventor

Zhongguang Xu

CORRECTIVE READ WITH PARTIAL BLOCK OFFSET IN A MEMORY DEVICE (18602960)

Main Inventor

Karan Banerjee

Classification of Error Rate of Data Retrieved from Memory Cells (18678949)

Main Inventor

Sivagnanam Parthasarathy

MULTI-STATE PROGRAMMING OF MEMORY CELLS (18669140)

Main Inventor

Jeremy M. Hirst

SUB-BLOCK DEFINITION IN A MEMORY DEVICE USING SEGMENTED SOURCE PLATES (18602974)

Main Inventor

Aaron S. Yip

EXECUTION OF A PROGRAM BIAS DISTURB MITIGATION OPERATION ASSOCIATED WITH PROGRAMMING OF MULTIPLE SUB-BLOCKS (18605237)

Main Inventor

Eric N. Lee

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND PROVIDING RECOMMENDATIONS BASED ON SAME (18598937)

Main Inventor

Sujeet Ayyapureddi

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND PROVIDING RECOMMENDATIONS BASED ON SAME (18598899)

Main Inventor

Sujeet Ayyapureddi

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND PROVIDING RECOMMENDATIONS BASED ON SAME (18598832)

Main Inventor

Sujeet Ayyapureddi

EFFICIENT READ DISTURB SCANNING (18600360)

Main Inventor

Chun Sum Yeung

SEMICONDUCTOR DEVICE ASSEMBLIES WITH CROSS-STACK STRUCTURES, AND ASSOCIATED METHODS (18443166)

Main Inventor

Kelvin Tan Aik Boo

TRANSISTOR ARCHITECTURES IN COUPLED SEMICONDUCTOR SYSTEMS (18598735)

Main Inventor

James Brian Johnson

DEVICES INCLUDING CHANNEL MATERIALS AND PASSIVATION MATERIALS (18669237)

Main Inventor

Kamal M. Karda

ON DIE CLOCK JITTER INJECTION FOR ELECTROMAGNETIC INTERFERENCE REDUCTION (18523591)

Main Inventor

Eric J. Stave

Memory Circuitry And Methods Used In Forming Memory Circuitry (18598585)

Main Inventor

Kamal M. Karda

Integrated Assemblies and Methods of Forming Integrated Assemblies (18676056)

Main Inventor

Justin B. Dorhout

Memory Circuitry And Methods Used In Forming Memory Circuitry (18602313)

Main Inventor

Darwin A. Clampitt

CREATING SEGMENTED SOURCE PLATES FOR SUB-BLOCK DEFINITION IN A MEMORY DEVICE (18604200)

Main Inventor

Paolo Tessariol

Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells (18582291)

Main Inventor

James Lattin

MEMORY CELLS WITH SIDEWALL AND BULK REGIONS IN VERTICAL STRUCTURES (18617007)

Main Inventor

Lorenzo Fratin