MICRON TECHNOLOGY, INC. patent applications published on December 28th, 2023
Summary of the patent applications from MICRON TECHNOLOGY, INC. on December 28th, 2023
Micron Technology, Inc. has recently filed several patents related to memory arrays, memory circuitry, semiconductor devices, and memory fault notification. These patents aim to improve the efficiency, performance, and reliability of memory systems.
One patent describes a method for forming a memory array using memory cells arranged in stacks. The method involves using alternating tiers in the lower and upper stacks, with sacrificial material in the channel openings. Non-stoichiometric silicon nitride is used in one of the tiers, and channel-material strings are formed after removing the sacrificial material.
Another patent focuses on forming memory circuitry using transistors and conductive vias. The method involves creating transistors with source/drain regions and a channel region, and forming conductive vias to connect to the source/drain regions. Conductor material is patterned to create horizontal lines and trenches, with digitlines formed in the trenches. Storage elements are then connected to the conductor vias.
A different patent describes an apparatus and method for operating a memory cell with two transistors. The first transistor has a channel region connected to a data line and a conductive region, while the second transistor has a channel region connected to the data line and a charge storage structure. The memory cell uses separate gates for the transistors and offers benefits such as higher data density and faster data access.
Another patent focuses on protecting components on a circuit board, particularly memory devices. The circuit board has structures that shield the memory devices and components from external forces, enhancing durability and reducing the risk of damage.
Additionally, there are patents related to color correction in light emitting diodes (LEDs), releasing thinned semiconductor dies from a mount tape, and detecting and notifying faults in memory devices. These patents offer benefits such as accurate color correction, efficient release of semiconductor dies, and timely fault detection in memory devices.
Notable applications of these patents include memory arrays, data storage devices, computer memory modules, solid-state drives (SSDs), lighting systems, display technologies, and integrated circuits.
Summary in bullet points:
- Memory array formation using stacked memory cells with alternating tiers and sacrificial material.
- Memory circuitry formation using transistors, conductive vias, and digitlines.
- Memory cell operation with two transistors and separate gates for improved performance.
- Protection of memory devices and components on circuit boards from external forces.
- Color correction in LEDs using inkjet printing of selected phosphor.
- Efficient release of thinned semiconductor dies from a mount tape.
- Fault detection and notification in memory devices for improved reliability.
Notable applications:
- Memory arrays
- Data storage devices
- Computer memory modules
- Solid-state drives (SSDs)
- Lighting systems
- Display technologies
- Integrated circuits
Contents
- 1 Patent applications for MICRON TECHNOLOGY, INC. on December 28th, 2023
- 1.1 APPARATUSES AND METHODS FOR CONFIGURABLE MEMORY ARRAY BANK ARCHITECTURES (18326303)
- 1.2 MEMORY OPERATION BASED ON BLOCK-ASSOCIATED TEMPERATURE (17848061)
- 1.3 MEMORY BLOCK UTILIZATION IN MEMORY SYSTEMS (17846761)
- 1.4 SCALABILITY OF DATA CURSORS IN MEMORY SUBSYSTEMS WHILE REDUCING RESOURCE REQUIREMENTS (17852099)
- 1.5 APPARATUSES AND METHODS FOR MEMORY ALIGNMENT (18343929)
- 1.6 VECTOR POPULATION COUNT DETERMINATION IN MEMORY (18202161)
- 1.7 MEMORY DEVICE WITH STATUS FEEDBACK FOR ERROR CORRECTION (18213732)
- 1.8 OUT-OF-ORDER PROGRAMMING OF FIRST WORDLINE IN A PHYSICAL UNIT OF A MEMORY DEVICE (18203223)
- 1.9 UNLOADED CACHE BYPASS (18215115)
- 1.10 CACHE BYPASS (18215117)
- 1.11 DEEP LEARNING ACCESS AND AUTHENTICATION IN A COMPUTING ARCHITECTURE (17808921)
- 1.12 DETECTING INFORMATION MODIFICATION IN A MEMORY SYSTEM (17850606)
- 1.13 SELF-REFRESH STATE WITH DECREASED POWER CONSUMPTION (17808818)
- 1.14 ADJUSTING REFRESH RATE DURING SELF-REFRESH STATE (17849100)
- 1.15 REFRESH DETERMINATION USING MEMORY CELL PATTERNS (17852221)
- 1.16 ASYNCHRONOUS SIGNAL TO COMMAND TIMING CALIBRATION FOR TESTING ACCURACY (17846967)
- 1.17 APPARATUSES AND METHODS FOR INPUT RECEIVER CIRCUITS AND RECEIVER MASKS FOR SAME (18312747)
- 1.18 MEMORY FAULT NOTIFICATION (17851721)
- 1.19 PERFORMING SELECT GATE INTEGRITY CHECKS TO IDENTIFY AND INVALIDATE DEFECTIVE BLOCKS (18242884)
- 1.20 THIN DIE RELEASE FOR SEMICONDUCTOR DEVICE ASSEMBLY (18243664)
- 1.21 FACE-TO-FACE SEMICONDUCTOR DEVICE WITH FAN-OUT PORCH (18241592)
- 1.22 MICROELECTRONIC WORKPIECE PROCESSING SYSTEMS AND ASSOCIATED METHODS OF COLOR CORRECTION (18464789)
- 1.23 CIRCUIT BOARD STRUCTURES FOR COMPONENT PROTECTION (17849093)
- 1.24 MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SEPARATE READ AND WRITE GATES (18244069)
- 1.25 Memory Circuitry And Method Used In Forming Memory Circuitry (18243298)
- 1.26 Integrated Circuitry Comprising A Memory Array Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells (18244169)
Patent applications for MICRON TECHNOLOGY, INC. on December 28th, 2023
APPARATUSES AND METHODS FOR CONFIGURABLE MEMORY ARRAY BANK ARCHITECTURES (18326303)
Main Inventor
Dean D. Gans
MEMORY OPERATION BASED ON BLOCK-ASSOCIATED TEMPERATURE (17848061)
Main Inventor
Pitamber Shukla
MEMORY BLOCK UTILIZATION IN MEMORY SYSTEMS (17846761)
Main Inventor
Deping He
SCALABILITY OF DATA CURSORS IN MEMORY SUBSYSTEMS WHILE REDUCING RESOURCE REQUIREMENTS (17852099)
Main Inventor
Luca Bert
APPARATUSES AND METHODS FOR MEMORY ALIGNMENT (18343929)
Main Inventor
John D. Leidel
VECTOR POPULATION COUNT DETERMINATION IN MEMORY (18202161)
Main Inventor
Sanjay Tiwari
MEMORY DEVICE WITH STATUS FEEDBACK FOR ERROR CORRECTION (18213732)
Main Inventor
Scott E. Schaefer
OUT-OF-ORDER PROGRAMMING OF FIRST WORDLINE IN A PHYSICAL UNIT OF A MEMORY DEVICE (18203223)
Main Inventor
Deping He
UNLOADED CACHE BYPASS (18215115)
Main Inventor
Emanuele Confalonieri
CACHE BYPASS (18215117)
Main Inventor
Emanuele Confalonieri
DEEP LEARNING ACCESS AND AUTHENTICATION IN A COMPUTING ARCHITECTURE (17808921)
Main Inventor
Poorna Kale
DETECTING INFORMATION MODIFICATION IN A MEMORY SYSTEM (17850606)
Main Inventor
James Ruane
SELF-REFRESH STATE WITH DECREASED POWER CONSUMPTION (17808818)
Main Inventor
Shawn M. Hilde
ADJUSTING REFRESH RATE DURING SELF-REFRESH STATE (17849100)
Main Inventor
John E. Riley
REFRESH DETERMINATION USING MEMORY CELL PATTERNS (17852221)
Main Inventor
Umberto di Vincenzo
ASYNCHRONOUS SIGNAL TO COMMAND TIMING CALIBRATION FOR TESTING ACCURACY (17846967)
Main Inventor
Yoshinori Fujiwara
APPARATUSES AND METHODS FOR INPUT RECEIVER CIRCUITS AND RECEIVER MASKS FOR SAME (18312747)
Main Inventor
Dean D. Gans
MEMORY FAULT NOTIFICATION (17851721)
Main Inventor
Scott E. Schaefer
PERFORMING SELECT GATE INTEGRITY CHECKS TO IDENTIFY AND INVALIDATE DEFECTIVE BLOCKS (18242884)
Main Inventor
Zhongguang Xu
THIN DIE RELEASE FOR SEMICONDUCTOR DEVICE ASSEMBLY (18243664)
Main Inventor
Andrew M. Bayless
FACE-TO-FACE SEMICONDUCTOR DEVICE WITH FAN-OUT PORCH (18241592)
Main Inventor
Jong Sik Paek
MICROELECTRONIC WORKPIECE PROCESSING SYSTEMS AND ASSOCIATED METHODS OF COLOR CORRECTION (18464789)
Main Inventor
Kevin Tetz
CIRCUIT BOARD STRUCTURES FOR COMPONENT PROTECTION (17849093)
Main Inventor
Bradley Bitz
MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SEPARATE READ AND WRITE GATES (18244069)
Main Inventor
Eric S. Carman
Memory Circuitry And Method Used In Forming Memory Circuitry (18243298)
Main Inventor
Guangjun Yang
Integrated Circuitry Comprising A Memory Array Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells (18244169)
Main Inventor
Daniel Billingsley