Kioxia corporation (20240324213). SEMICONDUCTOR MEMORY DEVICE simplified abstract
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Takuya Konno of Yokkaichi Mie (JP)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240324213 titled 'SEMICONDUCTOR MEMORY DEVICE
The semiconductor memory device described in the abstract consists of a stacked body with multiple conductive layers stacked in one direction, a pillar structure array with pillar structures extending in different directions within the stacked body, and plate-shaped structures intersecting within the body.
- The semiconductor memory device features a stacked body with multiple conductive layers.
- It includes a pillar structure array with pillar structures extending in different directions.
- The device also has plate-shaped structures intersecting within the stacked body.
- The pillar structures consist of memory cell transistors arranged in strings.
- The support structure is located where the plate-shaped structures intersect.
Potential Applications: - This technology can be used in various memory storage devices such as solid-state drives and flash memory. - It can also be applied in high-performance computing systems and data centers for efficient data storage and retrieval.
Problems Solved: - This technology addresses the need for high-density memory storage solutions. - It provides a compact and efficient way to store and access large amounts of data.
Benefits: - Increased memory storage capacity. - Improved data access speeds. - Enhanced overall performance of memory devices.
Commercial Applications: Title: Advanced Memory Storage Technology for High-Performance Computing This technology can be commercially utilized in the production of solid-state drives, flash memory devices, and other memory storage solutions for various industries such as data centers, telecommunications, and consumer electronics.
Questions about Semiconductor Memory Device: 1. How does the pillar structure array contribute to the efficiency of the memory device? The pillar structure array allows for a compact design and efficient organization of memory cell transistors, increasing the overall storage capacity of the device.
2. What are the potential market implications of implementing this advanced memory storage technology? By incorporating this technology into memory storage devices, companies can offer faster and more reliable products, catering to the growing demand for high-performance computing solutions.
Original Abstract Submitted
a semiconductor memory device includes a stacked body including a plurality of conductive layers stacked in a first direction, a pillar structure array including a plurality of pillar structures each extending in the first direction in the stacked body and arranged in a second direction and a third direction, the plurality of pillar structures including a plurality of first pillar structures, each of which is a part of a string of memory cell transistors, a first plate-shaped structure extending in the first and second directions in the stacked body, a second plate-shaped structure extending in the first and third directions in the stacked body and disposed along an end portion of the pillar structure array in the second direction, and a support structure extending in the first direction in the stacked body and disposed where the first plate-shaped structure and the second plate-shaped structure intersect.
