KABUSHIKI KAISHA TOSHIBA patent applications published on September 28th, 2023
Summary of the patent applications from KABUSHIKI KAISHA TOSHIBA on September 28th, 2023
KABUSHIKI KAISHA TOSHIBA has filed several recent patents and applications related to various technologies. Here is a summary of their recent patents and notable applications:
Recent Patents: - Patent 1: An isolator consisting of two wiring boards with coils positioned to face each other. The second wiring board is smaller in size compared to the first wiring board. - Patent 2: A printed circuit board with shared pads of different areas and ports, including overlapping and protruding ports. The shared pads also have a sloping side edge connecting two side edges. - Patent 3: An electronic approval system with a biometric authentication unit and a security chip. The system generates reliability confirmation information using a private key for electronic approval records. - Patent 4: A device that manages encryption keys using quantum key distribution (QKD) to securely share encryption keys over a communication network. - Patent 5: A device that synchronizes frames in a video transmission by determining reception time and extracting timestamps from packet data. - Patent 6: A communication relay apparatus that enhances communication quality with a mobile station by managing communication resources utilized by multiple remote units. - Patent 7: A detection circuit with insulating elements, transmission test circuits, and a reception test circuit that outputs a detection signal based on the voltage difference between the insulating elements. - Patent 8: A semiconductor device with five terminals and two circuits: an amplification circuit and a switching circuit that change the connections between the input ends and the terminals. - Patent 9: A driver circuit with a drive circuit, monitoring circuit, and control circuit that adjusts the current value to achieve a desired rate of change for the voltage drop across the switching element. - Patent 10: A rotor design with bridge portions arranged in a way that the interval between them decreases from the outer side to the inner side of the rotor iron core.
Notable Applications:
- Application 1: A system for controlling power supply to electronic devices based on user authentication.
- Application 2: A method for improving the efficiency of wireless power transfer systems.
- Application 3: A technique for reducing power consumption in electronic devices during standby mode.
- Application 4: A system for managing and controlling multiple electronic devices in a networked environment.
- Application 5: A method for enhancing the security of data transmission in a communication network.
- Application 6: A system for optimizing the performance of computer processors based on workload analysis.
- Application 7: A technique for improving the accuracy of image recognition algorithms using machine learning.
- Application 8: A method for reducing electromagnetic interference in electronic circuits.
- Application 9: A system for monitoring and controlling the temperature of electronic devices.
- Application 10: A technique for improving the reliability of data storage systems through error correction coding.
Contents
- 1 Patent applications for KABUSHIKI KAISHA TOSHIBA on September 28th, 2023
- 1.1 SENSOR ATTACHMENT/DETACHMENT DEVICE, SENSOR ATTACHMENT/DETACHMENT SYSTEM, SENSOR ATTACHMENT METHOD AND SENSOR DETACHMENT METHOD (17823873)
- 1.2 LASER WELDING METHOD (18168471)
- 1.3 CHARGING SYSTEM (17891975)
- 1.4 COLD STORAGE MATERIAL, COLD STORAGE MATERIAL PARTICLE, GRANULATED PARTICLE, COLD STORAGE DEVICE, REFRIGERATOR, CRYOPUMP, SUPERCONDUCTING MAGNET, NUCLEAR MAGNETIC RESONANCE IMAGING APPARATUS, NUCLEAR MAGNETIC RESONANCE APPARATUS, MAGNETIC FIELD APPLICATION TYPE SINGLE CRYSTAL PULLING APPARATUS, AND HELIUM RE-CONDENSING DEVICE (18323288)
- 1.5 FLUORESCENT RARE EARTH COMPLEX AND SECURITY MEDIUM USING THE SAME (18326054)
- 1.6 ELECTROLYTIC DEVICE AND METHOD OF DRIVING ELECTROLYTIC DEVICE (17821858)
- 1.7 CRIMPING DETERMINATION DEVICE, CRIMPING DETERMINATION METHOD, CRIMPING DETERMINATION PROGRAM, WIRE HARNESS PROCESSING DEVICE, AND WIRE HARNESS PROCESSING METHOD (18168761)
- 1.8 OPTICAL INSPECTION METHOD, NON-TRANSITORY STORAGE MEDIUM STORING OPTICAL INSPECTION PROGRAM, PROCESSING DEVICE, AND OPTICAL INSPECTION APPARATUS (17823957)
- 1.9 FET SENSOR USING ANTIOXIDANT (17930415)
- 1.10 GENERATION SYSTEM, GENERATION METHOD, AND STORAGE MEDIUM (18168822)
- 1.11 INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND PACKAGE HANDLING SYSTEM (18173728)
- 1.12 MAGNETIC DISK APPARATUS AND METHOD (17903905)
- 1.13 MULTIPLICATION DEVICE, MULTIPLY-ACCUMULATE OPERATION DEVICE, MATRIX OPERATION DEVICE, AND RESERVOIR DEVICE (17820224)
- 1.14 RANDOM NUMBER GENERATION CIRCUIT (17901960)
- 1.15 TRANSMITTER DEVICE, RECEIVER DEVICE, TRANSMITTING METHOD, AND RECEIVING METHOD (17939612)
- 1.16 ANOMALY DETECTION SYSTEM, METHOD AND PROGRAM, AND DISTRIBUTED CO-SIMULATION SYSTEM (17932638)
- 1.17 MAGNETIC DISK DEVICE AND METHOD (17897062)
- 1.18 MAGNETIC DISK DEVICE (17903785)
- 1.19 MAGNETIC DISK APPARATUS AND METHOD (17943015)
- 1.20 DISK DEVICE AND CONTROL METHOD (17903845)
- 1.21 MAGNETIC DISK DEVICE AND METHOD (17903870)
- 1.22 MAGNETIC DISK DEVICE AND CONTROL METHOD OF MAGNETIC DISK DEVICE (17931707)
- 1.23 MAGNETIC DISK DEVICE AND METHOD (17931647)
- 1.24 MAGNETIC DISK DEVICE (17941702)
- 1.25 DISK DEVICE (17941718)
- 1.26 DISK DEVICE (17900473)
- 1.27 MAGNETIC DISK APPARATUS AND METHOD (17931679)
- 1.28 REFERENCE VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE (17903617)
- 1.29 CAPACITOR AND ETCHING METHOD (18315123)
- 1.30 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE (17929419)
- 1.31 SEMICONDUCTOR DEVICE (17903846)
- 1.32 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (17942019)
- 1.33 SEMICONDUCTOR DEVICE (17902610)
- 1.34 SEMICONDUCTOR DEVICE (17942510)
- 1.35 SEMICONDUCTOR DEVICE (17901890)
- 1.36 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT (17941756)
- 1.37 SEMICONDUCTOR DEVICE (17889971)
- 1.38 SEMICONDUCTOR DEVICE (17941725)
- 1.39 METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE (17892809)
- 1.40 SILICON CARBIDE SEMICONDUCTOR DEVICE (17897753)
- 1.41 SEMICONDUCTOR DEVICE (17940373)
- 1.42 SEMICONDUCTOR DEVICE (17942562)
- 1.43 SEMICONDUCTOR DEVICE (17939025)
- 1.44 SEMICONDUCTOR DEVICE (17870045)
- 1.45 SEMICONDUCTOR DEVICE (17882335)
- 1.46 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE (17901312)
- 1.47 SEMICONDUCTOR DEVICE (18007227)
- 1.48 SEMICONDUCTOR DEVICE (17891671)
- 1.49 SEMICONDUCTOR DEVICE (17901632)
- 1.50 SEMICONDUCTOR DEVICE (17901732)
- 1.51 SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR (17823088)
- 1.52 SEMICONDUCTOR DEVICE (17903894)
- 1.53 SEMICONDUCTOR DEVICE (17931508)
- 1.54 MULTILAYER JUNCTION PHOTOELECTRIC CONVERSION ELEMENT AND METHOD FOR MANUFACTURING THE SAME (18317466)
- 1.55 PHOTODETECTOR (17891799)
- 1.56 SECONDARY BATTERY (17932422)
- 1.57 SECONDARY BATTERY (17932415)
- 1.58 SECONDARY BATTERY (17932410)
- 1.59 ROTOR AND ROTATING ELECTRICAL MACHINE (18325935)
- 1.60 DRIVER CIRCUIT AND POWER CONVERSION SYSTEM (17903793)
- 1.61 SEMICONDUCTOR DEVICE AND MOTOR DRIVE SYSTEM (17901318)
- 1.62 DETECTION CIRCUIT AND COMMUNICATION SYSTEM (17943007)
- 1.63 COMMUNICATION RELAY APPARATUS SND STORAGE MEDIUM STORING COMPUTER PROGRAM (18153983)
- 1.64 FRAME SYNCHRONIZATION APPARATUS (18310695)
- 1.65 KEY MANAGEMENT DEVICE, QUANTUM CRYPTOGRAPHY COMMUNICATION SYSTEM, AND COMPUTER PROGRAM PRODUCT (17821281)
- 1.66 ELECTRONIC APPROVAL SYSTEM, ELECTRONIC APPROVAL SERVER, AND COMPUTER-READABLE STORAGE MEDIUM (18174540)
- 1.67 PRINTED CIRCUIT BOARD AND DISK DEVICE (17899385)
- 1.68 ISOLATOR (17901997)
Patent applications for KABUSHIKI KAISHA TOSHIBA on September 28th, 2023
SENSOR ATTACHMENT/DETACHMENT DEVICE, SENSOR ATTACHMENT/DETACHMENT SYSTEM, SENSOR ATTACHMENT METHOD AND SENSOR DETACHMENT METHOD (17823873)
Inventor Kazuo WATABE
Brief explanation
The abstract describes a device that can attach and detach a sensor to an object. The device includes a bonding member that is attached to the sensor and reduces the adhesive force. There is also a support portion that can directly contact the sensor or use another functional part to support it. The device also has a release execution portion that can decrease the adhesive force of the bonding member to detach the sensor from the object.
Abstract
According to one embodiment, a sensor attachment/detachment device of the embodiment includes a sensor, a bonding member, a support portion, and a release execution portion. The bonding member is bonded to a first surface of the sensor and has a function of decreasing an adhesive force. The support portion can support the sensor by directly contacting a second surface of the sensor or via another functional portion. The release execution portion performs a process of releasing the bonding member from the object by decreasing the adhesive force of the bonding member after the sensor is attached to the object by the bonding member.
LASER WELDING METHOD (18168471)
Inventor Lisa MASUDA
Brief explanation
This abstract describes a laser welding method that involves two processes: a preparation process and a welding process. In the preparation process, two metal members are temporarily welded together to create multiple connection portions. In the welding process, a laser beam is used to permanently weld the two members together. The first process of the welding involves directing the laser beam from a specific position between two adjacent connection portions. The second process involves directing the laser beam from one connection portion to the specific position. Overall, this method aims to simplify the laser welding process for joining metal members.
Abstract
A laser welding method according to an embodiment includes a preparation process and a welding process. The preparation process includes preparing a temporarily-welded member that includes multiple connection portions by temporarily welding a second member to a first member. The welding process includes welding the second member to the first member by irradiating a laser beam on the temporarily-welded member. In the welding process, a first process is performed, after which a second process is performed. The first process includes irradiating a laser beam from a prescribed position to a second connection portion, wherein the second connection portion is adjacent to a first connection portion, and the prescribed position is between the first connection portion and the second connection portion. The second process includes irradiating a laser beam from the first connection portion to the prescribed position.
CHARGING SYSTEM (17891975)
Inventor Kenichirou OGAWA
Brief explanation
The abstract describes a charging system for a secondary battery in a mobile device. The system has a controller that can choose between two charging modes. The first mode simulates a synchronous generator to charge the battery, while the second mode charges the battery without simulating the generator. The charger then charges the battery based on the selected mode.
Abstract
According to one embodiment, a charging system charges a secondary battery provided in a mobile body. The charging system includes a controller which selects one of a first charge mode which charges the secondary battery by simulating a synchronous generator and a second charge mode which charges the secondary battery without simulating the synchronous generator, and a charger which charges the secondary battery by an operation corresponding to the first charge mode or the second charge mode selected by the controller.
COLD STORAGE MATERIAL, COLD STORAGE MATERIAL PARTICLE, GRANULATED PARTICLE, COLD STORAGE DEVICE, REFRIGERATOR, CRYOPUMP, SUPERCONDUCTING MAGNET, NUCLEAR MAGNETIC RESONANCE IMAGING APPARATUS, NUCLEAR MAGNETIC RESONANCE APPARATUS, MAGNETIC FIELD APPLICATION TYPE SINGLE CRYSTAL PULLING APPARATUS, AND HELIUM RE-CONDENSING DEVICE (18323288)
Inventor Takahiro KAWAMOTO
Brief explanation
The abstract describes a type of cold storage material that contains a rare earth oxysulfide. This material includes at least one rare earth element from a specific group, such as Yttrium, Lanthanum, Cerium, and others. It also contains a first group element in a certain concentration range. The material has a high maximum value of volume specific heat in a temperature range between 2 Kelvin and 10 Kelvin, indicating its ability to store cold temperatures effectively.
Abstract
A cold storage material of an embodiment includes a rare earth oxysulfide containing at least one rare earth element selected from the group consisting of Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and a first group element of 0.001 atom % or more and 10 atom % or less, in which a maximum value of volume specific heat in a temperature range of 2 K or more and 10 K or less is 0.5 J/(cm·K) or more.
FLUORESCENT RARE EARTH COMPLEX AND SECURITY MEDIUM USING THE SAME (18326054)
Inventor Hiroki IWANAGA
Brief explanation
The abstract describes a fluorescent rare earth complex that has a strong emission intensity and is highly durable. This complex can be used in a security medium. The rare earth complex is made up of a rare earth ion, a diphosphine dioxide ligand, and a β-diketone ligand. The diphosphine dioxide ligand has two phosphorus atoms, each with different substituents.
Abstract
The embodiments provide a fluorescent rare earth complex having strong emission intensity and excellent durability, and also provide a security medium using the complex. The rare earth complex according to the embodiment comprises a rare earth ion, a diphosphine dioxide ligand and a β-diketone ligand wherein two phosphorus atoms contained in the diphosphine dioxide ligand individually have substituents different from each other.
ELECTROLYTIC DEVICE AND METHOD OF DRIVING ELECTROLYTIC DEVICE (17821858)
Inventor Masakazu YAMAGIWA
Brief explanation
The abstract describes an electrolytic device that consists of an electrolysis cell with a cathode and an anode, and separate flow paths for the cathode and anode. The device also includes a tank with two rooms connected by an opening, where the liquid containing ions is stored. The tank is designed in a way that creates a difference in liquid levels between the two rooms, causing the ions to move from the first room to the second room through the opening. The device also has flow paths connecting the cathode and anode outlets to the respective rooms in the tank.
Abstract
An electrolytic device, includes: an electrolysis cell including: a cathode; an anode; a cathode flow path facing the cathode; and an anode flow path facing the anode; a tank including: a first room; a second room; and an opening connecting the first and second rooms, the first and second rooms store a liquid containing at least one ion, the tank forms a level difference so that the first liquid level of the liquid in the first room is higher to the bottom of the second room than the second liquid level of the liquid in the second room, and thus cause an ion in the liquid to move from the first to the second room through the opening; a first flow path connecting an outlet of the cathode flow path and the first room; and a second flow path connecting the second room and an outlet of the anode flow path.
CRIMPING DETERMINATION DEVICE, CRIMPING DETERMINATION METHOD, CRIMPING DETERMINATION PROGRAM, WIRE HARNESS PROCESSING DEVICE, AND WIRE HARNESS PROCESSING METHOD (18168761)
Inventor Akira TANAKA
Brief explanation
This abstract describes a device used to determine the quality of a crimped state in a wire harness. The device includes a dropping unit that releases a test solution onto the wire harness, which consists of a crimped portion where an electric wire is crimped by a crimping terminal, a first electric wire portion where the wire is exposed on the distal end side, and a second electric wire portion where the wire is exposed on the proximal end side. The dropping unit applies the test solution to either the first or second electric wire portion. An image acquisition unit captures an image of the other electric wire portion. A control unit then analyzes the image to determine the quality of the crimped state in the crimped portion.
Abstract
A crimping determination device according to an embodiment includes a dropping unit, an image acquisition unit, and a control unit. The dropping unit drops a test solution to a wire harness. The wire harness includes a crimped portion in which an electric wire is crimped by a crimping terminal, a first electric wire portion in which the electric wire is exposed on a distal end side, and a second electric wire portion in which the electric wire is exposed on a proximal end side. The dropping unit drops the test solution to either one of the first electric wire portion and the second electric wire portion. The image acquisition unit acquires an image including the other one of the first electric wire portion and the second electric wire portion. The control unit determines a quality of a crimped state of the crimped portion based on the image.
OPTICAL INSPECTION METHOD, NON-TRANSITORY STORAGE MEDIUM STORING OPTICAL INSPECTION PROGRAM, PROCESSING DEVICE, AND OPTICAL INSPECTION APPARATUS (17823957)
Inventor Hiroshi OHNO
Brief explanation
The abstract describes an optical inspection method that involves capturing an image using light from an object's surface. The image sensor used has color channels that receive different wavelengths of light. The method includes estimating the number of colors in each pixel of the image based on the intensity ratio of the color channels. It also involves identifying either a scattered light distribution or the state of the object's surface based on the number of colors.
Abstract
According to the embodiment, an optical inspection method includes: acquiring an image by capturing the image, using light from a surface of an object, which passes through a wavelength selection portion configured to selectively pass light components of a plurality of predetermined wavelengths different from each other, the image sensor including color channels configured to discriminately receive the light components of the plurality of predetermined wavelengths, performing color count estimation processing configured to estimate the number of colors based on the intensity ratio of the color channels that have received the light in each pixel of the image, and performing scattered light distribution identification processing configured to identify a scattered light distribution as BRDF from the surface of the object based on the number of colors or surface state identification processing configured to identify a state of the surface of the object based on the number of colors.
FET SENSOR USING ANTIOXIDANT (17930415)
Inventor Yoshiaki SUGIZAKI
Brief explanation
The abstract describes a type of sensor called an FET sensor. This sensor consists of a sensitive film made of a carbon allotrope, a liquid film that covers the sensitive film, and electrodes (source and drain) that are connected to the sensitive film. Additionally, there is a gate electrode that applies an electric field to the sensitive film. The liquid film used in this sensor contains an antioxidant.
Abstract
According to one embodiment, an FET sensor includes a sensitive film including a carbon allotrope, a liquid film disposed so as to cover the sensitive film, a source electrode and a drain electrode electrically connected to the sensitive film, and a gate electrode configured to apply an electric field to the sensitive film, wherein the liquid film comprises an antioxidant.
GENERATION SYSTEM, GENERATION METHOD, AND STORAGE MEDIUM (18168822)
Inventor Xinyi ZHOU
Brief explanation
The abstract describes a system that generates a production plan for manufacturing products using production lines. The system includes an optimization calculation part, an input plan generator, and a verification part. The optimization calculation part uses input data such as production plan amounts and processing capacities to generate a processing plan. The input plan generator uses input data such as workpiece amounts and processing routes to generate an input plan. The verification part then determines if the processing plan and input plan are appropriate.
Abstract
According to one embodiment, a generation system generates a production plan. The production plan is for producing products of product types by processes using production lines. The system includes an optimization calculation part, an input plan generator, and a verification part. The optimization calculation part generates a processing plan by an optimization calculation using first input data. The first input data includes a production plan amount of each of the product types and a processing capacity of each equipment. The input plan generator generates an input plan by using second input data. The second input data includes an input amount of workpieces to each of the production lines for each of the product types. The second input data further includes a processing route in the plurality of processes for each of the product types. The verification part determines an appropriateness of the processing plan and the input plan
INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND PACKAGE HANDLING SYSTEM (18173728)
Inventor Masaaki SUGIYAMA
Brief explanation
The abstract describes an information processing device that controls a package handling system. The device has two interfaces, one connected to the first logistics equipment and the other connected to the second logistics equipment. It also includes a processor.
The processor collects flow rate data from sensors in the first logistics equipment through the first interface. It then converts the acquired flow rate data into a common format. Additionally, the processor obtains equipment information about the second logistics equipment through the second interface and converts the equipment information into the common format.
The device generates a display screen that shows the flow rates at different points of the first logistics equipment, the equipment information, and the congestion state of the system. After simulating the system, the display screen is updated. The processor also issues a control signal, either in the first or second format, to make changes to the operating characteristic of the first or second logistics equipment.
Abstract
An information processing device for controlling a package handling system includes a first interface connected to a first logistics equipment, a second interface connected to a second logistics equipment, and a processor. The processor acquires flow rate data output by sensors of the first logistics equipment via the first interface, changes a format of the acquired flow rate data to a common format, acquires equipment information regarding the second logistics equipment via the second interface, changes a format of the equipment information to the common format, and generates a display screen showing flow rates at different points of the first logistics equipment, the equipment information, and a congestion state of the system, update the display screen after performing a simulation of the system, and issue a control signal in the first or second format to apply a change in an operating characteristic of the first or second logistics equipment.
MAGNETIC DISK APPARATUS AND METHOD (17903905)
Inventor Keigo SOGABE
Brief explanation
This abstract describes a magnetic disk apparatus that uses a flash memory. The memory cell transistors in the flash memory have threshold voltages set to either a higher value or a lower value. When there is a power loss, the controller performs bit inversion on certain data and writes it to the flash memory. This is done when the data has more of the higher value than the lower value. However, if the data has more of the lower value, the controller writes it to the flash memory without bit inversion.
Abstract
According to a magnetic disk apparatus of one embodiment, threshold voltages of memory cell transistors of a flash memory are set to a first section for a first value or to a second section for a second value. The second section is on a lower voltage side than the first section. The controller performs bit inversion of second data held in a volatile memory and writes the second data onto the flash memory when a power loss occurs while the second data corresponds to third data in which a number of the first values is larger than that of the second values. The controller writes the second data onto the flash memory without bit inversion when a power loss occurs while the second data corresponds to fourth data. The fourth data is data in which a number of the first values is smaller than that of the second values.
MULTIPLICATION DEVICE, MULTIPLY-ACCUMULATE OPERATION DEVICE, MATRIX OPERATION DEVICE, AND RESERVOIR DEVICE (17820224)
Inventor Takao MARUKAME
Brief explanation
The abstract describes a multiplication device that consists of several circuits.
The device has a short-term memory circuit that generates a control voltage based on a weight value. There is also a long-term memory circuit that generates a control voltage with a longer time constant than the short-term memory circuit.
A conversion circuit is present, which multiplies an input voltage by a conductance to produce an output current. The output current is determined by the multiplication of the input voltage and the conductance, and the control voltage from the short-term memory circuit is applied to control the conversion circuit.
Additionally, an input voltage corresponding to an input value is applied to the conversion circuit.
Lastly, a control circuit is responsible for calibrating the device. It achieves this by transferring an electric charge from the long-term memory circuit to the short-term memory circuit, ensuring that the first control voltage matches the second control voltage.
Abstract
A multiplication device according to one embodiment includes a short-term memory circuit, a long-term memory circuit, a conversion circuit, and a control circuit. The short-term memory circuit generates a first control voltage in accordance with a weight value. The long-term memory circuit generates a second control voltage by a circuit with a larger time constant than the short-term memory circuit. The conversion circuit outputs an output current by multiplying an input voltage by a conductance. The output current is output by that, the first control voltage is applied to a control terminal of the conversion circuit, and an input voltage according to an input value is applied to an input terminal of the conversion circuit. The control circuit executes a calibration process of matching the first control voltage with the second control voltage by transferring an electric charge from the long-term memory circuit to the short-term memory circuit.
RANDOM NUMBER GENERATION CIRCUIT (17901960)
Inventor Hiroo NAKANO
Brief explanation
The abstract describes a circuit that generates random numbers. It includes a sampling circuit that captures the output of a ring oscillator and generates a random number. A periodicity detection circuit checks if the output is periodic, and a randomness test circuit verifies the randomness of the output. A control circuit adjusts the oscillation period based on the periodicity detection result, divides the random number into multiple parts for generation, and performs the randomness test for each part.
Abstract
A random number generation circuit in an embodiment includes a sampling circuit configured to capture an oscillation output of a ring oscillator using a first clock and generate a random number value, a periodicity detection circuit configured to detect periodicity of an output of the sampling circuit, a randomness test circuit configured to perform a randomness test for the output of the sampling circuit, and a control circuit configured to change an oscillation period of the oscillation output based on a detection result of the periodicity detection circuit, divide a random number output based on the random number value into a plurality of divided random numbers to perform random number generation for each of the divided random numbers, and cause the randomness test circuit to execute the randomness test for each generation of the divided random numbers.
TRANSMITTER DEVICE, RECEIVER DEVICE, TRANSMITTING METHOD, AND RECEIVING METHOD (17939612)
Inventor Taewon KIM
Brief explanation
The abstract describes a transmitter device that is designed to send information to a receiver device. This information includes data that specifies the functions of the input and output terminals of the receiver device. The data consists of two types: first, there is common data that applies to both the input and output terminals, and second, there is specific data that is unique to each individual input and output terminal.
Abstract
According to one embodiment, a transmitter device is configured to transmit to a receiver device including input and output terminals first setting data specifying input and output functions of the input and output terminals. The first setting data comprises first data common to the input and output terminals and second data inherent to each of the input and output terminals.
ANOMALY DETECTION SYSTEM, METHOD AND PROGRAM, AND DISTRIBUTED CO-SIMULATION SYSTEM (17932638)
Inventor Dai ARAKI
Brief explanation
The abstract describes an anomaly detection system that uses a controller to detect anomalies in one or multiple simulators. The system starts a simulation process in each simulator and receives notifications from the simulators indicating their existence and when the simulation process ends. The controller determines if the simulator is normal based on the existence notification and detects anomalies if the simulation process ends unexpectedly.
Abstract
An anomaly detection system according to an embodiment is an anomaly detection system that executes anomaly detection of each of one or a plurality of simulators by using a controller. The controller causes each simulator to start a process of simulation, to transmit to the controller an existence notification indicative of existence of the simulator, at a predetermined cycle until an end of the process of simulation, and to transmit to the controller an end notification indicative of an end of the process if the process ends; determines that the simulator that is a transmission source of the existence notification is normal; determines that the process of the simulator that is a transmission source of the end notification ends, upon receiving the end notification; and detects that an anomaly occurs in the simulator.
MAGNETIC DISK DEVICE AND METHOD (17897062)
Inventor Kana FURUHASHI
Brief explanation
The abstract describes a magnetic disk device that includes a magnetic disk with multiple sectors, a motor to rotate the disk, a magnetic head, and a controller. The controller performs various operations, such as reading specific sectors during the disk's rotation, detecting any misalignment of the magnetic head, correcting errors in the data read from the sectors, and selectively re-reading certain sectors if needed. These operations are carried out during different revolutions of the disk.
Abstract
A magnetic disk device includes a magnetic disk including a track having a plurality of sectors, a motor configured to rotate the magnetic disk, a magnetic head, and a controller. The controller is configured to perform a first read operation of reading target sectors among the sectors of the track, with the magnetic head during a first revolution of the magnetic disk, detect an off-track state of the magnetic head during the first revolution of the magnetic disk, perform a first error correction with respect to data read from the target sectors during the first read operation, and perform a second read operation of selectively reading a part of the target sectors for which the off-track state has been detected or the first error correction is unsuccessful, with the magnetic head during a second revolution of the magnetic disk.
MAGNETIC DISK DEVICE (17903785)
Inventor Yosuke Kondo
Brief explanation
The abstract describes a magnetic disk device that consists of multiple controller chips. Each chip has a buffer control circuit and an arbitration circuit, and is responsible for controlling an actuator system. The first controller chip is connected to a buffer memory and the second controller chip. The second controller chip is connected to the first controller chip and the third controller chip. The arbitration circuit in the second controller chip manages the data transfer between the third controller chip and the first controller chip, as well as the data transfer between the first controller chip and the actuator system controlled by the second controller chip.
Abstract
According to an embodiment, each of a plurality of controller chips included in a magnetic disk device includes a buffer control circuit and an arbitration circuit, and controls a corresponding one of a plurality of actuator systems. The first controller chip is connected to a buffer memory via the buffer control circuit included in the first controller chip, and is connected to the second controller chip. The second controller chip is connected to the first controller chip and the third controller chip. The arbitration circuit included in the second controller chip performs arbitration between data transfer between the third controller chip and the first controller chip and data transfer between the first controller chip and an actuator system controlled by the second controller chip among the plurality of actuator systems.
MAGNETIC DISK APPARATUS AND METHOD (17943015)
Inventor Kenji OGAWA
Brief explanation
The abstract describes a magnetic disk apparatus that consists of a magnetic disk, a magnetic head, and a controller. The magnetic disk has a track with multiple sectors. The controller uses the magnetic head to access the magnetic disk. The first sectors on the magnetic disk contain data segments, while a third sector contains parity and information about the effectiveness of protection provided by the parity.
Abstract
According to one embodiment, a magnetic disk apparatus includes a magnetic disk, a magnetic head, and a controller. The magnetic disk is provided with a track including a plurality of first sectors. The controller accesses the magnetic disk by using the magnetic head. The plurality of first sectors includes a plurality of second sectors where data segments are written and a third sector where parity and first information indicating effectiveness or ineffectiveness of protection by the parity are written.
DISK DEVICE AND CONTROL METHOD (17903845)
Inventor Ikuko IIDA
Brief explanation
This abstract describes a disk device that includes a magnetic disk and a control circuit. The magnetic disk has a special region called shingled magnetic recording (SMR) where data is recorded in a way that adjacent tracks overlap partially. The control circuit is responsible for writing dummy data to a specific location on the magnetic disk, which is located after a position indicated by a write pointer. After the dummy data is written, the control circuit performs scan processing.
Abstract
According to one embodiment, a disk device includes a magnetic disk and a control circuit. The magnetic disk includes a shingled magnetic recording (SMR) region where data is recorded such that adjacent tracks are partially overlapped with each other by SMR. The control circuit writes, at a predetermined timing, dummy data to a location on the magnetic disk. The location is located after a position indicated by a write pointer. The control circuit executes scan processing after the writing of the dummy data.
MAGNETIC DISK DEVICE AND METHOD (17903870)
Inventor Syosuke MARUYAMA
Brief explanation
This abstract describes a method for organizing data on a magnetic disk. The disk has a first track with multiple sectors, each containing a data segment, and a second sector that stores error correction information. The controller performs two operations. In the first operation, it reads the data segments from the first sectors and stores them in a buffer memory. It also calculates a parity value from the read data segments. In the second operation, it writes the data segments back to their original sectors and writes the parity value to the second sector, all before the magnetic head reaches the starting position.
Abstract
According to an embodiment, on a first track of a magnetic disk, a plurality of first sectors in each of which a data segment is stored, and a second sector in which a parity for first error correction is stored are arranged in this order from a first position. A controller executes a first operation of sequentially reading a first data segment from each of the plurality of first sectors, and storing a group of the read first data segments in a buffer memory. The controller obtains a first parity from the group of the read first data segments. The controller starts a second operation of writing each first data segment in the group of the first data segments stored in the buffer memory, to a first sector that is a read source among the plurality of first sectors, and writing the first parity to the second sector, before the magnetic head reaches the first position.
MAGNETIC DISK DEVICE AND CONTROL METHOD OF MAGNETIC DISK DEVICE (17931707)
Inventor Toru WATANABE
Brief explanation
The abstract describes a magnetic disk device that includes a head structure with reproducing heads and thermal actuators. The device also has a control unit that can independently control the thermal actuators and adjust the spacing between the reproducing heads and the main magnetic pole gap installation portion. This is done by setting a lower rotational speed when the reproducing heads and the main magnetic pole gap installation portion come into contact with the recording medium.
Abstract
A magnetic disk device of an embodiment includes: a head structure including at least one reproducing head and main magnetic pole gap installation portion behind a flying slider and including at least two thermal actuators; and a control unit that can independently control the thermal actuators and that sets spacing of the reproducing head and the main magnetic pole gap installation portion with respect to a recording medium by setting a rotational speed at the time of contact, which rotational speed is a rotational speed of the recording medium, to be lower than a normal rotational speed when the reproducing head and the main magnetic pole gap installation portion are brought into contact with the recording medium.
MAGNETIC DISK DEVICE AND METHOD (17931647)
Inventor Fuyuki TAWADA
Brief explanation
The abstract describes a magnetic disk that has a track with a data sector. The data sector contains servo regions where servo data is written, as well as first data regions. The first data regions are located between two servo regions. The controller performs a first write operation by sequentially writing data to the first data regions using the magnetic head. After this operation, the controller performs a second write operation by retrying the writing to a second data region where a write error was detected among the first data regions. However, the controller does not retry the writing to a third data region where no write error was detected among the first data regions.
Abstract
According to an embodiment, a magnetic disk is provided with a track, and the track is provided with a data sector. The data sector includes a plurality of servo regions in which servo data is written, and a plurality of first data regions. Each of the plurality of first data regions is disposed between two servo regions of the plurality of servo regions. The controller executes a first write operation of writing data sequentially to the plurality of first data regions using the magnetic head. After the first write operation, the controller executes a second write operation of retrying the writing to a second data region in which the write error is detected among the plurality of first data regions, and not retrying the writing to a third data region in which the write error is not detected among the plurality of first data regions.
MAGNETIC DISK DEVICE (17941702)
Inventor Susumu YOSHIDA
Brief explanation
This abstract describes a magnetic disk device that includes a magnetic disk, a magnetic head, an actuator, a first stopper, an acceleration sensor, and a controller. The magnetic head is used to record and retrieve data on the magnetic disk. The actuator is responsible for moving the magnetic head by rotating around a rotation axis. The first stopper is designed to restrict the actuator from rotating in a specific direction. An acceleration sensor is used to measure applied acceleration and outputs an electric signal. The controller is responsible for applying a drive signal to the actuator when it abuts against the first stopper, and measures the electric signal from the acceleration sensor.
Abstract
According to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head, an actuator, a first stopper, an acceleration sensor, and a controller. The magnetic head is configured to record and reproduce data on and from the magnetic disk. The actuator is configured to rotate about a rotation axis to move the magnetic head. The first stopper is configured to block the actuator in rotation to restrict the actuator from rotating about the rotation axis in a first direction. The acceleration sensor is configured to output an electric signal corresponding to applied acceleration. The controller is configured to, at a time when the actuator abuts against the first stopper, apply a first drive signal to the actuator to measure a first electric signal output from the acceleration sensor, the first drive signal being for driving the actuator in the first direction.
DISK DEVICE (17941718)
Inventor Kouichi TOUKAIRIN
Brief explanation
This abstract describes a disk device that includes a magnetic disk and a rotary unit. The magnetic disk can rotate around a first axis, while the rotary unit consists of a rotary member, a bearing, and a filter. The bearing supports the rotary member and contains a lubricant, while the filter captures any components present in the lubricant. The rotary member has a hole and a communication port, with the hole accommodating the bearing and the communication port allowing the hole to connect with the outside of the rotary member. The filter is either placed in the communication port or covers it.
Abstract
According to one embodiment, a disk device includes a magnetic disk and a rotary unit. The magnetic disk is rotatable about a first rotation axis extending in the first direction. The rotary unit includes a rotary member, a bearing, and a first filter. The bearing contains a lubricant and rotatably supports the rotary member about a second rotation axis. The first filter captures at least one component contained in the lubricant. The rotary member is provided with a hole and a first communication port. The hole extends along the second rotation axis to accommodate the bearing. The first communication port extends in a direction intersecting the second rotation axis to allow the hole to be in communication with an outside of the rotary member. The first filter is disposed in the first communication port or covers the first communication port.
DISK DEVICE (17900473)
Inventor Masafumi IWASHIRO
Brief explanation
This abstract describes a disk device that has two controllers and a processor. The first controller determines how much a first actuator should move based on the difference between the current position and the desired position of a head. The second controller does the same for a second actuator. The processor performs two filtering operations to calculate filter values based on vibrations detected at different points in time. These filter values are then used to update the filter coefficients, which are further adjusted based on the difference between the desired position and the actual position of the head.
Abstract
A disk device includes a first controller configured to determine a first operation amount of a first actuator based on a difference between a current position and a target position of a head, a second controller configured to determine a second operation amount of a second actuator based on the difference, and a processor. The processor is configured to perform a first filtering to calculate a first filter value based on a vibration detected at multiple points in time and filter coefficients, perform a second filtering to generate a second filter value based on the vibration detected at each of the multiple points in time, and update the filter coefficients based on the second filter values and a difference between the target position and an updated position of the head.
MAGNETIC DISK APPARATUS AND METHOD (17931679)
Inventor Wataru TSUKAHARA
Brief explanation
The abstract describes a magnetic disk apparatus that includes a magnetic disk, a magnetic head, a temperature sensor, and a controller. The magnetic disk has a special sector called a servo sector where servo data is recorded. This servo data includes two codes called the first post code and the second post code.
During the positioning of the magnetic head, the controller uses a third post code, which is calculated based on the first and second post codes, along with the temperature detected by the temperature sensor, to make corrections. This correction helps in accurately positioning the magnetic head on the magnetic disk.
Abstract
According to embodiments, a magnetic disk apparatus includes a magnetic disk, a magnetic head, a temperature sensor, and a controller. The magnetic disk has formed therein a servo sector in which servo data including a first post code and a second post code is recorded. In the positioning of the magnetic head, the controller performs a correction using a third post code that is based on the first and second post codes and a first temperature detected by the temperature sensor.
REFERENCE VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE (17903617)
Inventor Osamu Hirabayashi
Brief explanation
The abstract describes a circuit that generates a reference voltage for a sense amplifier. The circuit includes two main components: an original reference voltage generating unit and a reference voltage correcting unit. The original reference voltage generating unit produces an initial reference voltage. The reference voltage correcting unit then decreases this original reference voltage as the temperature increases. The corrected reference voltage is then outputted to the sense amplifier. This circuit design allows for reliable operation while minimizing the impact of temperature variations.
Abstract
A reference voltage generating circuit according to an embodiment includes: an original reference voltage generating unit that generates an original reference voltage; and a reference voltage correcting unit that decreases the original reference voltage as the temperature rises and outputs the original reference voltage as a reference voltage to a sense amplifier, and thus it is possible to perform highly reliable operation while the influence of the temperature is reduced.
CAPACITOR AND ETCHING METHOD (18315123)
Inventor Kazuhito HIGUCHI
Brief explanation
The abstract describes a capacitor that consists of a conductive substrate, a conductive layer, a dielectric layer, and two internal electrodes. The substrate has two main surfaces, with one surface having recesses and the other surface having recesses in a specific region. The conductive layer covers the surfaces and recesses. The first internal electrode is connected to the conductive layer on one surface, while the second internal electrode is connected to the substrate in the specific region on the other surface.
Abstract
According to an embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer therebetween, and first and second internal electrodes. The substrate has first and second main surfaces. One partial region of the first main surface is provided with first recesses. A region of the second surface corresponding to a combination of the one partial region and another partial region is provided with second recesses. The conductive layer covers the main surfaces and side walls and bottom surfaces of the recesses. The first internal electrode is provided on the one partial region and electrically connected to the conductive layer. The second internal electrode is provided on the another partial region and electrically connected to the substrate.
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE (17929419)
Inventor Tatsuo SHIMIZU
Brief explanation
This abstract describes a method for manufacturing a semiconductor device using silicon carbide. The process involves creating a mask material with an opening on the silicon carbide layer and implanting carbon into the layer. Then, a second mask material is formed with openings inside the first carbon region, and a first impurity is implanted into the silicon carbide layer. Finally, heat treatment is performed at a high temperature.
Abstract
A method for manufacturing a semiconductor device according to an embodiment includes forming a first mask material having a first opening on a surface of a silicon carbide layer, performing first ion implantation of forming a first carbon region by implanting carbon (C) into the silicon carbide layer using the first mask material as a mask, forming, on the surface of the silicon carbide layer, a second mask material in which both end portions in a first direction parallel to the surface have second openings disposed inside both end portions in the first direction of the first carbon region, performing second ion implantation of forming a first impurity region by implanting a first impurity into the silicon carbide layer using the second mask material as a mask, and performing heat treatment at 1600° C. or higher.
SEMICONDUCTOR DEVICE (17903846)
Inventor Atsushi TANAKA
Brief explanation
This abstract describes a semiconductor device that consists of two frames, each holding a chip. The frames are spaced apart from each other, and there is a joint terminal located above the second chip. The first frame has a terminal portion that extends towards the second frame, while the joint terminal has a second terminal portion that extends towards the first frame. The second terminal portion has two projecting portions that project towards the first frame and are spaced apart from each other. The ends of these projecting portions are joined to the terminal portion of the first frame.
Abstract
According to one embodiment, a semiconductor device includes: a first frame; a first chip on the first frame; a second frame spaced apart from the first frame in a first direction; a second chip on the second frame; and a first joint terminal above the second chip. The first frame includes a first terminal portion extending toward the second frame. The first joint terminal includes a second terminal portion extending toward the first frame. The second terminal portion includes first and second projecting portions each of which projects toward the first frame and which are spaced apart from each other in a second direction. An end portion of the first projecting portion and an end portion of the second projecting portion are each joined on the first terminal portion.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (17942019)
Inventor Naoki OKAWA
Brief explanation
This abstract describes a semiconductor device that includes a lead frame with a terminal, a semiconductor element placed on one side of the lead frame, and a package member that covers both the lead frame and the semiconductor element. The terminal has three parts: a back-side portion located on the opposite side of the lead frame and exposed from the package member in a vertical direction, a lateral-side portion positioned between the front side of the lead frame and the back-side portion and exposed from the package member in a horizontal direction, and a recessed portion located between the lateral-side portion and the back-side portion.
Abstract
According to one embodiment, a semiconductor device includes a lead frame including a terminal; an element on a first surface of the lead frame; and a package member covering the lead frame and the semiconductor element. The terminal includes a back-side portion provided on a side of a second surface of the lead frame and exposed from the package member in a first direction perpendicular to the first surface, the second surface being opposite to the first surface, a lateral-side portion provided between the first surface and the back-side portion in the first direction and exposed from the package member in a second direction parallel to the first surface, and a recessed portion provided between the lateral-side portion and the back-side portion in the first direction.
SEMICONDUCTOR DEVICE (17902610)
Inventor Kodai OGAWA
Brief explanation
The abstract describes a semiconductor device that consists of an element region and an outer peripheral region. The outer peripheral region includes a semiconductor layer with two faces, a first annular conductor surrounding the element region on one face of the semiconductor layer, a second annular conductor surrounding the first annular conductor on the same face, and at least one first connection conductor connecting the first and second annular conductors.
Abstract
A semiconductor device according to an embodiment includes: an element region; and an outer peripheral region surrounding the element region, the outer peripheral region including a semiconductor layer having a first face and a second face opposite to the first face, a first annular conductor provided on a side of the first face with respect to the semiconductor layer and surrounding the element region, a second annular conductor provided on the side of the first face with respect to the semiconductor layer and surrounding the first annular conductor, and at least one first connection conductor provided between the first annular conductor and the second annular conductor and connected to the first annular conductor and the second annular conductor.
SEMICONDUCTOR DEVICE (17942510)
Inventor Yuning TSAI
Brief explanation
This abstract describes a semiconductor device that includes a package substrate, a semiconductor package, two semiconductor chips, and a connection component. The package substrate has a package member and a first conductive portion. The semiconductor package is located inside the package member and is connected to the first conductive portion. The first semiconductor chip and the second semiconductor chip are also located inside the package member and have their own terminals. The connection component is responsible for connecting the terminals of the semiconductor chips to the first conductive portion inside the package member.
Abstract
According to one embodiment, a semiconductor device includes a package substrate including a package member and a first conductive portion; a semiconductor package provided on a first surface of the package substrate inside the package member and coupled to the first conductive portion; a first semiconductor chip provided on the first surface of the package substrate inside the package member and including a first terminal; a second semiconductor chip provided on the first surface of the package substrate inside the package member and including a second terminal; and a connection component that couples the first and second terminals to the first conductive portion inside the package member.
SEMICONDUCTOR DEVICE (17901890)
Inventor Kenichi MATSUSHITA
Brief explanation
This abstract describes a semiconductor device that consists of several components. It includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a second electrode, a conductive part, and a fourth semiconductor region.
The first semiconductor region is positioned above the first electrode, while the second semiconductor region is located on top of the first semiconductor region. The third semiconductor region is then placed on the second semiconductor region.
The second electrode is situated on both the second and third semiconductor regions, and it is electrically connected to them.
The conductive part of the device comprises a first conductive region and a second conductive region. The first conductive region faces the first to third semiconductor regions through an insulating film. The second conductive region, on the other hand, surrounds the second electrode.
Finally, the fourth semiconductor region is positioned around the second semiconductor region and is electrically connected to it.
Abstract
A semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a second electrode, a conductive part, and a fourth semiconductor region. The first semiconductor region is located above the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The second electrode is located on the second and third semiconductor regions. The second electrode is electrically connected with the second and third semiconductor regions. The conductive part includes a first conductive region and a second conductive region. The first conductive region faces the first to third semiconductor regions via an insulating film. The second conductive region is located around the second electrode. The fourth semiconductor region is located around the second semiconductor region. The fourth semiconductor region is electrically connected with the second semiconductor region.
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CIRCUIT (17941756)
Inventor Tomoko MATSUDAI
Brief explanation
The abstract describes a semiconductor device that includes different regions and electrodes. The device has a transistor region with three trenches, each containing a gate electrode. There is also a diode region with a trench and a conductive layer. A boundary region is present between the transistor and diode regions and includes a trench with a gate electrode. The device has three electrode pads, each connected to different gate electrodes.
Abstract
A semiconductor device according to the embodiment includes: a transistor region including a first trench, a first gate electrode provided in the first trench, a second trench, a second gate electrode provided in the second trench, a third trench, and a third gate electrode provided in the third trench; a diode region including a fifth trench and a conductive layer provided in the fifth trench; a boundary region including a fourth trench and a fourth gate electrode provided in the fourth trench, the boundary region being provided between the transistor region and the diode region; a first electrode pad electrically connected to the first gate electrode; a second electrode pad electrically connected to the second gate electrode; and a third electrode pad electrically connected to the third gate electrode and the fourth gate electrode.
SEMICONDUCTOR DEVICE (17889971)
Inventor Shunsuke ASABA
Brief explanation
This abstract describes a semiconductor device that consists of multiple layers and electrodes. The device includes a first semiconductor layer with a termination region, located between the first and second electrodes. The second semiconductor layer is positioned between the first semiconductor layer and the second electrode, and it has a certain thickness in a specific direction. The termination region comprises the third to fifth semiconductor layers. The third semiconductor layer surrounds the second semiconductor layer and has a different thickness in the same direction. The fourth semiconductor layer surrounds the third semiconductor layer and has another thickness in the same direction. The second thickness of the second semiconductor layer is greater than the first and third thicknesses. Finally, the fifth semiconductor layer is connected to the second to fourth semiconductor layers.
Abstract
A semiconductor device includes a first semiconductor layer of a first conductivity type, second to fifth semiconductor layers of a second conductivity type, and first and second electrodes. The first semiconductor layer is provided between the first and second electrodes, and includes a termination region. The second semiconductor layer is provided between the first semiconductor layer and the second electrode, and has a first thickness in a first direction from the first electrode toward the second electrode. The third to fifth semiconductor layers are provided in the termination region. The third semiconductor layer surrounds the second semiconductor layer, and has a second thickness in the first direction. The fourth semiconductor layer surrounds the third semiconductor layer, and has a third thickness in the first direction. The second thickness is greater than the first and third thicknesses. The fifth semiconductor layer is connected to the second to fourth semiconductor layers.
SEMICONDUCTOR DEVICE (17941725)
Inventor Hiroshi KONO
Brief explanation
The abstract describes a semiconductor device made of silicon carbide. It consists of a trench in the silicon carbide layer, with a gate electrode inside the trench. There are four silicon carbide regions arranged in a specific order, with the first and third regions having one type of conductivity and the second and fourth regions having another type of conductivity. Above these regions, there are four additional silicon carbide regions arranged in a specific order, with the fifth and seventh regions having a higher conductivity than the first and third regions, and the sixth and eighth regions having a higher conductivity than the second and fourth regions. Finally, there is a ninth silicon carbide region of the first conductivity type above the fifth to eighth regions.
Abstract
A semiconductor device of an embodiment includes a trench in a silicon carbide layer and extending in a first direction, a gate electrode in the trench, first, second, third and fourth silicon carbide regions disposed in the silicon carbide layer in the first direction in this order, first and third silicon carbide regions having first conductive type, second and fourth silicon carbide regions having second conductive type, fifth, sixth, seventh and eighth silicon carbide regions disposed in the silicon carbide layer in the first direction in this order above the first to fourth silicon carbide regions, fifth and seventh silicon carbide regions having first conductive type higher than first and third silicon carbide regions, sixth and eighth silicon carbide regions having second conductive type higher than second and fourth silicon carbide regions, a ninth silicon carbide region of a first conductive type above the fifth to eighth silicon carbide regions.
METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE (17892809)
Inventor Takuma SUZUKI
Brief explanation
The abstract describes a method for manufacturing a silicon carbide semiconductor device. The method involves several steps, including forming a semiconductor layer on a substrate, creating a first semiconductor region by introducing an impurity of a certain type into the semiconductor layer, and forming two semiconductor pillar portions by introducing an impurity of a different type into specific locations within the first semiconductor region. These pillar portions have different concentrations of the impurity and are positioned next to each other. The method also includes repeating these steps to create additional layers, regions, and pillar portions.
Abstract
According to one embodiment, a method for manufacturing a silicon carbide semiconductor device. The method includes forming a semiconductor layer on a substrate. The method includes forming a first semiconductor region by implanting an impurity of a first conductivity type into the semiconductor layer. The first semiconductor region has a first concentration of the first conductivity type. The method includes forming a first semiconductor pillar portion and a second semiconductor pillar portion by implanting an impurity of a second conductivity type into a plurality of locations of the first semiconductor region. The first semiconductor pillar portion is of the first conductivity type. The second semiconductor pillar portion has a second concentration of the second conductivity type and is adjacent to the first semiconductor pillar portion. The method includes repeating the forming of the semiconductor layer, forming of the first semiconductor region, and the first and second semiconductor pillar portions.
SILICON CARBIDE SEMICONDUCTOR DEVICE (17897753)
Inventor Takuma SUZUKI
Brief explanation
This abstract describes a silicon carbide semiconductor device that consists of various components such as electrodes and semiconductor layers. The device includes multiple semiconductor pillar regions of different conductivity types, with each region having a specific impurity concentration. The first semiconductor pillar regions have a lower impurity concentration in the first region and a higher impurity concentration in the second region. Similarly, the second semiconductor pillar regions have a lower impurity concentration in the third region and a higher impurity concentration in the fourth region.
Abstract
According to one embodiment, a silicon carbide semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, a plurality of first semiconductor pillar regions of a first conductivity type, a second semiconductor pillar region of a second conductivity type. The first semiconductor pillar regions include a first region has a first impurity concentration and second region has a second impurity concentration higher than the first impurity concentration. The second semiconductor pillar regions include a third region has a third impurity concentration and a fourth region has a fourth impurity concentration higher than the third impurity concentration.
SEMICONDUCTOR DEVICE (17940373)
Inventor Shunsuke ASABA
Brief explanation
This abstract describes a semiconductor device that consists of different regions made of silicon carbide. The device includes a first region with three sub-regions, a second region with higher impurity concentration than the first region, and a third region with even higher impurity concentration than the second region. On top of the first region, there is a second region made of silicon carbide, which includes a fourth region in contact with the second region and a fifth region in contact with the third region. The fifth region has a higher impurity concentration than the fourth region. On top of the second silicon carbide region, there is a third region made of silicon carbide of a different conductive type. The device also includes a first gate electrode, a first electrode in contact with the second and third silicon carbide regions, and a second electrode.
Abstract
A semiconductor device includes: a first conductive type first silicon carbide region including a first region, a second region and a third region both on the first region, the second region having impurity concentration equal to or higher than the first region, and the third region having impurity concentration higher than the second region; a second conductive type second silicon carbide region on the first silicon carbide region, the second silicon carbide region including a fourth region in contact with the second region and a fifth region in contact with the third region, and the fifth region having impurity concentration higher than the fourth region; a third silicon carbide region of a first conductive type on the second silicon carbide region; a first gate electrode; a first electrode having a first portion in contact with the second silicon carbide region and the third silicon carbide region; and a second electrode.
SEMICONDUCTOR DEVICE (17942562)
Inventor Toru SUGIYAMA
Brief explanation
This abstract describes a semiconductor device that consists of a substrate, two transistors, and a gate control circuit. The first transistor is of a depletion type, while the second transistor is of an enhancement type. Both transistors are placed on the substrate and have a channel region of the same conductivity type. They are connected in series, with the channel region of the first transistor containing a nitride semiconductor. The second transistor operates through an inversion layer induced in its channel region. The gate control circuit is connected to the gate electrode of the second transistor. The substrate has a gate terminal and a power supply terminal. The gate terminal is connected to the gate electrode of the first transistor, while the power supply terminal is connected to a connection point between the first and second transistors.
Abstract
A semiconductor device includes a substrate, a first transistor of a depletion type, a second transistor of an enhancement type, and a gate control circuit. The first and second transistors are provided on the substrate and each include a channel region of a first conductivity type. The first and second transistors are connected in series. The channel region of the first transistor includes a nitride semiconductor. The second transistor operates via an inversion layer of a second conductivity type induced in the channel region thereof. The gate control circuit is connected to a gate electrode of the second transistor. The substrate includes a gate terminal and a power supply terminal. The gate terminal is electrically connected to a gate electrode of the first transistor. The power supply terminal is electrically connected to a connection part between the first transistor and the second transistor.
SEMICONDUCTOR DEVICE (17939025)
Inventor Kazuki Minamikawa
Brief explanation
This abstract describes a semiconductor device that consists of various components such as electrodes, a semiconductor part, a structure body, and an insulating part. The semiconductor part is made up of different regions, and the structure body includes a gate part and a dummy part. The gate part has one or more gate electrodes, while the dummy part has two or more dummy electrodes. These gate and dummy parts are arranged alternately. An insulating part is present between the gate electrode and the semiconductor part. The gate part is located in the fourth semiconductor region. The second electrode is connected to a first potential, while the gate electrode is connected to a second potential that is higher than the first potential. Additionally, the dummy electrode next to the gate part is connected to a third potential that is also higher than the first potential.
Abstract
A semiconductor device includes first and second electrodes, a semiconductor part, a structure body, and an insulating part. The semiconductor part includes first to fifth semiconductor regions. The structure body includes a gate part and a dummy part. The gate part includes at least one gate electrode. The dummy part includes at least two dummy electrodes. The gate part and the dummy part are alternately arranged. The insulating part is located between the gate electrode and the semiconductor part. The gate part is located in the fourth semiconductor region. A first potential is applied to the second electrode. A second potential that is greater than the first potential is applied to the gate electrode. A third potential that is greater than the first potential is applied to the dummy electrode located at a position next to the gate part.
SEMICONDUCTOR DEVICE (17870045)
Inventor Yuhki FUJINO
Brief explanation
The abstract describes a semiconductor device that consists of various components such as electrodes, semiconductor regions, conductive parts, and a gate electrode. These components are arranged in a specific configuration to enable the device to function properly. The abstract does not provide specific details about the purpose or application of the device.
Abstract
According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions a plurality of conductive parts, and a gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The conductive parts are located in the first semiconductor region with insulating parts interposed. The second semiconductor region is located on a portion of the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The gate electrode is located on the second semiconductor region with a gate insulating layer interposed. The second electrode is located on the second and third semiconductor regions, and the gate electrode and electrically connected with the second and third semiconductor regions, and conductive parts.
SEMICONDUCTOR DEVICE (17882335)
Inventor Takafumi DEGUCHI
Brief explanation
The abstract describes a semiconductor device that includes various components such as electrodes, semiconductor regions, conductive parts, and gate electrodes. These components are arranged in a specific configuration to enable the device to function properly. The abstract does not provide any specific details about the purpose or application of the semiconductor device.
Abstract
According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a first conductive part, a first gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The first conductive part is located in the first semiconductor region with a first insulating part interposed. The first gate electrode is located on the first conductive part with a first inter-layer insulating part interposed. The first gate electrode faces the second semiconductor region via a first gate insulating layer. The second electrode is located on the second and third semiconductor regions and electrically connected with the second and third semiconductor regions, and the first conductive part.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE (17901312)
Inventor Emiko INOUE
Brief explanation
This abstract describes a semiconductor device that consists of several layers. The device includes a semiconductor layer, a conductive film, a first insulating film, and a second insulating film. The semiconductor layer has two regions - an element region where a semiconductor element is located, and a termination region that surrounds the element region. The conductive film is present on both the element region and the termination region. The first insulating film is on top of the conductive film, covering the termination region and a part of the element region adjacent to the termination region. The second insulating film, which has lower resistivity than the first insulating film but higher resistivity than the conductive film, is then placed on top of the first insulating film.
Abstract
A semiconductor device includes a semiconductor layer, a conductive film, a first insulating film, and a second insulating film. The semiconductor layer has an element region where a semiconductor element is provided and a termination region surrounding the element region. The conductive film is provided on the element region and the termination region. The first insulating film is provided on the conductive film on the termination region and a portion of the element region adjacent to the termination region. The second insulating film that is lower in resistivity than the first insulating film, and higher in resistivity than the conductive film, is provided on the first insulating film.
SEMICONDUCTOR DEVICE (18007227)
Inventor Yuta SUGIMOTO
Brief explanation
This abstract describes a semiconductor device that consists of multiple layers and electrodes. The device includes a semiconductor substrate, on which a first semiconductor layer is placed. On top of the first layer, a second semiconductor layer is added. The second layer has a first region with a certain type of impurity and a second region with a higher concentration of the same impurity. The device also has a first electrode on the second semiconductor layer, a second electrode arranged alongside the first electrode on the front surface of the second layer, and a third electrode between the first and second electrodes on the second layer. On the back surface of the semiconductor substrate, there is a metal layer, and inside the substrate, there is a conductor that connects the first electrode and the metal layer through the second semiconductor layer.
Abstract
A semiconductor device includes a semiconductor substrate, a first semiconductor layer on the semiconductor substrate, a second semiconductor layer on the first semiconductor layer, a first electrode on the second semiconductor layer, a second electrode arranged with the first electrode along a front surface of the second semiconductor layer, a third electrode between the first and second electrodes on the second semiconductor layer, a metal layer on a back surface of the semiconductor substrate at a side opposite to the first semiconductor layer, and a conductor extending inside the semiconductor substrate and electrically connecting the first electrode and the metal layer via the second semiconductor layer. The second semiconductor layer includes a first region including a first-conductivity-type impurity, and a second region including a first-conductivity-type impurity with a higher concentration than the first region; and the second region is between the conductor and the first electrode.
SEMICONDUCTOR DEVICE (17891671)
Inventor Hiroshi KONO
Brief explanation
This abstract describes a semiconductor device that consists of several layers and electrodes. The device includes a first electrode and four semiconductor layers - the first, second, third, and fourth semiconductor layers. The third electrode is positioned between the first, second, and third semiconductor layers using an insulating film. The fourth semiconductor layer is located between the insulating film and the first and second semiconductor layers. Importantly, the impurity concentration in the fourth semiconductor layer is lower than the impurity concentration in the first and second semiconductor layers.
Abstract
A semiconductor device includes a first electrode, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a second electrode, a third electrode, and a fourth semiconductor layer. The third electrode is located among the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer via an insulating film. The fourth semiconductor layer is located between the insulating film and the first semiconductor layer and between the insulating film and the second semiconductor layer. An impurity concentration of the fourth semiconductor layer is less than an impurity concentration of the first semiconductor layer and an impurity concentration of the second semiconductor layer.
SEMICONDUCTOR DEVICE (17901632)
Inventor Daiki YOSHIKAWA
Brief explanation
This abstract describes a semiconductor device that consists of multiple electrodes and semiconductor regions. The device includes a third electrode that is positioned on top of a second semiconductor region, and a fourth semiconductor region located on a portion of the third semiconductor region. The third electrode faces the third semiconductor region through a first insulating film in a specific direction. Additionally, there is a first contact region located on a portion of the third semiconductor region, which is arranged with the third electrode in the same direction. The fifth semiconductor region is divided into two portions, one arranged in the same direction as the first contact region and the other arranged in a different direction. The boundary between the first insulating film and the third semiconductor region separates the second and fourth semiconductor regions.
Abstract
A semiconductor device includes first to third electrodes, first to fifth semiconductor regions, and a first contact region. The third semiconductor region is located on the second semiconductor region. The fourth semiconductor region is located on a portion of the third semiconductor region. The third electrode extends in a second direction and faces the third semiconductor region via a first insulating film in a third direction. The first contact region is located on a portion of the third semiconductor region and is arranged with the third electrode in the third direction. The fifth semiconductor region includes a first portion and a second portion. The first portion is arranged in the third direction with a boundary portion between the first insulating film and the third semiconductor region between the second semiconductor region and the fourth semiconductor region. The second portion is arranged in the second direction with the boundary portion.
SEMICONDUCTOR DEVICE (17901732)
Inventor Katsuhisa TANAKA
Brief explanation
This abstract describes a semiconductor device that consists of various regions and electrodes. It includes a first electrode, a first semiconductor region of a certain conductivity type with two sub-regions, a second semiconductor region of a different conductivity type, a third semiconductor region of the same conductivity type as the first region, a gate electrode, a fourth semiconductor region of the different conductivity type located between the first region and the gate electrode, fifth semiconductor regions of the different conductivity type with a certain concentration of impurities, and sixth semiconductor regions of the different conductivity type with a lower concentration of impurities compared to the fifth regions. The fifth regions surround the fourth region in a specific plane perpendicular to a certain direction, while the sixth regions surround the second region in a different plane perpendicular to the same direction. The device also includes a second electrode.
Abstract
A semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type having first and second regions, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a fourth semiconductor region of the second conductivity type between the first region and the gate electrode, fifth semiconductor regions of the second conductivity type, each having a first concentration of impurities of the second conductivity type, sixth semiconductor regions of the second conductivity type, each having a second concentration of impurities of the second conductivity type that is lower than the first concentration, and a second electrode. The fifth semiconductor regions are located around the fourth semiconductor region in a first plane perpendicular to the first direction. The sixth semiconductor regions are located around the second semiconductor region in a second plane perpendicular to the first direction.
SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR (17823088)
Inventor Tatsuo SHIMIZU
Brief explanation
This abstract describes a semiconductor device made of silicon carbide. The device has a layered structure with a first surface and a second surface. It also includes trenches and different regions of n-type and p-type materials within the silicon carbide layer. The eighth regions are specifically located between certain regions and trenches, and they are arranged in a repeated pattern in one direction.
Abstract
A semiconductor device according to an embodiment includes: a silicon carbide layer having a first surface and second surface parallel to a first direction and a second direction perpendicular to the first direction; a first trench and second trench extending in the first direction; an n-type first region in the silicon carbide layer; a p-type second region between the first region and the first surface in the silicon carbide layer; an n-type third region between the second region and the first surface in the silicon carbide layer; a p-type sixth region between the first region and the first trench in the silicon carbide layer; and a p-type eighth region located between the second region and the first trench, between the third region and the first trench, and in contact with the sixth region in the silicon carbide layer. The eighth regions are repeatedly disposed in the first direction.
SEMICONDUCTOR DEVICE (17903894)
Inventor Tatsuya Shiraishi
Brief explanation
The abstract describes a semiconductor device that consists of several layers and components. It includes a first electrode, a first semiconductor layer, a second semiconductor layer, and a first semiconductor region. The device also has a first insulating film and a second electrode, which is placed in a trench and faces the first semiconductor region. Additionally, there is a second insulating film between the second electrode and the first semiconductor region. The abstract mentions that the dielectric constant of the upper part of the first insulating film is higher than that of the lower part.
Abstract
A semiconductor device of an embodiment includes a first electrode, a first semiconductor layer of first conductivity type provided on the first electrode; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench reaching the second semiconductor layer from above the first semiconductor region, a dielectric constant of an upper part of the first insulating film being higher than a dielectric constant of a lower part of the first insulating film; a second electrode provided in the trench, the second electrode facing the first semiconductor region; and a second insulating film provided between the second electrode and the first semiconductor region, the second insulating film being provided on the first insulating film in the trench.
SEMICONDUCTOR DEVICE (17931508)
Inventor Kaori FUSE
Brief explanation
This abstract describes a semiconductor device that consists of a semiconductor part, electrodes, and insulating films. The device has two electrodes, one on the back surface and one on the front surface of the semiconductor part. Additionally, there are two more electrodes that extend into the device from the front surface. These electrodes are insulated from the semiconductor part by insulating films.
The semiconductor part itself is made up of four layers. The first layer, which has a certain type of conductivity, is positioned between the first and second electrodes. The second layer, which has a different type of conductivity, is located between the first layer and the second electrode. The third layer, also with the same conductivity type as the second layer, is partially situated between the second layer and the second electrode. Finally, the fourth layer, which has the same conductivity type as the first layer, is present within the second layer but is separate from the third layer.
Abstract
A semiconductor device includes a semiconductor part, first to fourth electrodes, and first and second insulating film. The first and second electrodes are provided on back and front surfaces of the semiconductor part, respectively. The third and fourth electrodes each extend into the semiconductor device form the front surface side. The third and fourth electrodes are electrically insulated from the semiconductor part by insulating films. The semiconductor part includes first to fourth layers. The first layer of a first conductivity type extends between the first and second electrodes. The second layer of a second conductivity type is provided between the first layer and the second electrode. The third layer of the second conductivity type is partially provided between the second layer and the second electrode. The fourth layer of the first conductivity type is provided in the second layer. The fourth layer is apart from the third layer.
MULTILAYER JUNCTION PHOTOELECTRIC CONVERSION ELEMENT AND METHOD FOR MANUFACTURING THE SAME (18317466)
Inventor Takeshi GOTANDA
Brief explanation
The abstract states that the present embodiment offers a semiconductor element that can efficiently generate power and has a long lifespan.
Abstract
The present embodiment provides a semiconductor element that can generate power with high efficiency and has high durability.
PHOTODETECTOR (17891799)
Inventor Kensuke YASUDA
Brief explanation
The abstract describes a photodetector that consists of multiple cell regions arranged in an array. These cell regions are separated by an element isolation region. Each cell region includes a semiconductor layer with two faces, a first semiconductor region of one conductivity type, a second semiconductor region of the opposite conductivity type, an electrode in contact with the second semiconductor region, and multiple metal regions surrounded by the first and second semiconductor regions.
Abstract
A photodetector according to an embodiment includes a plurality of cell regions disposed in an array, and an element isolation region provided between the cell regions, each of the cell regions including: a semiconductor layer having a first face and a second face opposite to the first face; a first semiconductor region of a first conductivity type provided in the semiconductor layer; a second semiconductor region of a second conductivity type provided between the first semiconductor region and the first face; an electrode in contact with the second semiconductor region; and a plurality of metal regions having a part surrounded by the first semiconductor region and another part surrounded by the second semiconductor region.
SECONDARY BATTERY (17932422)
Inventor Kuniaki Yamamoto
Brief explanation
The abstract describes a secondary battery that includes a container with a lid, an electrode assembly, an output terminal, and a lead. The electrode assembly is housed inside the container and has a current collecting tab. The output terminal is located in the lid and is connected to the current collecting tab through a lead. The output terminal has a connection part that can be connected to another component, an exposed part, and a through hole in the exposed part. The exposed part is joined to the lead.
Abstract
According to one embodiment, a secondary battery includes an outer container having a lid body, an electrode assembly including a current collecting tab and housed in the outer container, an output terminal provided in the lid body, and a lead provided between the electrode assembly and the lid body to electrically connect the current collecting tab and the output terminal. The output terminal includes a connection part that is exposed to the outside of the lid body and connectable with a connection member, an exposed part exposed to the outside of the lid body, and a through hole formed in the exposed part, and the exposed part is joined to the lead.
SECONDARY BATTERY (17932415)
Inventor Kuniaki Yamamoto
Brief explanation
The abstract describes a secondary battery that consists of an outer container with a lid, an electrode assembly, and an output terminal. The lid has a first external thread portion, and there is a lead inside the outer container connecting the electrode assembly to the lid. The lead includes a plate-shaped junction that faces the lid and has an internal thread portion. The first external thread portion of the output terminal is screwed into the internal thread portion through the lid to establish an electrical connection with the junction.
Abstract
According to one embodiment, a secondary battery includes an outer container including a lid body, an electrode assembly, an output terminal provided in the lid and including a first external thread portion and a lead provided between the electrode assembly and the lid inside the outer container, and the lead includes a plate-shaped junction opposing the lid body and an internal thread portion provided to penetrate the junction, and the first external thread portion of the output terminal is threaded into the internal thread portion through the lid to be electrically connected to the junction.
SECONDARY BATTERY (17932410)
Inventor Kuniaki Yamamoto
Brief explanation
The abstract describes a secondary battery that consists of an outer container with long side walls and a lid. Inside the container, there is an electrode assembly with electrodes and a current collecting tab. The battery also has an output terminal and a lead connected to it. The lead has two extending portions that run along the inner surfaces of the long side walls. The extending portions are covered by insulators.
Abstract
According to one embodiment, a secondary battery includes an outer container including long side walls and a lid, an electrode assembly including a group of electrodes and a current collecting tab and accommodated in the outer container, an output terminal, a lead including a junction opposing the lid and connected to the output terminal, a first extension portion extending from the junction along an inner surface of one of the long side walls and a second extending portion extending from the junction along an inner surface of the other long side wall, a first insulator including an inner surface engaged with the outer surface of the first extending portion, and a second insulator including an inner surface engaged with the outer surface of the second extending portion.
ROTOR AND ROTATING ELECTRICAL MACHINE (18325935)
Inventor Hidenori UCHIDA
Brief explanation
The abstract describes a rotor design that includes different bridge portions for each magnetic pole of the rotor iron core. These bridge portions are arranged in a way that the interval between them decreases from the outer side to the inner side of the rotor iron core. The inner and outer circumferential side bridge portions are connected to each other.
Abstract
According to one embodiment, a rotor includes, for each magnetic pole of a rotor iron core, first and second outer circumferential side bridge portions, and first and second inner circumferential side bridge portions. The first and second outer circumferential side bridge portions are provided such that a mutual interval is decreased from an outer circumferential side of the rotor iron core to an inner circumferential side. The first and second inner circumferential side bridge portions are provided such that a mutual interval is decreased from the outer circumferential side of the rotor iron core to the inner circumferential side, and are connected to the first and second outer circumferential side bridge portions, respectively.
DRIVER CIRCUIT AND POWER CONVERSION SYSTEM (17903793)
Inventor Yuji YAMANAKA
Brief explanation
The abstract describes a driver circuit that consists of three main components: a drive circuit, a monitoring circuit, and a control circuit. The drive circuit includes a current source that is responsible for driving a switching element. The monitoring circuit keeps track of the time it takes for the voltage drop across the switching element to change from its starting value to its ending value. The control circuit adjusts the current value of the first current source based on the monitored time period in order to achieve a desired rate of change (slew rate) for the voltage drop across the switching element.
Abstract
A driver circuit includes a drive circuit, a monitoring circuit, and a control circuit. The drive circuit includes a first current source and drives a switching element when the first current source is connected to a control terminal of the switching element. The monitoring circuit monitors a period of time from a start to an end of a change in a voltage drop across the switching element. The control circuit controls a current value of the first current source based on the monitored period of time such that a slew rate of the voltage drop across the switching element approaches a target value.
SEMICONDUCTOR DEVICE AND MOTOR DRIVE SYSTEM (17901318)
Inventor Kazuya KOBAYASHI
Brief explanation
This abstract describes a semiconductor device that consists of five terminals and two circuits: an amplification circuit and a switching circuit. The amplification circuit has two input ends and one output end. The switching circuit is responsible for changing the connections between the input ends and the terminals. In the first state, the first input end is connected to the first terminal and isolated from the third terminal, while the second input end is connected to the second terminal and isolated from the fourth terminal. In the second state, the connections are reversed, with the first input end connected to the third terminal and isolated from the first terminal, and the second input end connected to the fourth terminal and isolated from the second terminal.
Abstract
A semiconductor device includes first to fifth terminals, an amplification circuit including a first input end connectable to the first terminal and the third terminal, a second input end connectable to the second terminal and the fourth terminal, and an output end, and a switching circuit. The switching circuit is configured to switch between a first state in which the first input end is connected to the first terminal and insulated from the third terminal and the second input end is connected to the second terminal and insulated from the fourth terminal, and a second state in which the first input end is connected to the third terminal and insulated from the first terminal and the second input end is connected to the fourth terminal and insulated from the second terminal.
DETECTION CIRCUIT AND COMMUNICATION SYSTEM (17943007)
Inventor Toyoaki UO
Brief explanation
The abstract describes a detection circuit that includes two insulating elements, two transmission test circuits, and a reception test circuit. The first transmission test circuit is connected to the first insulating element, while the second transmission test circuit is connected to the second insulating element. The reception test circuit is connected to both insulating elements and outputs a detection signal based on the difference in voltage between the two insulating elements.
Abstract
According to one embodiment, there is provided a detection circuit including a first insulating element, a second insulating element, a first transmission test circuit, a second transmission test circuit, and a reception test circuit. The first transmission test circuit is connected to the first insulating element. The second transmission test circuit is connected to the second insulating element. The reception test circuit is connected to each of the first insulating element and the second insulating element to output a detection signal corresponding to a difference between a voltage of the first insulating element and a voltage of the second insulating element.
COMMUNICATION RELAY APPARATUS SND STORAGE MEDIUM STORING COMPUTER PROGRAM (18153983)
Inventor Toshihiro Tango
Brief explanation
The abstract describes a communication relay apparatus and a computer program that aim to enhance communication quality with a mobile station. The apparatus includes a detector that identifies the presence of a mobile station within a specific area covered by multiple remote units. A controller then manages the communication resources utilized by these remote units to communicate with the mobile station, based on the detection outcome from the detector.
Abstract
A communication relay apparatus and a storage medium storing a computer program that allow improvement of a quality of communication with a mobile station are provided. A communication relay apparatus includes a detector and a controller. The detector detects a mobile station located in a cover area formed by a plurality of remote units. The controller controls, for the remote units, communication resources used by the remote units for communication with the mobile station, based on a detection result of the detector.
FRAME SYNCHRONIZATION APPARATUS (18310695)
Inventor Yukihiro SUGAWARA
Brief explanation
The abstract describes a device that synchronizes frames in a video transmission. It includes a reception unit that receives packet data containing video data and a timestamp. The frame memory stores the packet data. The time generation unit generates a time based on a synchronization signal. The reception time acquisition unit determines the reception time of packet data that meets a certain condition based on the generated time. The timestamp acquisition unit extracts the timestamp from the packet data that meets the condition. The control unit reads the packet data from the frame memory based on the difference between the reception time and the time indicated by the timestamp.
Abstract
A frame synchronization apparatus according to an embodiment includes a reception unit, a frame memory, a time generation unit, a reception time acquisition unit, a timestamp acquisition unit, and a control unit. The reception unit is configured to receive packet data including video data and a timestamp. The frame memory is configured to store the packet data. The time generation unit is configured to generate a time based on a reference synchronization signal. The reception time acquisition unit is configured to acquire a reception time of packet data satisfying a condition based on the time. The timestamp acquisition unit is configured to acquire a timestamp from the packet data satisfying the condition. The control unit is configured to read packet data from the frame memory in accordance with a variation in a difference between the reception time and a time indicated by the timestamp.
KEY MANAGEMENT DEVICE, QUANTUM CRYPTOGRAPHY COMMUNICATION SYSTEM, AND COMPUTER PROGRAM PRODUCT (17821281)
Inventor Ririka TAKAHASHI
Brief explanation
The abstract describes a device that manages encryption keys. It has processors that can determine the type of data requested by an application, generate a response message containing a random number or an encryption key, and supply this response message to the application. The device uses quantum key distribution (QKD) to share encryption keys securely over a communication network.
Abstract
A key management device according to an embodiment includes one or more hardware processors configured to function as a determination unit, a generation unit, and a supply unit. The determination unit determines a type of request data requested by a request message transmitted from an application that performs encrypted data communication. The generation unit generates a response message including at least one of a random number and an encryption key shared by quantum key distribution (QKD) via a communication network according to a type of the request data. The supply unit supplies the response message to the application.
ELECTRONIC APPROVAL SYSTEM, ELECTRONIC APPROVAL SERVER, AND COMPUTER-READABLE STORAGE MEDIUM (18174540)
Inventor Kiyoshi Toshimitsu
Brief explanation
The abstract describes an electronic approval system that includes an electronic approval device and an electronic approval server. The device has a biometric authentication unit and a security chip. The unit performs biometric authentication, and if the authentication is successful, the security chip generates reliability confirmation information using a private key. This information is then sent to the approval server. The server has a processor that stores an electronic approval record based on a public key and the reliability confirmation information.
Abstract
According to an embodiment, an electronic approval system comprising at least one electronic approval device and an electronic approval server. The electronic approval device includes a biometric authentication unit and a security chip. The biometric authentication unit performs biometric authentication. The security chip generates reliability confirmation information using a private key stored in advance if a result of the biometric authentication is normal, and transmits the reliability confirmation information to the electronic approval server via the information processing device. The electronic approval server includes a processor. The processor stores an electronic approval record indicating that approval has been successfully performed in the electronic approval device based on a public key corresponding to the private key and the reliability confirmation information.
PRINTED CIRCUIT BOARD AND DISK DEVICE (17899385)
Inventor Kazuyoshi AKUTSU
Brief explanation
The abstract describes a printed circuit board that has a substrate and a group of shared pads. These shared pads have different areas and ports, with some ports overlapping one area and others protruding from it. The shared pads also have a side edge that includes a first side edge, a second side edge, and a sloping side edge that connects them.
Abstract
According to one embodiment, a printed circuit board includes a substrate and a shared pad group provided on the substrate and including a plurality of shared pads. The shared pads include a first area, a second area smaller in size than the first area, a port of which is overlap the first area and an other port of which is located to protrude from the first area to a side of another one of the shared pads, and a second side edge located on a side of another shared pad. The second pad side edge includes a first side edge defining the first area, a second side edge defining the second area and displaced on a side of another shared pad with respect to the first side edge, and a sloping side edge connecting the first side edge and the second side edge to each other.
ISOLATOR (17901997)
Inventor Yusuke IMAIZUMI
Brief explanation
This abstract describes an isolator that consists of two wiring boards. The first wiring board has a first insulating layer with two principal surfaces, a first coil on the first principal surface, and a first pad connected to the first coil. The second wiring board has a second insulating layer with two principal surfaces, a second coil on the third principal surface, and a second pad connected to the second coil. The first and second coils are positioned to face each other, and the second wiring board is smaller in size compared to the first wiring board.
Abstract
According to one embodiment, an isolator includes a first wiring board and a second wiring board. The first wiring board includes a first insulating layer including first and second principal surfaces; a first coil provided on the first principal surface; and a first pad provided on the first principal surface and electrically connected to the first coil. The second wiring board includes a second insulating layer including third and fourth principal surfaces; a second coil provided on the third principal surface; and a second pad provided on the fourth principal surface and electrically connected to the second coil. The first and second coils are arranged in such a manner as to face each other, and an external size of the second wiring board is smaller than an external size of the first wiring board.