KABUSHIKI KAISHA TOSHIBA patent applications on September 5th, 2024

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Patent Applications by KABUSHIKI KAISHA TOSHIBA on September 5th, 2024

KABUSHIKI KAISHA TOSHIBA: 22 patent applications

KABUSHIKI KAISHA TOSHIBA has applied for patents in the areas of G11B5/31 (5), H01L29/66 (3), G11B5/027 (3), G01N27/04 (2), H01L29/78 (2) G11B5/3146 (4), G01N27/04 (2), H01L27/14632 (1), H04B1/44 (1), H02M3/3353 (1)

With keywords such as: magnetic, layer, member, region, semiconductor, element, between, voltage, conductive, and device in patent application abstracts.



Patent Applications by KABUSHIKI KAISHA TOSHIBA

20240295513. SENSOR AND SENSOR SYSTEM_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yosuke AKIMOTO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akira FUJIMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yoshihiko KURUI of Chigasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ping WANG of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba, Hiroaki YAMAZAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G01N27/04

CPC Code(s): G01N27/04



Abstract: according to one embodiment, a sensor includes an element section including a first base and a first element. the first element includes a first fixed member fixed to the first base, a first connecting member supported by the first fixed member, and a first film portion supported by the first connecting member. a first gap is provided between the first base and the first film portion. the first film portion includes a first resistance layer, a first conductive layer, and a first conductive member. the first resistance layer does not overlap the first conductive layer in a first direction from the first base to the first fixed member. the first conductive member overlaps the first resistance layer and the first conductive layer in the first direction. a first electrical resistance of the first resistance layer changes according to a state of a detection target around the first element.


20240295514. SENSOR AND SENSOR SYSTEM_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yosuke AKIMOTO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akira FUJIMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yoshihiko KURUI of Chigasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ping WANG of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba, Hiroaki YAMAZAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G01N27/04

CPC Code(s): G01N27/04



Abstract: according to one embodiment, a sensor includes an element section including a first base and a first element. the first element includes a first fixed member fixed to the first base, a first connecting member supported by the first fixed member, and a first film portion supported by the first connecting member. a first gap is provided between the first base and the first film portion. the first film portion includes a first resistance layer, a first conductive layer, and a first conductive member provided between the first resistance layer and the first conductive layer. a potential of the first conductive member is fixed. a first electrical resistance of the first resistance layer is configured to change according to a state of a detection target around the first element.


20240295516. SENSOR AND SENSOR SYSTEM_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yosuke AKIMOTO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Akira FUJIMOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yoshihiko KURUI of Chigasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ping WANG of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba, Hiroaki YAMAZAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G01N27/12, G01N33/00

CPC Code(s): G01N27/12



Abstract: according to one embodiment, a sensor includes an element portion including a first base and a first element. the first element includes, a first fixed member fixed to the first base, a first resistance connecting member supported by the first fixed member, a first conductive connecting member supported by the first fixed member, and a first film portion supported by the first resistance connecting member and the first conductive connecting member. a first gap is provided between the first base and the first film portion. the first film portion includes a first resistance layer and a first conductive layer. the first resistance connecting member includes a first resistance wiring electrically connected to the first resistance layer. the first conductive connecting member includes a first conductive wiring electrically connected to the first conductive layer.


20240295532. SONIC INSPECTION DEVICE, SONIC INSPECTION METHOD, AND CONTACT MEMBER FOR SONIC INSPECTION DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Akiko HIRAO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Noriko YAMAMOTO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Tomio ONO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yutaka NAKAI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G01N29/24, G01N29/04

CPC Code(s): G01N29/2437



Abstract: a sonic inspection device of an embodiment includes: a sonic probe including a transducer configured to execute at least one of transmission and reception of a sound wave; and a contact member including: a first sheet-like member containing an elastomer and having a first surface that comes into contact with a sonic function surface of the sonic probe directly or with an intermediate member therebetween and a second surface opposite the first surface; and a second sheet-like member having a plurality of openings and provided in contact with the second surface of the first sheet-like member. the second sheet-like member includes a high-hardness member provided in at least a part in contact with the second surface and containing at least one selected from a polymer, a metal member, and a ceramic member higher in young's modulus at room temperature than the first sheet-like member.


20240296325. NEURAL NETWORK DEVICE AND SYNAPTIC WEIGHT UPDATE METHOD_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yoshifumi NISHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kumiko NOMURA of Shinagawa Tokyo (JP) for kabushiki kaisha toshiba, Takao MARUKAME of Chuo Tokyo (JP) for kabushiki kaisha toshiba, Koichi MIZUSHIMA of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G06N3/08, G06N3/047, G06N3/049, G06N3/063

CPC Code(s): G06N3/08



Abstract: a neural network device according to an embodiment includes a plurality of neuron circuits, a plurality of synapse circuits, and a plurality of random number circuits. each of the random number circuits outputs a random signal. each of the synapse circuits receives the random signal from one of the random number circuits and updates a synaptic weight with a probability generated on the basis of the received random signal. the synapse circuits are divided into synapse groups. each of two or more synapse circuits belonging to a first synapse group receives the random signal output from a first random number circuit. each of two or more synapse circuits outputting output signals to a first neuron circuit belongs to a synapse group differing from a synapse group, to which other synapse circuits outputting the output signal to the first neuron circuit, belong.


20240296467. PURCHASE DATA ANALYSIS APPARATUS, METHOD AND STORAGE MEDIUM_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yoshiaki MIZUOKA of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba, Kouta NAKATA of Chigasaki Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G06Q30/0201

CPC Code(s): G06Q30/0201



Abstract: a purchase data analysis apparatus includes processing circuitry. the processing circuitry is configured to: acquire, on a customer-by-customer basis, customer information including an action time of a purchase-related action relating to purchase; generate, on a customer-by-customer basis, a customer representation representing an action pattern of a customer, based on the action time; generate, on a store-by-store basis, a store representation representing a representation of a customer coming to a store, based on the customer representation; and cluster stores by using the store representation.


20240296861. MAGNETIC HEAD WITH MULTILAYER CONFIGURATION BETWEEN MAGNETIC POLES AND MAGNETIC RECORDING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yuji NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ryo OSAMURA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Masayuki TAKAGISHI of Kunitachi Tokyo (JP) for kabushiki kaisha toshiba, Naoyuki NARITA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Tomoyuki MAEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tazumi NAGASAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kosuke KURIHARA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G11B5/187, G11B5/127, G11B5/31, G11B5/49

CPC Code(s): G11B5/1875



Abstract: according to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first and the second magnetic poles. the magnetic element includes first to fourth magnetic layers, and first to fifth non-magnetic layers. the fourth magnetic layer includes a first element and at least one of fe, co or ni. the first element including at least one selected from the group consisting of cr, v, mn, ti, n and sc. the fourth non-magnetic layer including at least one selected from the group consisting of cu, au, cr, al, v and ag. the fifth non-magnetic layer includes at least one selected from the group consisting of cu, au, cr, al, v and ag.


20240296862. MAGNETIC HEAD WITH MULTIPLE LAYERS AND MAGNETIC RECORDING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yuji NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ryo OSAMURA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Masayuki TAKAGISHI of Kunitachi Tokyo (JP) for kabushiki kaisha toshiba, Naoyuki NARITA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Tomoyuki MAEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tazumi NAGASAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kosuke KURIHARA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G11B5/31, G11B5/027

CPC Code(s): G11B5/3146



Abstract: according to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first and the second magnetic poles. the magnetic element includes first to fifth magnetic layers, and first to sixth non-magnetic layers. the fifth magnetic layer includes a first element and at least one of fe, co or ni. the first element includes at least one selected from the group consisting of cr, v, mn, ti, n and sc. the fifth non-magnetic layer includes at least one selected from the group consisting of ru, ir, ta, rh, pd, pt and w. the sixth non-magnetic layer includes at least one selected from the group consisting of cu, au, cr, al, v and ag.


20240296863. MAGNETIC HEAD WITH MULTILAYER CONFIGURATION BETWEEN MAGNETIC POLES AND MAGNETIC RECORDING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yuji NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Masayuki TAKAGISHI of Kunitachi Tokyo (JP) for kabushiki kaisha toshiba, Naoyuki NARITA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Tomoyuki MAEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G11B5/31, G11B5/027

CPC Code(s): G11B5/3146



Abstract: according to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first and the second magnetic poles. the magnetic element includes first to fifth magnetic layers, and first to sixth non-magnetic layers. the sixth non-magnetic layer is provided between the fifth magnetic layer and the second magnetic pole. the sixth non-magnetic layer includes at least one selected from the group consisting of ru, ir, ta, rh, pd, pt and w.


20240296864. MAGNETIC HEAD AND MAGNETIC RECORDING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yuji NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Masayuki TAKAGISHI of Kunitachi Tokyo (JP) for kabushiki kaisha toshiba, Naoyuki NARITA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Tomoyuki MAEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G11B5/31, G11B5/027

CPC Code(s): G11B5/3146



Abstract: according to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first and the second magnetic poles. the magnetic element includes first to fifth magnetic layers, and first to sixth non-magnetic layers. the sixth non-magnetic layer is provided between the fifth magnetic layer and the second magnetic pole. the sixth non-magnetic layer includes at least one selected from the group consisting of cu, au, cr, al, v and ag.


20240296865. MAGNETIC HEAD AND MAGNETIC RECORDING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yuji NAKAGAWA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Masayuki TAKAGISHI of Kunitachi Tokyo (JP) for kabushiki kaisha toshiba, Naoyuki NARITA of Funabashi Chiba (JP) for kabushiki kaisha toshiba, Tomoyuki MAEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Ryo OSAMURA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Tazumi NAGASAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Kosuke KURIHARA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G11B5/31

CPC Code(s): G11B5/3146



Abstract: according to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first and the second magnetic poles. the magnetic element includes first to fifth magnetic layers. a differential electric resistance of the magnetic element when a voltage between the first magnetic pole and the second magnetic pole being changed includes a first positive peak and a second positive peak. the voltage corresponding to the first positive peak is a first positive peak voltage. the voltage corresponding to the second positive peak is a second positive peak voltage. the second positive peak voltage is higher than the first positive peak voltage. an element voltage applied between the first magnetic pole and the second magnetic pole in a recording operation is higher than the second positive peak voltage.


20240296869. MAGNETIC DISK DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yosuke KONDO of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba, Syosuke MARUYAMA of Yamato Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): G11B20/00, G11B5/09, G11B19/04, G11B20/12, G11B20/18

CPC Code(s): G11B20/00637



Abstract: according to the embodiment, an hdc receives a plurality of data segments from a host, and executes generation and addition of a first code and output of a data segment to which the first code is added to each data segment. an hdc calculates exclusive or with respect to the first codes, and outputs obtained first information. the rwc performs data conversion and calculation of exclusive or on the plurality of data segments to which the first code is added, and outputs the plurality of data segments after the data conversion and a track parity obtained by the calculation of the exclusive or. the rwc acquires the first code from the plurality of data segments. the rwc calculates exclusive or with respect to a group of the second codes which are the acquired first codes to acquire second information. the rwc compares the first information with the second information.


20240297005. GAS CIRCUIT BREAKER_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Tomohiko JIMBO of Fujisawa (JP) for kabushiki kaisha toshiba, Biswas DEBASISH of Shiki (JP) for kabushiki kaisha toshiba, Amane MAJIMA of Kawasaki (JP) for kabushiki kaisha toshiba, Tooru INOUE of Yokohama (JP) for kabushiki kaisha toshiba

IPC Code(s): H01H33/91, H01H33/56

CPC Code(s): H01H33/91



Abstract: the gas-circuit-breaker includes a container, opposing part, movable-part, and nozzle. an arc-extinguishing gas fills the container. the opposing-part is housed in the container and includes an opposing-arc-contact and an exhaust stack. the movable-part is housed in the container and includes a movable-arc-contact coming in contact with the opposing-arc-contact in a connected-state and separating from the opposing-arc-contact in an open-state; and a pressure-accumulation-part where an arc-extinguishing gas pressure increases. the nozzle is housed in the container and includes a space where arc-discharge occurs between the movable-arc-contact and the opposing-arc-contact. the nozzle includes a middle-part where the opposing-arc-contact is inserted and one or more jet-holes that eject, toward the space, partial arc-extinguishing gas flowing in from a flow-passage between the pressure-accumulation-part and the middle-part. the arc-extinguishing gas whose pressure increases in the pressure-accumulation-part flows into the space via the flow-passage and the jet-holes to extinguish the arc-discharge.


20240297153. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Satoshi YOSHIDA of Kawasaki (JP) for kabushiki kaisha toshiba, Tatsunori SAKANO of Tokyo (JP) for kabushiki kaisha toshiba, Ryohei GEJO of Kawasaki (JP) for kabushiki kaisha toshiba

IPC Code(s): H01L25/07, H01L23/00

CPC Code(s): H01L25/072



Abstract: a semiconductor chip includes a semiconductor layer, a first electrode located between a first conductive member and the semiconductor layer, a first gate pad located between the first conductive member and the semiconductor layer, a second gate pad located between the first conductive member and the semiconductor layer, and a second electrode located between the semiconductor layer and a second conductive member. a plurality of terminals includes a first gate terminal electrically connected to the first gate pad via the interconnection member, a second gate terminal electrically connected to the second gate pad via the interconnection member, and a sense terminal electrically connected to the first conductive member via the interconnection member. the sense terminal is located between the first gate terminal and the second gate terminal in a plan view perpendicular to a first direction.


20240297195. SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Masao TAKAHASHI of Zama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): H01L27/146

CPC Code(s): H01L27/14632



Abstract: a solid-state imaging device includes a semiconductor substrate that includes a first region in which a plurality of first photodiodes are arranged along a first direction, and a second region in which a plurality of second photodiodes are arranged along the first direction, and an insulating film that is disposed on the semiconductor substrate to cover the first region and the second region. the insulating film includes an optical path changing portion that changes an optical path of light incident on the insulating film on the first region and directed to the second region in at least an intermediate region between a first edge photodiode closest to the second region among the plurality of first photodiodes and a second edge photodiode closest to the first region among the plurality of second photodiodes.


20240297213. SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Shingo SATO of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba

IPC Code(s): H01L29/06, H01L29/10, H01L29/66, H01L29/78

CPC Code(s): H01L29/0615



Abstract: a semiconductor device includes first and second electrodes, first to sixth semiconductor regions, and a gate electrode. the first semiconductor region is located on the first electrode. the second semiconductor region is located on the first semiconductor region. the second semiconductor region includes a first part and a second part. the second part is located on a portion of the first part. the third semiconductor region is located on an other portion of the first part. the fourth semiconductor region separated from the third semiconductor region with the second part interposed. the fifth semiconductor region is located on the third semiconductor region. the sixth semiconductor region is located on the fifth semiconductor region. the gate electrode faces the portion of the fifth semiconductor region via a gate insulating layer. the second electrode is located on the fifth and sixth semiconductor regions.


20240297220. SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Masatsugu NAGAI of Nomi Ishikawa (JP) for kabushiki kaisha toshiba, Shingo SATO of Kanazawa Ishikawa (JP) for kabushiki kaisha toshiba

IPC Code(s): H01L29/08, H01L21/265, H01L21/285, H01L29/45, H01L29/66, H01L29/78

CPC Code(s): H01L29/0856



Abstract: a semiconductor device includes a semiconductor layer, first and second electrodes, a control electrode, and a connection region. the semiconductor layer includes first to third semiconductor regions. the connection region is positioned between the first electrode and the first semiconductor region. the connection region includes a compound of a first metallic element and si, and a compound of pt and si. the first metallic element is at least one selected from the group consisting of ti, v, cr, zr, mo, hf, ta, and w. the connection region includes a first part adjacent to an n-type region of the semiconductor layer in a first direction. a peak position of a concentration distribution of the first metallic element in the first direction of the first part is between the n-type region and a peak position of a concentration distribution of pt in the first direction of the first part.


20240297258. SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Shigeaki TAKAGI of Himeji Hyogo (JP) for kabushiki kaisha toshiba, Hideo YOSHIHASHI of Ibo Hyogo (JP) for kabushiki kaisha toshiba, Tomomi KURAGUCHI of Himeji Hyogo (JP) for kabushiki kaisha toshiba, Naofumi HIRATA of Himeji Hyogo (JP) for kabushiki kaisha toshiba, Yohei ARAKAKI of Ibo Hyogo (JP) for kabushiki kaisha toshiba

IPC Code(s): H01L29/872, H01L21/66, H01L29/16, H01L29/47, H01L29/66

CPC Code(s): H01L29/872



Abstract: a semiconductor device according to an embodiment includes a first electrode, a second electrode, a silicon carbide layer provided between the first electrode and the second electrode and including a first silicon carbide region of n type, a titanium nitride layer provided between the first electrode and the first silicon carbide region, and an intermediate layer provided between the titanium nitride layer and the first silicon carbide region and containing silicon nitride.


[[20240297318. CELL DEGRADATION LEVEL CALCULATION DEVICE FOR ELECTROCHEMICAL CELL STACK, CELL DEGRADATION LEVEL CALCULATION SYSTEM, CELL DEGRADATION LEVEL CALCULATION METHOD, AND STORAGE MEDIUM STORING CELL DEGRADATION LEVEL CALCULATION PROGRAM_simplified_abstract_(kabushiki kaisha toshiba)]]

Inventor(s): Keisuke SHIINO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Soichiro SHIMOTORI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Koji MIZUGUCHI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): H01M8/04664, H01M8/04537

CPC Code(s): H01M8/04679



Abstract: a cell degradation level calculation device for electrochemical cell stack according to an embodiment includes: a first calculation unit that calculates a first target voltage value based on first characteristics data; a second calculation unit that calculates a second target voltage value based on second characteristics data; and a third calculation unit that calculates a cell degradation level showing a degradation level of a cell based on the first target voltage value and the second target voltage value. the first target voltage value is the voltage value at which a voltage-value decrease rate reaches a first threshold value in a second time slot of the first characteristics data. the second target voltage value is the voltage value at which the voltage-value decrease rate reaches a second threshold value in a fourth time slot of the second characteristics data.


20240297589. POWER CONVERSION DEVICE_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Yusuke HAYASHI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Keigo ARITA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): H02M3/335, H02M1/00

CPC Code(s): H02M3/3353



Abstract: according to one embodiment, a power conversion device includes: a plurality of dc-dc converter circuits configured to generate ac voltages at both ends of a plurality of first inductors by switching on a dc voltage and rectifies the ac voltages to output dc voltages; and a plurality of second inductors respectively magnetically coupled to the plurality of first inductors of the plurality of dc-dc converter circuits, wherein inputs and outputs of the plurality of dc-dc converter circuits are respectively connected in series and the plurality of second inductors are connected in parallel between two nodes.


20240297678. ANTENNA TUNING INTEGRATED CIRCUIT_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Ryuichi NIHEI of Saitama Saitama (JP) for kabushiki kaisha toshiba

IPC Code(s): H04B1/44, H01Q3/24

CPC Code(s): H04B1/44



Abstract: according to one embodiment, an antenna tuning ic includes a power level detection circuit, a signal level determination circuit, and a consumption current control circuit. the power level detection circuit detects a power level of an antenna line through which a high-frequency signal received by an antenna is transmitted. the signal level determination circuit determines a signal level detected by the power level detection circuit. the consumption current control circuit generates a switch gate control signal for controlling an on/off operation of an rf switch circuitry, and reduces a first consumption current generated when the power level is a low input voltage more than a second consumption current generated when the power level is a high input voltage based on a determination result of the signal level determination circuit.


20240297784. KEY MANAGEMENT DEVICE, QUANTUM CRYPTOGRAPHY COMMUNICATION SYSTEM, KEY MANAGEMENT METHOD, AND COMPUTER PROGRAM PRODUCT_simplified_abstract_(kabushiki kaisha toshiba)

Inventor(s): Keisuke MERA of Katsushika Tokyo (JP) for kabushiki kaisha toshiba, Koji KANAZAWA of Akishima Tokyo (JP) for kabushiki kaisha toshiba, Katsuyuki KIMURA of Kamakura Kanagawa (JP) for kabushiki kaisha toshiba, Yoshimichi TANIZAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba

IPC Code(s): H04L9/08

CPC Code(s): H04L9/0858



Abstract: according to one embodiment, a key management device includes an acquiring circuitry and a processor. the acquiring circuitry is configured to: acquire identity verification data of a remote qkd key generated by a remote qkd device, and remote qkd device identification information identifying the remote qkd device, from another key management device via a classical communication channel. the processor is configured to: collect a local qkd key generated by a local qkd device and local qkd device identification information identifying the local qkd device; generate identity verification data of the local qkd key; and map, when the identity verification data of the remote qkd key matches the identity verification data of the local qkd key, the remote qkd device identification information to the local qkd device identification information.


KABUSHIKI KAISHA TOSHIBA patent applications on September 5th, 2024