KABUSHIKI KAISHA TOSHIBA patent applications on February 27th, 2025
Patent Applications by KABUSHIKI KAISHA TOSHIBA on February 27th, 2025
KABUSHIKI KAISHA TOSHIBA: 19 patent applications
KABUSHIKI KAISHA TOSHIBA has applied for patents in the areas of B65G1/137 (1), H01L23/31 (1), G10L17/02 (1), G10L17/04 (1), G10L17/24 (1) B65G1/1378 (1), G06V40/20 (1), H04L9/0852 (1), H02M7/537 (1), H02M7/44 (1)
With keywords such as: unit, device, processing, circuit, grid, value, data, control, target, and information in patent application abstracts.
Patent Applications by KABUSHIKI KAISHA TOSHIBA
Inventor(s): Takashi Tomokuni of Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): B65G1/137, G06Q10/087
CPC Code(s): B65G1/1378
Abstract: an information processing apparatus, an information processing method, a program and a system capable of effectively changing a height at which an article is stored are provided. according to the embodiment, an information processing apparatus includes a first interface, a second interface, and a processor. the first interface acquires a retrieval order for picking articles from cases. the second interface is connected to a takeout device configured to swap the cases stored at different heights. the processor selects two of the cases stored at different heights based on the retrieval order and causes the takeout device to swap the selected two cases through the second interface.
Inventor(s): Kai FUNAKI of Yokohama (JP) for kabushiki kaisha toshiba, Hideki SATO of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): C04B35/584
CPC Code(s): C04B35/584
Abstract: a ceramic ball material according to an embodiment includes a spherical portion; and a band-shaped portion formed over a circumference of a surface of the spherical portion. in the ceramic ball material, the ceramic ball material has a ratio rab/rap of 0.70 or more and 1.03 or less, where rab denotes an arithmetic average roughness on an outer peripheral surface of the band-shaped portion; and rap denotes an arithmetic average roughness on an outer peripheral surface of the spherical portion.
Inventor(s): Takayuki FUKASAWA of Yokohama (JP) for kabushiki kaisha toshiba, Katsuyuki AOKI of Yokohama (JP) for kabushiki kaisha toshiba, Naoto HOUTSUKI of Taito (JP) for kabushiki kaisha toshiba, Yoshihito YAMAGATA of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): C04B35/587, C04B35/638, C04B35/64, H01L23/14
CPC Code(s): C04B35/587
Abstract: a silicon nitride sintered body according to an embodiment includes not less than 0.1 mass % and not more than 10 mass % of zirconium when converted to oxide. in xrd analysis (2�) of any cross section of the silicon nitride sintered body, 0.01≤i/i and ≤i/i≤1.0 are satisfied; iis a maximum peak intensity detected at 35.3�0.2� based on �-silicon nitride crystal grains; iis a most intense peak detected at 27.0�0.2� based on �-silicon nitride crystal grains; and iis a most intense peak detected at 33.9�0.2� based on zirconium nitride.
20250067697. SENSOR_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Yoshihiko KURUI of Chigasaki Kanagawa (JP) for kabushiki kaisha toshiba, Hiroaki YAMAZAKI of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01N27/18, G01N33/00
CPC Code(s): G01N27/18
Abstract: according to one embodiment, a sensor includes a sensor section and a circuit section. the sensor section includes an element portion including a sensor element and a conductive member. the circuit section includes a first differential circuit, a voltage holding circuit, a first switch, a second switch, a third switch, and a controller. the controller is configured to perform a first operation and a second operation. in the first operation, the controller is configured to set the third switch to a third connected state, to set the first switch to a first connected state, and to set the second switch to a second disconnected state. in the second operation, the controller is configured to set the third switch to a third disconnected state, to set the first switch to a first disconnected state, and to set the second switch to a second connected state.
Inventor(s): Emi KAKISADA of Ota Tokyo (JP) for kabushiki kaisha toshiba, Hiroki MORI of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G01S7/40, G01S13/88
CPC Code(s): G01S7/4039
Abstract: according to one embodiment, a system includes a sensor in which at least one of an installation location and a configuration is changeable, a controller for driving the sensor and processing a sensor signal, and a processor for storing device information indicating at least one of the installation location and the configuration, receiving type information indicating a type of the sensor, and transmitting a program based on the type information and the device information to the controller.
20250068430. CACULATING DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Kosuke TATSUMURA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Hayato GOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F9/38, G06F7/544, G06F7/57, G06F7/72, G06F9/30
CPC Code(s): G06F9/3893
Abstract: according to one embodiment, a calculating device includes a first memory, a second memory, a third memory, a first arithmetic module, a second arithmetic module, a first conductive line electrically connecting a first output terminal of the first memory and a first input terminal of the first arithmetic module, a second conductive line electrically connecting a second output terminal of the first memory and a first input terminal of the second arithmetic module, a third conductive line electrically connecting a first output terminal of the second memory and a second input terminal of the second arithmetic module, a fourth conductive line electrically connecting a first output terminal of the third memory and a third input terminal of the second arithmetic module, and a fifth conductive line electrically connecting a first output terminal of the second arithmetic module and a second input terminal of the first arithmetic module.
Inventor(s): Hayato GOTO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F17/11
CPC Code(s): G06F17/11
Abstract: according to one embodiment, a calculating device includes an acquisition part configured to acquire a problem parameter set, and a processor. the processor is configured to repeatedly perform a first variable update of updating a first variable set, and a second variable update of updating a second variable set. in the second variable update, the processor updates the second variable set by using a function including a first term and a second term. the first term includes the first variable set and a bifurcation parameter set. the second term includes the first variable set and the problem parameter set acquired by the acquisition part. in the first variable update, the processor updates the first variable set by using the second variable set updated in the second variable update. the bifurcation parameter set includes a first bifurcation parameter and a second bifurcation parameter.
Inventor(s): Shuhei NITTA of Tokyo (JP) for kabushiki kaisha toshiba, Shun HIRAO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yasutaka FURUSHO of Fuchu Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06F18/2325, G06N20/00
CPC Code(s): G06F18/2325
Abstract: a feature vector calculation apparatus includes processing circuitry. the processing circuitry is configured to: acquire target data, a plurality of pieces of deformed data obtained by deforming the target data, the target data comprising a plurality of pieces of target data, and a trained model adapted to receive input of each of the pieces of deformed data and output a feature vector; calculate the feature vector using each of the pieces of the deformed data and the trained model; and calculate, for each of the pieces of target data, a degree of variation indicative of a degree of variation in the feature vector.
Inventor(s): Shuhei NITTA of Tokyo (JP) for kabushiki kaisha toshiba, Shun HIRAO of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yasutaka FURUSHO of Fuchu Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06N20/20
CPC Code(s): G06N20/20
Abstract: a clustering apparatus includes processing circuitry. the processing circuitry is configured to: acquire target data, a first trained model adapted to receive input of the target data and output a first feature vector, and a second trained model adapted to receive input of the target data and output a second feature vector; calculate the first feature vector using the first trained model and the target data; calculate the second feature vector using the second trained model and the target data; calculate a second cluster by dividing the second feature vector; and integrate the first feature vector with the second cluster.
Inventor(s): Hirotomo OSHIMA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takanori YOSHII of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takehiro KATO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yasuo NAMIOKA of Nerima Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06T7/70
CPC Code(s): G06T7/70
Abstract: according to one embodiment, a processing system estimates a pose of a worker based on a first image in which the worker and an article are visible. the processing system estimates at least one selected from a state of the article and a work location of the worker on the article, based on the first image. the processing system generates first graph data including a plurality of nodes and a plurality of edges, based on the pose and the at least one selected from the state and the work location. the processing system inputs the first graph data to a neural network including a graph neural network (gnn). the processing system estimates a task being performed by the worker, by using a result output from the neural network.
Inventor(s): Hirotomo OSHIMA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Takanori YOSHII of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Takehiro KATO of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba, Yasuo NAMIOKA of Nerima Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G06V40/20, G06T7/60
CPC Code(s): G06V40/20
Abstract: according to one embodiment, a processing system generates first graph data based on a pose of a worker. the pose is estimated based on a first image of the worker. the first graph data includes a plurality of first nodes corresponding respectively to a plurality of joints of the worker, and a plurality of first edges corresponding respectively to a plurality of skeletal parts of the worker. the processing system inputs the first graph data to a neural network including a graph neural network (gnn). the processing system estimates a task being performed by the worker, by using a result output from the neural network.
Inventor(s): Naoki HIRAYAMA of Kawasaki (JP) for kabushiki kaisha toshiba, Yusaku KIKUGAWA of Tokyo (JP) for kabushiki kaisha toshiba
IPC Code(s): G10L17/06, G10L17/02, G10L17/04, G10L17/24
CPC Code(s): G10L17/06
Abstract: a voice recognition device includes a memory, a voice recognizing unit, an analyzing unit, a clipping unit, an embedding-vector-calculating unit, a similarity-degree-calculating unit, a determining unit, and a device-control unit. the storing unit is for storing a first-speaker embedding-vector of each given registered speaker, and for storing the individual setting of each registered speaker for use in controlling a device. the analyzing unit analyzes an acoustic-signal and extracts a feature-quantity. the clipping unit clips, from the voice-recognition-result, the feature-quantity sequence included in an utterance section. the embedding-vector-calculating unit calculates a second-speaker embedding-vector using the feature-quantity sequence. the similarity-degree-calculating unit calculates one or more similarity degrees for the second-speaker embedding-vector and one or more first speaker embedding-vectors. based on the registered speaker determined from the similarity degrees and the voice-recognition-result, the device-control unit controls the device according to the individual setting read from the memory.
Inventor(s): Naoki HIRAYAMA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yusaku KIKUGAWA of Nishitama Tokyo (JP) for kabushiki kaisha toshiba, Masahide ARIU of Fujisawa Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): G10L21/0216, G10L25/78, G10L25/84
CPC Code(s): G10L21/0216
Abstract: the recognition rate can be improved even in a noise environment and without relying on the voice-recognition result. an acoustic signal processing device includes a spatial filter control unit, a spatial filter storing unit, and an acoustic processing unit. the spatial filter control unit outputs a spatial filter for emphasizing the target voice component and suppressing the noise component for n number of temporally-synchronized acoustic signals (n≥2) recorded at different positions. the spatial filter storing unit stores therein the spatial filter. using the spatial filter read from the spatial filter storing unit, the acoustic processing unit emphasizes the target voice component in the acoustic signals, and suppresses the noise component in the acoustic signals. the spatial filter control unit further includes a determining unit, a voice spatial correlation calculating unit, a noise spatial correlation calculating unit, a spatial correlation storing unit, and a spatial filter calculating unit.
Inventor(s): Akito SASAKI of Yokohama (JP) for kabushiki kaisha toshiba, Kentaro IWAI of Yokohama (JP) for kabushiki kaisha toshiba, Keita KANAHARA of Yokohama (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L23/495, H01L23/31, H01L23/498, H01L29/34
CPC Code(s): H01L23/49506
Abstract: a ceramic circuit substrate according to an embodiment includes a ceramic substrate and multiple metal parts. the ceramic substrate includes a first surface. the multiple metal parts are located respectively in multiple first regions of the first surface. the first surface includes a second region positioned between adjacent first regions of the multiple metal parts. an average length rsm of roughness curve elements in the second region is not less than 40 �m. the average length rsm is preferably not more than 100 �m. a maximum peak height rp of a surface roughness curve in the second region is preferably not less than 1.0 �m. a maximum valley depth rv of a surface roughness curve in the second region is preferably not less than 1.0 �m.
Inventor(s): Yukina AKIYAMA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Shunsuke KAWACHI of Tama Tokyo (JP) for kabushiki kaisha toshiba, Yuki KUDO of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Yoko SAKAUCHI of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Koji TOBA of Tama Tokyo (JP) for kabushiki kaisha toshiba, Kenji MITSUMOTO of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Daisuke TAKEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02J3/18, H02M7/48
CPC Code(s): H02J3/1835
Abstract: a power conversion device includes a conversion circuit, a grid forming control circuit, a grid following control circuit, a modulation circuit, a switching circuit, a phase synchronization processing circuit, an initial value computing circuit, and a synchronization adjusting circuit. when a switching signal instructing switching from grid forming control to grid following control is received, the phase synchronization processing circuit computes a synchronous phase by phase synchronization processing for which an amplitude of a grid voltage is used as input. the initial value computing circuit computes an initial amplitude command value based on the amplitude of the grid voltage and the synchronous phase. the synchronization adjusting circuit sets the initial amplitude command value to be an initial value of a command value of an amplitude of an output voltage in the grid following control after switching from the grid forming control.
Inventor(s): Shunsuke KAWACHI of Tama Tokyo (JP) for kabushiki kaisha toshiba, Yukina AKIYAMA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yuki KUDO of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Yoko SAKAUCHI of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Koji TOBA of Tama Tokyo (JP) for kabushiki kaisha toshiba, Kenji MITSUMOTO of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Daisuke TAKEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02M7/44
CPC Code(s): H02M7/44
Abstract: an electric power conversion device according to an embodiment includes: a converter circuit that converts direct current power to alternating current power; a circuit breaker one end of which is connectable to an external system and another end of which is connected to the converter circuit via a filter circuit; and an injector that, before injecting the circuit breaker during activation, sets the converter circuit to an operating state, determines whether a voltage at the one end and a voltage at the other end meet a synchronization condition, and injects the circuit breaker when the synchronization condition is met.
Inventor(s): Yukina AKIYAMA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Shunsuke KAWACHI of Tama Tokyo (JP) for kabushiki kaisha toshiba, Yuki KUDO of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Yoko SAKAUCHI of Fuchu Tokyo (JP) for kabushiki kaisha toshiba, Koji TOBA of Tama Tokyo (JP) for kabushiki kaisha toshiba, Kenji MITSUMOTO of Setagaya Tokyo (JP) for kabushiki kaisha toshiba, Daisuke TAKEDA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H02M7/537, H02J3/00
CPC Code(s): H02M7/537
Abstract: a power conversion device is disclosed in which a grid following amplitude command value and a grid following phase command value are output in response to receiving a switching signal instructing switching from grid following control to grid forming control. the grid following amplitude command value indicates a target value of an amplitude computed by the grid following control. the grid following phase command value indicates a target value of a phase computed by the grid following control. when the grid following control is switched to the grid forming control, an initial value of the target value of the amplitude in the grid forming control to be the grid following amplitude command value is set, and an initial value of the target value of the phase in the grid forming control to be the grid following phase command value is set.
Inventor(s): Suh Wuk KIM of Ota Tokyo (JP) for kabushiki kaisha toshiba, Yasuyuki TANAKA of Kawasaki Kanagawa (JP) for kabushiki kaisha toshiba, Yoshimichi TANIZAWA of Yokohama Kanagawa (JP) for kabushiki kaisha toshiba
IPC Code(s): H04L9/08
CPC Code(s): H04L9/0852
Abstract: an information processing device is connected to at least a first communication device. the information processing device includes a processor. the first communication device acquires, from a first key management device, an encryption key shared between the first key management device and a second key management device. a second communication device acquires the encryption key from the second key management device. the processor acquires first attribute information indicating an attribute of the encryption key from the first communication device or from a message transmitted and received through communication. the processor acquires second attribute information indicating an attribute of the encryption key on the basis of the information acquired from the first key management device. the processor outputs information related to the first attribute information and the second attribute information.
20250072084. SEMICONDUCTOR DEVICE_simplified_abstract_(kabushiki kaisha toshiba)
Inventor(s): Takuo KIKUCHI of Kamakura (JP) for kabushiki kaisha toshiba
IPC Code(s): H01L29/40, H01L29/78
CPC Code(s): H01L29/407
Abstract: a semiconductor device includes first to fourth electrodes, first to third semiconductor regions, and first and second insulating parts. the first insulating part is located between the second semiconductor region and the third electrode. the fourth electrode is arranged with the first and second semiconductor regions. the second insulating part is located between the first semiconductor region and the fourth electrode and between the second semiconductor region and the fourth electrode. the second insulating part includes first and second insulating regions. the first insulating region surrounds the fourth electrode and contacts the fourth electrode. the second insulating region surrounds the first insulating region and contacts the first insulating region. a dielectric constant of the second insulating region is less than a dielectric constant of the first insulating region.
KABUSHIKI KAISHA TOSHIBA patent applications on February 27th, 2025
- KABUSHIKI KAISHA TOSHIBA
- B65G1/137
- G06Q10/087
- CPC B65G1/1378
- Kabushiki kaisha toshiba
- C04B35/584
- CPC C04B35/584
- C04B35/587
- C04B35/638
- C04B35/64
- H01L23/14
- CPC C04B35/587
- G01N27/18
- G01N33/00
- CPC G01N27/18
- G01S7/40
- G01S13/88
- CPC G01S7/4039
- G06F9/38
- G06F7/544
- G06F7/57
- G06F7/72
- G06F9/30
- CPC G06F9/3893
- G06F17/11
- CPC G06F17/11
- G06F18/2325
- G06N20/00
- CPC G06F18/2325
- G06N20/20
- CPC G06N20/20
- G06T7/70
- CPC G06T7/70
- G06V40/20
- G06T7/60
- CPC G06V40/20
- G10L17/06
- G10L17/02
- G10L17/04
- G10L17/24
- CPC G10L17/06
- G10L21/0216
- G10L25/78
- G10L25/84
- CPC G10L21/0216
- H01L23/495
- H01L23/31
- H01L23/498
- H01L29/34
- CPC H01L23/49506
- H02J3/18
- H02M7/48
- CPC H02J3/1835
- H02M7/44
- CPC H02M7/44
- H02M7/537
- H02J3/00
- CPC H02M7/537
- H04L9/08
- CPC H04L9/0852
- H01L29/40
- H01L29/78
- CPC H01L29/407
