International Business Machines Corporation patent applications on June 20th, 2024
Patent Applications by International Business Machines Corporation on June 20th, 2024
International Business Machines Corporation: 111 patent applications
International Business Machines Corporation has applied for patents in the areas of H01L27/092 (10), H01L23/528 (10), H01L29/06 (9), H01L29/66 (8), H01L29/423 (7) G06N20/00 (4), H01L23/5286 (4), H01L27/0922 (3), G06F30/20 (2), H01L43/02 (2)
With keywords such as: device, data, based, structure, semiconductor, dielectric, computer, layer, within, and user in patent application abstracts.
Patent Applications by International Business Machines Corporation
Inventor(s): Mauro Marzorati of Lutz FL (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Randy A. Rendahl of Raleigh NC (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): B29C64/393, B29C64/209, B33Y10/00, B33Y30/00, B33Y50/02
CPC Code(s): B29C64/393
Abstract: embodiments of the invention are directed to a computer-implemented method that includes receiving, using a processor, data representing a 3d physical object by a processing device, and controlling, using the processor, a 3d printing device to apply successive layers of a material by a printing head including a nozzle. the controlling includes depositing at least one layer by instructing a snake robot of a configurable track system to form a shape and define a movement track that corresponds to a movement profile aligned with the 3d model, moving the printing head along the movement track defined by the snake robot, and depositing the at least one layer via the nozzle as the printing head is moved along the movement track.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation
IPC Code(s): B29C64/393, B29C64/245
CPC Code(s): B29C64/393
Abstract: a system for 3d printing can include a printing device configured to create an object by depositing successive layers of uncured material and at least one mitigating device. at least one of the printing device and the at least one mitigating device can be configured to perform a method to mitigate a deformation of at least one of the successive layers of uncured material.
Inventor(s): Michael S. Gordon of Chappaqua NY (US) for international business machines corporation, Kommy Weldemariam of Ottawa (CA) for international business machines corporation, Aisha Walcott of Nairobi (KE) for international business machines corporation, Julian Bertram Kuehnert of Nairobi (KE) for international business machines corporation, Steven Cordes of Yorktown Heights NY (US) for international business machines corporation
IPC Code(s): B60L58/10, B60L53/60, B60W40/08
CPC Code(s): B60L58/10
Abstract: a computer-implemented method for predicting electric vehicle (ev) charging behavior of a driver. the method includes predicting when an ev needs to be charged, where the ev needs to be charged, and for how long the ev needs to be charged based on individualized characteristics of the driver or one or more passengers, weather conditions, and geospatial characteristics. the method further includes evaluating an availability of one or more ev charging stations located within a given radius of the ev and comparing a location of the one or more available ev charging stations, located within the given radius of the ev, to one or more desired locations of the driver of the ev. the method further includes determining an estimated waiting time at the one or more ev charging stations and scheduling an ev charging time at the one or more ev charging stations, based on the location and duration.
Inventor(s): Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Atul Mene of Morrisville NC (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): B60W50/14, B60W60/00
CPC Code(s): B60W50/14
Abstract: a computer system, computer program product, and computer-implemented method for enhancing offboarding of occupants associated with autonomous vehicles through augmented reality (ar). the method includes identifying that a first vehicle is approaching an occupant offboarding station, where the first vehicle is an autonomous vehicle. the method also includes determining a location of one or more second vehicles proximate to the occupant offboarding station. the method further includes determining, subject to the one or more second vehicles location determinations, an occupant offboarding location for the first vehicle proximate to the occupant offboarding station. the method also includes stopping the first vehicle proximate to the occupant offboarding location, including providing vehicular ar-based guidance to the first vehicle to stop.
Inventor(s): Jennifer M. Hatfield of San Francisco CA (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): B60W50/14, B60W30/06, B60W60/00, G08G1/14
CPC Code(s): B60W50/14
Abstract: a computer system, computer program product, and computer-implemented method for using augmented reality (ar) to enhance parking of autonomous vehicles. the method includes capturing, through one or more sensors, the physical characteristics of a parking facility, and identifying, through the one or more sensors, the physical characteristics of vehicles therein. the method also includes generating, subject to the capturing and identifying, an augmented reality (ar) representation of the parking facility and the vehicles. the method further includes presenting, through a display device, the ar representation of the parking facility and the vehicles. the method also includes receiving, subject to the presenting, potential parking locations at least partially based on presently vacant parking locations indicated within the ar representation of the parking facility and the vehicles. the method further includes parking, subject to the receiving, autonomous vehicles within selected parking locations of the potential parking locations.
Inventor(s): Patryk Gumann of Tarrytown NY (US) for international business machines corporation, William Thomas Spratt of Croton-on-Hudson NY (US) for international business machines corporation, Stephen W. Bedell of Wappingers Falls NY (US) for international business machines corporation, Gilbert Bauer of Peekskill NY (US) for international business machines corporation, David Zarsky of Bethlehem PA (US) for international business machines corporation
IPC Code(s): F25D3/10, F17C3/08, F25D3/00
CPC Code(s): F25D3/102
Abstract: systems and/or methods provided herein relate to cooling of a component within a chamber of a cryostat. a system can comprise a cryostat having a cooling plate disposed within the cryostat, and a cooling feed line extending into the cryostat from external to the cryostat, which cooling feed line is thermally coupled to the cooling plate by a heat exchanger. in one or more embodiments, the system further can comprise a bulk cooling system that employs a liquifiable gas to provide cooling, wherein the bulk cooling system is fluidly coupled to the cooling feed line. in one or more embodiments, the system further can comprise a vacuum pump disposed at the cooling return line and external to the cryostat and physically decoupled from the cryostat by a section of the cooling return line disposed between the cryostat and the vacuum pump.
Inventor(s): Chun-Sheng Chung of Taipei (TW) for international business machines corporation, Yu-Ning Hsu of Taipei City (TW) for international business machines corporation, Zen-Jerr Hong of Taipei (TW) for international business machines corporation, Tien Yu Chu of Taipei (TW) for international business machines corporation
IPC Code(s): G01C21/34, G01C21/36
CPC Code(s): G01C21/3461
Abstract: according to one embodiment, a method, computer system, and computer program product for real-time navigation is provided. the embodiment may include capturing one or more visual input streams. the embodiment may also include collecting data, including location data and a collected visual input stream from the one or more visual input streams. the embodiment may further include identifying items from the collected visual input stream. the embodiment may also include determining an optimal route based on the collected data. the embodiment may further include providing the optimal route to a user based on a context of the identified items.
Inventor(s): Robert Filepp of Westport CT (US) for international business machines corporation, Abdulhamid Adebowale Adebayo of White Plains NY (US) for international business machines corporation, William Anderson of Raleigh NC (US) for international business machines corporation, Neil Delima of Scarborough (CA) for international business machines corporation
IPC Code(s): G01R31/367, G01R31/382, H01M10/42
CPC Code(s): G01R31/367
Abstract: a method for unifying battery-status observability across a plurality of heterogeneous devices includes identifying a plurality of heterogeneous devices where each device includes a battery to power the device. the method monitors battery status of each device of the heterogeneous devices. the method may also access crowdsourced data to determine battery life associated with at least one device of the heterogeneous devices. using the battery status and potentially the crowdsourced data, the method predicts the remaining battery life for each device of the heterogeneous devices. the method presents the remaining battery life of each of the heterogeneous devices on a unified dashboard. in certain embodiments, a user may be alerted in the event the remaining battery life of a device of the heterogeneous devices falls below a selected threshold. a corresponding system and computer program product are also disclosed.
Inventor(s): Cheng Chi of Jersey City NJ (US) for international business machines corporation, Takashi Ando of Eastchester NY (US) for international business machines corporation, Praneet Adusumilli of Somerset NJ (US) for international business machines corporation, Reinaldo Vega of Mahopac NY (US) for international business machines corporation, David Wolpert of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G03F7/00, G03F7/09, G03F7/20, G06K19/06
CPC Code(s): G03F7/0005
Abstract: a system and method of leveraging sub-resolution assist feature (sraf) to intentionally distort a feature of a pattern for identification and security purposes. a method of forming an identifier on a semiconductor structure includes: receiving, at a semiconductor manufacturing foundry, a specification of an identifier including a pattern comprising a combination of main features; designing a lithographic mask structure based on the received identifier specification, the lithographic mask structure including mask features corresponding to the specified main features and at least one sub-resolution assist feature (sraf) structure in a geometrical relationship with a corresponding mask feature for forming, using a lithography process, a uniquely modified identifier pattern comprising a combination of modified main features; and then subsequently lithographically exposing, employing the mask structure, photoresist layers at an optical condition and subsequently developing the photoresist layers to transfer the uniquely modified identifier pattern to a surface of a semiconductor wafer.
Inventor(s): Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Martin G. Keen of Cary NC (US) for international business machines corporation, Alexander Reznicek of Troy NY (US) for international business machines corporation, Bahman Hekmatshoartabari of White Plains NY (US) for international business machines corporation
IPC Code(s): G05B19/4099
CPC Code(s): G05B19/4099
Abstract: a method, computer program, and computer system are provided for enabling chip-infused filament for 3d printing. a structure to be formed through 3d printing is identified. a type associated with one or more sensors embedded in a polymer filament and a location are determined for the one or more sensors within the structure. the structure may then be 3d printed with the one or more sensors at the location based on using the polymer filament at the location within the structure.
Inventor(s): Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation
IPC Code(s): G05B19/418, G06T19/00
CPC Code(s): G05B19/41885
Abstract: a computer-implemented method, according to one approach, includes identifying machines involved in performance of a manufacturing process at a manufacturing location, and identifying a workflow sequence of execution of the machines. conditions associated with remote operators using virtual reality (vr) devices to remotely control the machines to perform the workflow sequence of execution at the manufacturing location are received. the method further includes determining, for each of the vr devices, an extent of a vr collaborative environment to display. the extents are determined based on the conditions, thereby reducing latency in performance of the workflow sequence of execution at the manufacturing location. the method further includes outputting the extents to the vr devices.
Inventor(s): Gandhi Sivakumar of Bentleigh (AU) for international business machines corporation, Kushal S. Patel of Pune (IN) for international business machines corporation, Sarvesh S. Patel of Pune (IN) for international business machines corporation
IPC Code(s): G05D1/10, B64C39/02, B64U10/00, G05D1/00, H04W12/088
CPC Code(s): G05D1/104
Abstract: in an approach for amplifying a mission critical workload to a low earth orbit (leo) satellite using a booster drone, responsive to receiving a first request to amplify a mission critical workload to a leo satellite, a processor initiates a targeted service instance. a processor obtains a level of mission criticality of the first request by mapping the first request against a registry of applications and a respective level of mission criticality of the applications. a processor selects a booster drone from a drone delivery station. a processor determines a first geo-location from where a satellite data communication needs to be initiated. a processor determines a second geo-location of the leo satellite to where the satellite data communication needs to be pushed. a processor generates one or more signal strength requirements. a processor amplifies the mission critical workload according to the one or more generated signal strength requirements.
Inventor(s): Martin G. Keen of Cary NC (US) for international business machines corporation, Jana H. Jenkins of Raleigh NC (US) for international business machines corporation, Xin Wang of Chappaqua NY (US) for international business machines corporation, Jennifer A. Mallette of Vienna VA (US) for international business machines corporation
IPC Code(s): G05D1/10, B64C39/02, B64U10/00
CPC Code(s): G05D1/1064
Abstract: a computer-implemented method, in accordance with one embodiment, includes obtaining observational data from an unmanned aerial vehicle (uav) deployed in a working environment, the working environment including a plurality of entities carrying out tasks within the working environment. the data is analyzed to detect a disruption caused by the uav to one or more of the entities within the working environment during the deployment. a parameter of a deployment is adjusted based on the analysis of the obtained data.
Inventor(s): Ramon Bertran Monfort of New Orleans LA (US) for international business machines corporation, Pradeep Bhadravati Parashurama of Bhadravati (IN) for international business machines corporation, Nitish Jindal of Bangalore (IN) for international business machines corporation, Alper Buyuktosunoglu of White Plains NY (US) for international business machines corporation
IPC Code(s): G06F1/30, G06F1/3203
CPC Code(s): G06F1/305
Abstract: a computer-implemented method for detecting n-level slopes for a voltage level in a processor, wherein n is greater than 1, includes monitoring a voltage in a processor for a voltage level corresponding to a predefined first edge, and monitoring for a voltage level corresponding to a predefined second edge within a first count limit from detection of the predefined first edge. in response to detecting the predefined second edge within the first count limit, the computer-implemented method includes monitoring for a voltage level corresponding to a predefined third edge within a second count limit from detection of the predefined second edge, and in response to detecting the predefined third edge within the second count limit, determining whether to adjust a power applied to the processor based on the monitored voltage levels.
Inventor(s): Adam Thomas Stallman of Rochester MN (US) for international business machines corporation, Suresh Guduru of Telangana (IN) for international business machines corporation, Ryan K. Cradick of Oronoco MN (US) for international business machines corporation
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0614
Abstract: an example computer-implemented method for mirroring memory in a disaggregated memory clustered environment is provided. the method includes assigning, by a hypervisor, a disaggregated memory to a virtual machine comprising a remote disaggregated memory, the virtual machine being one node of a cluster of the disaggregated memory clustered environment. the method further includes allocating, by a disaggregated memory manager, a mirrored memory for the remote disaggregated memory to mirror the remote disaggregated memory on an alternate node of the cluster of the disaggregated memory clustered environment. the method further includes responsive to a memory access occurring, maintaining, by the disaggregated memory manager, the mirrored memory. the method further includes, responsive to detecting a memory allocation adjustment, modifying, by the disaggregated memory manager, memory usage across the cluster. the method further includes, responsive to detecting a failure resulting in loss of access to the remote disaggregated memory, implementing a corrective action.
Inventor(s): Stefano Ambrogio of San Jose CA (US) for international business machines corporation, Andrea Fasoli of San Jose CA (US) for international business machines corporation
IPC Code(s): G06F7/544, G06F7/523, G06N3/065
CPC Code(s): G06F7/5443
Abstract: a scale factor can be determined and applied to input values of an analog neural network implemented by a crossbar array of non-volatile memory devices. an inverse of the scale factor can be applied to synaptic weight values stored by the crossbar array of non-volatile memory devices. operations by the crossbar array can be performed using the scaled input values and the synaptic weight values. the scale factor can be determined for each row of the crossbar array. the scale factor can be determined using a combination of the input values and the synaptic weight values.
Inventor(s): Zachary A. Silverstein of Austin TX (US) for international business machines corporation, Melanie Dauber of New York NY (US) for international business machines corporation, Logan Bailey of Sandy Springs GA (US) for international business machines corporation, Jacob Ryan Jepperson of ROCHESTER MN (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation
IPC Code(s): G06F8/61, H04L9/30, H04L9/32
CPC Code(s): G06F8/61
Abstract: an example operation may include one or more of receiving a request to install a software system via a host platform, where the software system comprises a plurality of software programs of a plurality of providers, respectively, generating a non-fungible token (nft) for a software program from among the plurality of software programs based on a private key, embedding the nft with the software program within the software system and storing provider data of the software program mapped to the nft via a blockchain ledger, and installing the software system via the host platform with the nft embedded therein.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Raghuveer Prasad Nagar of Kota (IN) for international business machines corporation, Jagadesh Ramaswamy Hulugundi of Bangalore (IN) for international business machines corporation, Dinesh Kumar Bhudavaram of Bangalore (IN) for international business machines corporation
IPC Code(s): G06F8/65
CPC Code(s): G06F8/65
Abstract: embodiments of the present invention provide an approach for scheduling a software update on an industrial machine based on a specification, predicted usage and role of the machine. specially, based on a historical learning, the system and method provide for analyzing an activity workflow sequence of a workflow execution in an industrial floor. the analysis includes examining how the industrial machines are collaborating with each other, whether the activities are performed in parallel or in sequence, a time duration involvement of the machines while performing the activities, a time required an installation of the software update, and any scheduled industrial machine maintenance. based on the analysis, an appropriate time and sequence when for software update installation can be performed is identified so that there is little or no negative impact during workflow execution.
Inventor(s): Zhi Li Guan of Beijing (CN) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation, Jun Su of Beijing (CN) for international business machines corporation, Kun Yang of Beijing (CN) for international business machines corporation, Cheng Wu of Beijing (CN) for international business machines corporation
IPC Code(s): G06F8/656, G06F16/11
CPC Code(s): G06F8/656
Abstract: managing container updates is provided. a changed file corresponding to a new version of an application is retrieved from a persistent volume based on a mapping between the new version of the application and the changed file. the changed file corresponding to the new version of the application is loaded in a corresponding file of a running container to update the corresponding file of the running container without redeploying the running container using an updated container image.
Inventor(s): Shailendra Moyal of Pune (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Partho Ghosh of Kolkata (IN) for international business machines corporation
IPC Code(s): G06F8/72, G06F8/77
CPC Code(s): G06F8/72
Abstract: a software application may be analyzed to determine how the software application has performed across numerous dimensions using historical data regarding the software application. this analysis may be for a specific organization. the performance of the software application may be compared to a plurality of modernization options. a modernization option that is determined to perform better than the software application in at least one of the numerous dimensions is identified. a total cost for the organization to realizing the modernization option is calculated. the calculation includes a simulation of personnel of the organization providing services of the organization while integrating the modernization option among a suite of software applications.
Inventor(s): Heng WANG of Beijing (CN) for international business machines corporation, Xiao Ling CHEN of Beijing (CN) for international business machines corporation, Yan HUANG of Beijing (CN) for international business machines corporation, Xin Peng LIU of Beijing (CN) for international business machines corporation, Zi Yun KANG of Handan (CN) for international business machines corporation
IPC Code(s): G06F9/50
CPC Code(s): G06F9/5033
Abstract: unloading shared resources is described. a shared library correlation table (slct) is generated in a mock resource. during a close function, selecting an entry in the slct is selected for reducing a reference count of the selected entry in the slct, a status of the selected entry based on the reference count is verified, and an associated container of the selected entry is removed from memory when the status of the selected entry indicates the associated container is not a shared resource, thereby avoiding segmentation faults.
Inventor(s): Paul Llamas Virgen of Guadalajara (MX) for international business machines corporation, Priyansh Jaiswal of Boca Raton FL (US) for international business machines corporation, Peeyush Jaiswal of Boca Raton FL (US) for international business machines corporation
IPC Code(s): G06F9/50
CPC Code(s): G06F9/5038
Abstract: managing high-demand physical resource usage is provided. an identification of a first physical resource to track availability of the first physical resource via an on-demand virtual queue is received from a first user. an image of the first physical resource is uploaded to the on-demand virtual queue. the image containing metadata regarding a geographic location of the first physical resource. a request to utilize the first physical resource is received from a second user. the second user is added to the on-demand virtual queue for the first physical resource. an indication that the first physical resource is available with the geographic location of the first physical resource is sent to the second user who is first in the on-demand virtual queue. the second user is removed from the on-demand virtual queue in response to receiving an indication that the second user finished utilizing the first physical resource.
Inventor(s): Jakob Christopher Lang of Walddorfhäslach (DE) for international business machines corporation, Utz Bacher of Dettenhausen (DE) for international business machines corporation
IPC Code(s): G06F9/50
CPC Code(s): G06F9/505
Abstract: a computer-implemented method of using a workload management system designed for workloads of a first computing architecture as well as for workloads of a second computing architecture is disclosed. the method comprises deploying a workload management control plane under a first computing architecture, identifying, by the workload management control plane, a requested remote workload only available for the second computing architecture, creating, by the workload management control plane, a proxy compute resource as interface for the requested remote workload, starting, by the proxy compute resource, the remote workload, controlling, by the proxy compute resource, an operation of the remote workload in a 1:1 relationship, by: upon receiving a termination signal, terminating the remote workload by the proxy compute resource and self-terminating the proxy compute resource, and upon a termination of the remote workload terminate the proxy compute resource.
Inventor(s): Rong Nickle Chang of Pleasantville NY (US) for international business machines corporation, Kumar Bhaskaran of Englewood Cliffs NY (US) for international business machines corporation
IPC Code(s): G06F9/54, H04L41/50
CPC Code(s): G06F9/547
Abstract: a method, computer program product, and computer system for performing an application programming interface (api) service using zone-based topics within a publish/subscribe (pub/sub) messaging infrastructure. an api service request sent by a client entity is received and specifies an api service to be fulfilled. a selection of an api service endpoint configured to execute the api service is received. messages are posted to respective pub/sub zone-based topics, resulting in selection of workers subscribed to the respective zone-based topics. each zone-based topic includes tasks to be performed in a specified one or more zones. for each zone-based topic, the tasks of the zone-based topic are implemented by executing the worker selected for the zone-based topic. the tasks of the zone-based topics include invoking the api service endpoint for the requested api service and making a fulfillment result of the api service available to the client entity.
Inventor(s): Dinesh Kumar Bhudavaram of Bangalore (IN) for international business machines corporation, Raghuveer Prasad Nagar of Kota (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Jagadesh Ramaswamy Hulugundi of Bangalore (IN) for international business machines corporation
IPC Code(s): G06F11/34, G06F9/451
CPC Code(s): G06F11/3438
Abstract: provided are a method, system, and computer program product in which a computational device generates information on an application switch by a user from a first application in a first device to a second application in a second device. additional information continues to be generated on application switches on the second device. a visualization of the information and the additional information is provided to the user to allow the user to return to a point at which the application switch to the second application in the second device took place from the first application in the first device.
Inventor(s): Sri Harsha Varada of Vizianagaram (IN) for international business machines corporation, Pavan Kumar Penugonda of Anakapalle (IN) for international business machines corporation, Akash U. Dhoot of Pune (IN) for international business machines corporation, Pavan K Manda of Vishakapatnam (IN) for international business machines corporation, Thomas Chang of Port Coquotlam (CA) for international business machines corporation
IPC Code(s): G06F11/36, G06F8/60
CPC Code(s): G06F11/3664
Abstract: computer technology for: (i) determining which version of a software service to use depending upon whether the user requesting the service is a beta tester, and (ii) if the user status of the user requesting a software service is beta tester then: (a) that user will have the newer, testing-phase version of the software service used to fulfill the software service request, and (b) the user will be given an opportunity to provide feedback on the effectiveness and/or performance of the service to effect the beta testing of the new version of the software service under test.
Inventor(s): Bulent Abali of Tenafly NJ (US) for international business machines corporation, Alper Buyuktosunoglu of White Plains NY (US) for international business machines corporation, Ashutosh Mishra of Lagrangeville NY (US) for international business machines corporation, David Trilla Rodriguez of New York NY (US) for international business machines corporation, Craig R. Walters of Highland NY (US) for international business machines corporation
IPC Code(s): G06F12/0802
CPC Code(s): G06F12/0802
Abstract: a computer-implemented method, according to one embodiment, includes determining that a first predetermined pattern is to be written to a first cache line of a cache. in response to the determination, a first bit is set in a first directory instead of writing the first predetermined pattern in the first cache line. the first bit is associated with the first cache line in the first directory. a computer program product, according to another embodiment, includes a computer readable storage medium having program instructions embodied therewith. the program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method. a system, according to another embodiment, includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. the logic is configured to perform the foregoing method.
Inventor(s): Bryan Lloyd of Austin TX (US) for international business machines corporation, David A. Hrusecky of Cedar Park TX (US) for international business machines corporation, Richard J. Eickemeyer of Rochester MN (US) for international business machines corporation, Mohit Karve of Austin TX (US) for international business machines corporation, Dung Q. Nguyen of Austin TX (US) for international business machines corporation, Nicholas R. Orzol of Austin TX (US) for international business machines corporation, Sheldon Bernard Levenstein of Austin TX (US) for international business machines corporation, Naga P. Gorti of Austin TX (US) for international business machines corporation
IPC Code(s): G06F12/0875, G06F9/30, G06F9/38
CPC Code(s): G06F12/0875
Abstract: embodiments relate to sideband instruction address translation. according to an aspect, a computer-implemented method includes managing, within a processor, an instruction effective-to-real-address table (i-erat) separate from a main erat, where the i-erat has a smaller storage capacity than the main erat. the method also includes indicating an i-erat hit based on determining that an instruction address for an instruction cache is stored in the i-erat, bypassing an arbitrator within the processor and sending a translated address from the i-erat to the instruction cache based on detecting the i-erat hit, and sending an address translation request through the arbitrator to the main erat based on an i-erat miss and writing a translation result of the main erat to the i-erat.
Inventor(s): Thanh Lam Hoang of Maynooth (IE) for international business machines corporation, Gabriele Picco of Dublin (IE) for international business machines corporation, Lam Minh Nguyen of Ossining NY (US) for international business machines corporation, Dzung Tien Phan of PLEASANTVILLE NY (US) for international business machines corporation
IPC Code(s): G06F16/21, G06F16/22
CPC Code(s): G06F16/211
Abstract: a method, computer program product and system are provided for feature engineering and synthetic data generation. a processor retrieves a plurality of data tables, where the plurality of data tables are heterogeneous in format and content. a processor trains a variational auto-encoder (vae) model on the plurality of data tables. a processor receives an input data table. a processor generates a synthetic data table based on the input data table and the trained vae model.
Inventor(s): Jayachandu Bandlamudi of Guntur (IN) for international business machines corporation, Sreenivasa Rao Pamidala of McLean VA (US) for international business machines corporation, Subil Mathew Abraham of Lewisville TX (US) for international business machines corporation
IPC Code(s): G06F16/22, G06F16/2455
CPC Code(s): G06F16/2237
Abstract: mechanisms are provided for indexing microservices for optimized querying based on microservice attributes. a plurality of application graph data structures are generated with nodes representing microservices and edges representing functionality of microservices. a data transformation is performed on the graphs to generate, for each node, a corresponding microservice document specifying microservice attributes of the corresponding microservice. a machine learning training operation is executed on an embedding computer model based on a plurality of the microservice documents to train the embedding computer model to learn a representation vector space for representing microservices as vector representations. the trained embedding computer model is executed on the microservice documents to generate corresponding vector representations and compile them into entries of a microservice index data structure which is used to process queries for microservices.
Inventor(s): Guang Han Sui of Beijing (CN) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation, Fan Jing Meng of Beijing (CN) for international business machines corporation, Mai Zeng of Beijing (CN) for international business machines corporation, Jun Su of Beijing (CN) for international business machines corporation, Jia Tian Zhong of Beijing (CN) for international business machines corporation
IPC Code(s): G06F16/23, G06F16/27
CPC Code(s): G06F16/2365
Abstract: a method of managing an active-active database system storing a first copy of data records at a first node a second copy of the data records at a second node includes receiving a first set of operations stored at the first node as a first set of local operations, a copy of the first set of operations transmitted to the second node and stored as a first set of remote operations, and receiving a second set of operations stored at the second node as a second set of local operations, a copy of the second set of operations transmitted to the first node and stored as a second set of remote operations. the method includes determining a comparison point by selecting an operation from each of the first set of operations and the second set of operations, and comparing the first copy of the data records to the second copy.
Inventor(s): Hui Wan of White Plains NY (US) for international business machines corporation, Sachindra Joshi of Gurgaon (IN) for international business machines corporation, Boaz Carmeli of Koranit (IL) for international business machines corporation, Marina Danilevsky Hailpern of San Jose CA (US) for international business machines corporation
IPC Code(s): G06F16/2452
CPC Code(s): G06F16/24526
Abstract: techniques for generating a clarification to distinguish among retrieved content in interactive systems are provided. in one aspect, a method for generating a clarification prompt in an interactive system includes: obtaining a training dataset for generating the clarification prompt from existing question-answering datasets by modifying original queries in the existing question-answering datasets to obtain training examples of under-specified queries; and training a machine learning model using the training dataset how to select latent differentiating factors in content candidates obtained from an under-specified query from a user and, based on the latent differentiating factors, generate the clarification prompt to clarify an intent of the user.
Inventor(s): Fabiana Fournier of Giva Ela (IL) for international business machines corporation, Skarbovsky Yudovich Inna of Haifa (IL) for international business machines corporation, Guy Amit of Tel Aviv (IL) for international business machines corporation, Lior Limonad of Afek (IL) for international business machines corporation
IPC Code(s): G06F16/2457, G06F16/242
CPC Code(s): G06F16/24578
Abstract: providing a machine-generated explanation of an outcome of a process execution engine includes inputting into a complex event processing (cep) engine at least one predetermined event pattern specification and a sequence of events, the sequence of events generated, at least in part, by a process execution engine executing a predetermined process in real time. using the cep engine, an enriched event log is generated based on the input. the enriched event log includes the sequence of events and additionally includes one or more situational events corresponding to one or more of the sequence of events. the one or more situational events are derived by the cep engine based on the at least one predetermined event pattern specification. a hypothesis-oriented, situationally aware explanation for the outcome of the predetermined process is determined using an artificial intelligence (ai) explainability framework with input of the enriched event log.
Inventor(s): Rajesh Bordawekar of Westchester NY (US) for international business machines corporation
IPC Code(s): G06F16/28, G06F16/242
CPC Code(s): G06F16/285
Abstract: clustering data points of a relational database having special data types is performed by establishing logarithmic bins in which the data is collected. special data types include (i) zero; (ii) positive and negative values; (iii) infinity (positive and negative); (iv) not-a-number values (nans); (v) out-of-range values; and (vi) ieee decfloat (decimal floating-point) values. the numerical data is mapped to bins according to their values and redistributed among the bins based on median bin value. an occupancy-based partitioning process assures each bin has no more than a pre-defined threshold percentage of the data. assigning data bins to clusters facilitates prediction of placement of input values into a particular cluster for response to database queries.
Inventor(s): Elham Khabiri of Briarcliff Manor NY (US) for international business machines corporation, Yingjie Li of Chappaqua NY (US) for international business machines corporation, Bhavna Agrawal of Armonk NY (US) for international business machines corporation, Anuradha Bhamidipaty of Yorktown Heights NY (US) for international business machines corporation, Joseph M. Lindquist of Highland Mills NY (US) for international business machines corporation
IPC Code(s): G06F16/35, G06F18/2325, G06F40/295, G06F40/30
CPC Code(s): G06F16/35
Abstract: various systems and methods are presented regarding code-based pattern extraction (code-pe) and the application of code-pe to a named entity recognition pipeline. patterns can be generated from named entities, wherein the entities have an assigned type. codes are identified within the entities, subsequently vectorized and clustered based upon the presence of the identified codes. patterns are identified for the respective clusters. the patterns can be applied to an untyped entity, in the event of the pattern matching, the entity can be typed with the type assigned to the pattern. the typed entity can be used to recursively update knowledge regarding typed- and untyped-entities. in the event a pattern incorrectly types an entity, the pattern can be retrained with the updated knowledge.
Inventor(s): Geoffrey Burr of Cupertino CA (US) for international business machines corporation, HsinYu Tsai of Cupertino CA (US) for international business machines corporation, Irem Boybat Kara of Adliswil (CH) for international business machines corporation, Martin Michael Frank of Dobbs Ferry NY (US) for international business machines corporation
IPC Code(s): G06F12/02, G06F17/16
CPC Code(s): G06F12/0207
Abstract: a system, method and computer program product for assigning deep neural network (dnn) weight matrices to a compute-in-memory (cim) accelerator system, and particularly, efficient allocation strategies for assigning dnn model weight-layers to two-dimensional (2d) tiers of three-dimensional (3d) crossbar array tiles. such efficient allocation strategies for assigning dnn model weight-layers to tiers and tiles of a cim accelerator are optimized to minimize contention, latency and dead-time, and to maximize accelerator throughput. in one scenario, efficient allocation strategies include assigning dnn weight matrices to the 2d tiers of a 3d crossbar array tile to maximize throughput and minimize completion latency for a finite-batch-size example of an incoming workflow. in a further scenario, efficient allocation strategies assign dnn weight matrices to the 2d tiers of a 3d crossbar array tile to minimize dead-time-latency-before-next-batch-member-can-be-input in an infinite-batch-size or a continuous workflow scenario.
Inventor(s): SAMPATH DECHU of Acton MA (US) for international business machines corporation, Neelamadhav Gantayat of Bangalore (IN) for international business machines corporation, Avirup Saha of Kolkata (IN) for international business machines corporation, Dharma Teja Atluri of Hyderabad (IN) for international business machines corporation
IPC Code(s): G06F18/23211, G06F18/2415, G06F40/166, G06F40/289, G06F40/35
CPC Code(s): G06F18/23211
Abstract: mechanisms are provided for automated generation of an electronic form for an electronic messaging subsystem. historical conversation logs are obtained from the electronic messaging subsystem which comprise a plurality of communication sequences. communication sequences within the historical conversation logs are clustered according to similarity of features. for each cluster the following operations are performed: identifying, within the cluster, sequences of normalized utterances that are repeated across communication sequences of the cluster; categorizing each sequence, in a set of the sequences of normalized utterances, as to whether the sequence can be represented as one or more electronic forms; and extracting, for each communication sequence in the cluster, attributes and corresponding attribute values. one or more electronic form data structures are generated based on the attributes and corresponding attribute values extracted for each communication sequence in the cluster.
Inventor(s): Jonathan Ian Settle of Dursley (GB) for international business machines corporation, Fred Harald Klein of Berlin (DE) for international business machines corporation, Zane Clayton Bray of London (GB) for international business machines corporation, Isabell Sippli of Metzingen (DE) for international business machines corporation
IPC Code(s): G06F18/2415, G06F9/38
CPC Code(s): G06F18/2415
Abstract: predicting the formation of event groups in complex and enterprise-related information technology (it) environments is provided. in some instances, an event pattern is predicted based upon events arriving within a duration that matches a historical pattern for an event and surpasses a user-defined threshold of events that are received. this predicted event pattern is used to monitor incoming events in order to alert an operator or site reliability engineer (sre) that a certain percentage of events from the predicted pattern are received. in another instance, receiving an event automatically triggers the formation of an event group, with the event group having information relating to the received event and a series of placeholder events. as more events are received, these newly received events individually replace the placeholder events in the event group.
Inventor(s): Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation
IPC Code(s): G06F21/44, G06F21/73, G11C7/24, H01L23/525, H01L29/06
CPC Code(s): G06F21/44
Abstract: methods and structure are provided for programming an array of bit cells to create a unique identification code for a semiconductor structure. random failure of a gate dielectric at a transistor is utilized to generate a binary identification code. a portion of the gate is located above a source and a portion is located above a drain, a first logic state can be applied where the gate dielectric fails source-side and a second logic state can be applied where the gate dielectric fails drain-side. the gate dielectric preferentially fails as a function of its thinness versus the thickness of a second gate dielectric of a second transistor which acts as a control for failure of the gate dielectric. failure is initiated based upon a voltage applied to both the thin gate dielectric and the thick dielectric. a bit cell can include two or three transistors, e.g., field effect transistors.
Inventor(s): Thomas Hampp-Bahnmueller of Stuttgart (DE) for international business machines corporation, Michael Baessler of Bempflingen (DE) for international business machines corporation, Yannick Saillet of Stuttgart (DE) for international business machines corporation
IPC Code(s): G06F21/62, G06F16/31, G06F16/332
CPC Code(s): G06F21/6245
Abstract: several aspects for optimizing unstructured document analysis comprise operating a document system, where the document system comprises a plurality of documents comprising unstructured content and a full-text index; receiving a request to identify documents comprising a type of data elements; selecting a sample out of the plurality of documents; determining data elements of the type in the sample of documents; determining an indicator context expression for the type of data elements out of the determined data elements of the type; determining a query for searching, using a search engine, the full-text index using the indicator context expression; and determining the documents in the document system being compliant to the determined query.
Inventor(s): Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Martin G. Keen of Cary NC (US) for international business machines corporation, Alexander Reznicek of Troy NY (US) for international business machines corporation, Bahman Hekmatshoartabari of White Plains NY (US) for international business machines corporation
IPC Code(s): G06F30/20
CPC Code(s): G06F30/20
Abstract: a method, computer program, and computer system are provided for structural health monitoring. a signal corresponding to interrogation of sensors embedded within structural components associated with a structure is transmitted by a handheld or vehicle-mounted interrogator. a backscattered response signal including sensor data associated with the structure is received by the interrogator. the sensor data is compared to a threshold value corresponding to a safety factor of the structure. maintenance or manual inspection of the structure is scheduled based on the sensor data being above the threshold value.
Inventor(s): PRETTY MARIAM JACOB of BANGALORE (IN) for international business machines corporation, SWATHI PRIYA S of BANGALORE (IN) for international business machines corporation, SANDEEP KORRAPATI of BANGALORE (IN) for international business machines corporation, ANUSHA REDDY RANGAREDDYGARI of BANGALORE (IN) for international business machines corporation, PULI SRIVANI of HYDERABAD (IN) for international business machines corporation, SREEKANTH REDDY KADAPALA of BANGALORE (IN) for international business machines corporation
IPC Code(s): G06F30/20
CPC Code(s): G06F30/20
Abstract: a method for identifying a transition of a signal from a defined state to an undefined state when simulating a device includes. storing a set of breakpoints, each breakpoint associated with a state of the device and identifying a set of signals from the device. a simulation of the device is executed using simulation, and a current state of the device is determined from values of one or more storage elements of the device. a breakpoint list including one or more breakpoints is selected based on the current state of the device. the set of signals from the device identified by the one or more breakpoints included in the breakpoint list is monitored.
Inventor(s): Gaetano Rossiello of Brooklyn NY (US) for international business machines corporation, Alfio Massimiliano Gliozzo of Brooklyn NY (US) for international business machines corporation, NANDANA SAMPATH MIHINDUKULASOORIYA of Dublin (IE) for international business machines corporation, Faisal Mahbub Chowdhury of Woodside NY (US) for international business machines corporation, Michael Robert Glass of Bayonne NJ (US) for international business machines corporation
IPC Code(s): G06F40/295, G06F16/33, G06F40/103, G06F40/126, G06F40/30, G06F40/40, G06N5/02
CPC Code(s): G06F40/295
Abstract: an embodiment includes generating a training dataset by aligning text from a document of a document database with a named entity from a knowledge base. the embodiment generates an enhanced training dataset by updating the training dataset to include a named entity type and a named entity label associated with the named entity. the embodiment trains a natural language processing (nlp) model using the enhanced training dataset resulting in a trained nlp model. the embodiment identifies, using the trained nlp model, the named entity in a block of unstructured text and generates, using the trained nlp model, a target sequence that includes a relationship between the named entity and a tail entity, as well as the named entity type and the named entity label of the named entity and a tail entity type and a tail entity label of the tail entity.
Inventor(s): Kelley Anders of East New Market MD (US) for international business machines corporation, Jonathan D. Dunne of Dungarvan (IE) for international business machines corporation, Qi Li of Beijing (CN) for international business machines corporation
IPC Code(s): G06F40/40, G06F16/332
CPC Code(s): G06F40/40
Abstract: according to one embodiment, a method, computer system, and computer program product for explaining discourse is provided. the embodiment may include identifying one or more skill levels for one or more users. the embodiment may also include identifying a complexity level corresponding to a piece of content. the embodiment may further include determining an explanation level for the piece of content based on the complexity level of the piece of content and a target skill level from the one or more skill levels. the embodiment may also include generating an explanation for the piece of content according to the explanation level. the embodiment may further include providing the explanation to a target user.
Inventor(s): Fausto Martelli of Stockton Heath (GB) for international business machines corporation, Bruce Gordon ELMEGREEN of Goldens Bridge NY (US) for international business machines corporation, MALGORZATA JADWIGA ZIMON of Warrington (GB) for international business machines corporation, Kyong Min Yeo of Scarsdale NY (US) for international business machines corporation
IPC Code(s): G06N3/0499
CPC Code(s): G06N3/0499
Abstract: a sparse topology for a feedforward neural network is generated, where connectivity is based on a substantially hyperuniform topology. the feedforward neural network with the sparse topology is trained using a set of training data and a processing task is performed using the trained feedforward neural network.
Inventor(s): Nanbo Gong of White Plains NY (US) for international business machines corporation, Takashi Ando of Eastchester NY (US) for international business machines corporation, Guy M. Cohen of Westchester NY (US) for international business machines corporation, Malte Johannes Rasch of Chappaqua NY (US) for international business machines corporation
IPC Code(s): G06N3/065, G06F12/02, G06N3/0985
CPC Code(s): G06N3/065
Abstract: analog memory-based activation function for an artificial neural network can be provided. an apparatus can include at least two non-volatile memory devices connected in parallel such that the current can flow through one of the two non-volatile memory devices depending on the voltage level driving the current. to control which branch an input current flows through, each of the two non-volatile memory devices can be connected to a circuit element that can function as a switch, for example, a diode such as a semiconductor diode, a transistor, or another circuit element. such apparatus can implement an analog memory-based activation function, for example, for an analog memory-based artificial neural network.
Inventor(s): Kumudu Geethan Karunaratne of Gattikon (CH) for international business machines corporation, Michael Andreas Hersche of Zurich (CH) for international business machines corporation, Giovanni Cherubini of Rueschlikon (CH) for international business machines corporation, Abu Sebastian of Adliswil (CH) for international business machines corporation, Abbas Rahimi of RUESCHLIKON (CH) for international business machines corporation
IPC Code(s): G06N3/08, G06N3/0464
CPC Code(s): G06N3/08
Abstract: the present disclosure relates to training a classifier. the classifier includes a controller and an explicit memory. the training may include iteratively receiving one or more second training datasets, each comprising second data samples of a set of one or more associated novel classes, adding to the explicit memory one or more second output vectors indicative of the set of one or more associated novel classes, in response to providing the one or more second training datasets to the classifier, retraining the classifier using the one or more second training datasets and the first training dataset by minimizing a distance between the one or more second output vectors and the one or more prototype vectors, determining a set of updated prototype vectors indicative of first training dataset and the one or more second training datasets, and updating the explicit memory with the set of updated prototype vectors.
Inventor(s): Mudhakar Srivatsa of White Plains NY (US) for international business machines corporation, Satishkumar Sadagopan of Leawood KS (US) for international business machines corporation, Utpal Mangla of Toronto (CA) for international business machines corporation, Dinesh C. Verma of New Castle NY (US) for international business machines corporation, Gerald Coon of Durham NC (US) for international business machines corporation, Mathews Thomas of Flower Mound TX (US) for international business machines corporation
IPC Code(s): G06N5/04
CPC Code(s): G06N5/04
Abstract: a computer-implemented method, according to one embodiment, includes determining a plurality of downstream task models of a foundation model, and arranging the downstream task models into a logical tree structure. each node of the logical tree structure represents a sequence of layers of an associated one of the downstream task models. in response to a determination that a request for inferencing on a target model has resulted in a cache miss occurring, the logical tree structure is used to identify an inferencing server that satisfies at least a first predetermined prerequisite for fulfilling the inferencing request. the method further includes causing the identified inferencing server to fulfill the inferencing request. a computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. the program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method.
Inventor(s): Stefan A. G. Van Der Stockt of Austin TX (US) for international business machines corporation, ERIKA AGOSTINELLI of Bristol (GB) for international business machines corporation, Edward James Biddle of Winchester (GB) for international business machines corporation, Sourav Mazumder of Contra Costa CA (US) for international business machines corporation
IPC Code(s): G06N5/045, G06N5/022
CPC Code(s): G06N5/045
Abstract: a method, system, and computer program product generate precomputed explanation scores in ai systems. the method includes obtaining a set of labeled transactions comprising input features and corresponding output labels generated by a machine learning (ml) model and generating an explainable artificial intelligence (xai) module. the generating includes clustering the labeled transactions based on the input features, scoring homogeneity of the clustered transactions based on the corresponding output labels, and selecting at least one cluster from the clustered transactions based on the homogeneity scoring. the generating further includes obtaining, by an explainability model, explainability scores for transactions in the at least one cluster, generating a unified explainability score for the at least one cluster based on the explainability scores, and storing the unified explainability score in a set of precomputed explanations.
Inventor(s): Jun Doi of Yokohama-shi (JP) for international business machines corporation, Hiroshi Horii of Tokyo (JP) for international business machines corporation
IPC Code(s): G06N10/20
CPC Code(s): G06N10/20
Abstract: a method, system and computer program product for reducing the number of shots required to perform a noisy circuit simulation. a noise model, such as the pauli noise model or the kraus noise model, is applied to each shot of the quantum circuit, where the noise model randomly selects a gate operation to be performed in simulating the quantum circuit. a subset of shots are identified (e.g., shot numbers 1 and 3), where each of the selected subset of shots has the same gate operation(s) selected by the noise model to be performed in simulating the quantum circuit. a single simulation of the quantum circuit will then be performed for such a subset of shots using the selected gate operation (e.g., pauli z gate) for such a group of shots. in this manner, the number of shots required to perform a noisy circuit simulation is reduced.
Inventor(s): Petar Jurcevic of Yorktown Heights NY (US) for international business machines corporation, Helena Zhang of White Plains NY (US) for international business machines corporation, Lev Samuel Bishop of Dobbs Ferry NY (US) for international business machines corporation
IPC Code(s): G06N10/70, G06N10/60
CPC Code(s): G06N10/70
Abstract: a method, system and computer program product for mitigating errors in measurements from a quantum system. a discriminator is trained to classify the measurement results of the quantum states of qubits as corresponding to a first quantum state (e.g., quantum state of 0) or a second quantum state (e.g., quantum state of 1). a first region of trust (corresponding to trusted measurements of a first quantum state) with a first discriminator boundary and a second region of trust (corresponding to trusted measurements of a second quantum state) with a second discriminator boundary are defined using the trained discriminator. if a shot-to-shot measurement result of a qubit state falls outside such regions of trust, the measurement result is rejected. in this manner, measurement errors from a quantum system are effectively mitigated, including measurement errors involving shot-to-shot measurement results of the quantum states read from the execution of the quantum circuits.
Inventor(s): Don Joven Ravoy Agravante of Tokyo (JP) for international business machines corporation, Michiaki Tatsubori of Tokyo (JP) for international business machines corporation
IPC Code(s): G06N20/00
CPC Code(s): G06N20/00
Abstract: a computer-implemented method in a model-based reinforcement learning (rl) system with logic states includes switching an agent between a first mode and a second mode, the first mode being a probabilistic planning mode and the second mode being an information gathering mode. in response to the agent being in the probabilistic planning mode, the agent computes a predictive state representation, given a history of observations and actions taken, and the agent scores action candidates based on planning with the predictive state representation so that actions with resolved plans with confidence to achieve a goal state are scored higher than actions without resolved plans. in response to the agent being in the information gathering mode, the agent scores action candidates based on a q function of a value of expected information to be gathered from a given pair of state and action.
Inventor(s): Nagarjuna Surabathina of Prakasam(dt) (IN) for international business machines corporation, Nitin Gupta of Saharanpur (IN) for international business machines corporation, Shramona Chakraborty of Howrah (IN) for international business machines corporation, Hima Patel of Bengaluru (IN) for international business machines corporation, Sameep Mehta of Bangalore (IN) for international business machines corporation, Ramkumar Ramalingam of Theni (IN) for international business machines corporation, Matu Agarwal of Bangalore (IN) for international business machines corporation
IPC Code(s): G06N20/00, G06N3/004
CPC Code(s): G06N20/00
Abstract: a method, computer program product, and computer system for transforming sets of source data having different formats into respective sets of target data having a same format. n source patterns are determined and respectively describe n different formats in which n sets of source data items are formatted, where n≥1. a target format pattern is determined and describes a target format in which a target data items are formatted. n graphs are generated and respectively describe transformations of the n source patterns to the target pattern. each graph includes multiple transformation paths. each transformation path transforms the source pattern to the target pattern in a manner that maps source strings in the source pattern to each target string in the target pattern. a single transformation path is selected from the multiple transformation paths resulting in n single transformation paths having been selected.
Inventor(s): Samuel Solomon Ackerman of Haifa (IL) for international business machines corporation, Orna Raz of Haifa (IL) for international business machines corporation, Eitan Daniel Farchi of Pardes Hana-Karku (IL) for international business machines corporation, Marcel Zalmanovici of Kiriat Motzkin (IL) for international business machines corporation
IPC Code(s): G06N20/00
CPC Code(s): G06N20/00
Abstract: a computer hardware system includes a slice generator and a policy generator and performs the following. the slice generator slices a first dataset including true values and predicted values of a class variable into a plurality of slices each defining a plurality of observations within the first dataset. a first one and another one of the plurality of slices are selected, and a union of observations is generated by adding observations within the selected another one to observations within the selected first one of the plurality of slices. the selecting another one of the plurality of slices and the generating the union is repeated until a number of observations within the union reaches a predetermined value. using the policy generator and after the number of observations within the union reaches the predetermined value, an error policy is generated. the predicted values were generated by a machine learning engine.
Inventor(s): Matthew Richard Arnold of Yorktown Heights NY (US) for international business machines corporation, Eric Donald Wayne of Durham NC (US) for international business machines corporation, Saloni Potdar of Jersey City NJ (US) for international business machines corporation
IPC Code(s): G06N20/00
CPC Code(s): G06N20/00
Abstract: methods, systems, and computer program products for configuring artificial intelligence-based virtual assistants using response modes are provided herein. a computer-implemented method includes configuring multiple response modes in connection with at least one artificial intelligence-based virtual assistant, each response mode corresponding to a respective set of operational settings for the at least one artificial intelligence-based virtual assistant; implementing, for the at least one artificial intelligence-based virtual assistant, one of the multiple response modes based at least in part on at least one user request submitted to the at least one artificial intelligence-based virtual assistant and one or more items of data associated with the at least one artificial intelligence-based virtual assistant; and configuring at least one workflow to be carried out by the at least one artificial intelligence-based virtual assistant in response to the at least one user request and in accordance with the implemented response mode.
Inventor(s): Sudhanshu Sekher Sar of Bangalore (IN) for international business machines corporation, Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Satyam Jakkula of Bengaluru (IN) for international business machines corporation
IPC Code(s): G06Q10/083
CPC Code(s): G06Q10/083
Abstract: techniques are described with respect to a system, method, and computer product for delivering package in a risk-free walkway. an associated method includes generating location profile associated with a location and analyzing a user profile associated with a user. the method further including determining an optimal path for delivery of package associated with the user based on the location profile and deploying a robot designed to utilize the optimal path to deliver package based on the user profile.
Inventor(s): Siddhartha SOOD of Ghaziabad (IN) for international business machines corporation, Sandip GOSWAMI of Kolkata (IN) for international business machines corporation, Rahul ROY of Kolkata (IN) for international business machines corporation, Biswanath MUKHERJEE of Kolkata (IN) for international business machines corporation, Jaydeep SARKAR of Kolkata (IN) for international business machines corporation
IPC Code(s): G06Q10/087
CPC Code(s): G06Q10/087
Abstract: an enhanced system and methods implement intelligent decision making autonomous control of unit load devices (ulds) within a prescribed airport perimeter, such as an airport. an intelligent autonomous uld control tower (iauct) receives demands for ulds, maintains a uld repository data store, and controls ulds within the prescribed airport perimeter. the iauct identifies at least a uld state and a specific uld position for the uld within a prescribed airport perimeter, and stores the uld state and specific uld position in a uld repository data store. the iauct selects a next action for the uld based upon the demand for ulds and based upon the uld state and specific uld position and the demand for ulds within the perimeter area. the iauct dynamically identifies an optimized route for moving the uld within the prescribed airport perimeter based upon the selected next action.
Inventor(s): Christine Mary Bunke of Fishkill NY (US) for international business machines corporation, Terry Staarmann of Boulder CO (US) for international business machines corporation, Lee N. Helgeson of Rochester MN (US) for international business machines corporation, Hongmei Li of Pleasant Valley NY (US) for international business machines corporation
IPC Code(s): G06Q10/10, H04L51/42
CPC Code(s): G06Q10/10
Abstract: mechanisms are provided which generate an action recommendation for a received electronic communication. a machine learning (ml) computer model is trained at least by executing a ml training operation based on electronic communication features extracted from a plurality of historical electronic communications and actions taken by a user in response to each historical electronic communication. the ml computer model is trained to predict an action classification that specifies a predicted action that the user will take in response to receiving electronic communications. a new electronic communication is received and electronic communication features are extracted from the new electronic communication. the extracted features are processed by the trained ml computer model to generate a predicted action classification and an action recommendation output specifying a recommended action to take corresponding to the predicted action classification for the new electronic communication.
Inventor(s): Dzung Tien Phan of Pleasantville NY (US) for international business machines corporation, Nianjun Zhou of Chappaqua NY (US) for international business machines corporation, Pavankumar Murali of Ardsley NY (US) for international business machines corporation
IPC Code(s): G06Q10/20, G06Q10/0631
CPC Code(s): G06Q10/20
Abstract: a graph representing a current state of a set of assets is constructed, a weighted node in the graph representing an asset in the set of assets, a weighted edge in the graph representing a connection between two assets in the set of assets, a weight of the weighted node determined using an asset health score of the asset, a weight of the weighted edge determined according to an importance of the connection. a divergence between the graph and a previous graph representing a previous state of the set of assets is scored, the scoring resulting in a divergence score. responsive to the divergence score being above a threshold score, a current maintenance schedule of the set of assets is adjusted, the adjusting resulting in an adjusted maintenance schedule.
Inventor(s): DIVYA MAHESHWARI of Scottsdale AZ (US) for international business machines corporation, SETHU ADHYAM of Bangalore (IN) for international business machines corporation, DEEPAK Gupta of Indirapuram (IN) for international business machines corporation, SIDDHARTH K. SARAYA of Raniganj (IN) for international business machines corporation
IPC Code(s): G06Q20/02, G06Q20/38, G06Q20/40
CPC Code(s): G06Q20/02
Abstract: techniques are described with respect to a system, method, and computer product for maximizing payment options. an associated method includes generating a trusted chain comprising a plurality of data cells, the data cells including at least payment device data of a payment device associated with a user within a trusted network; transmitting a broadcast message to the plurality of data cells based on a selection of an option of the payment device, the broadcast message indicating occurrence of a transaction event within the trusted network involving the option; and generate a sub-chain of the trusted chain associated with the transaction event relating to the option. the method further including selecting the data cell of the plurality data cells comprising payment device data associated with the sub-chain; and closing the sub-chain based on a detected completion of the transaction event.
Inventor(s): Hamid Majdabadi of Ottawa (CA) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Su LIU of Austin TX (US) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation
IPC Code(s): G06Q30/0601, G06Q10/087
CPC Code(s): G06Q30/0635
Abstract: intelligent food order selection and fulfillment includes providing an electronic food item ordering platform through which users build and place electronic orders for food items, maintaining, for a user, a food item profile that includes preferences of the user relating to food item usage, receiving an electronic order for food items that includes perishable food items, receiving a planned schedule of use of the food items, identifying quality date requirements for the perishable food items based on the planned schedule of use, and determining a food item selection and order fulfillment strategy for selecting the perishable food items from a supplier food item inventory and fulfilling the electronic order, where the determining is based on the identified quality date requirements, known quality dates of the supplier food item inventory, and differences in cost, to the user, between interchangeable perishable food items with differing quality dates.
Inventor(s): Ryo Kawahara of Toshima-ward (JP) for international business machines corporation, Mikio Takeuchi of Yokohama (JP) for international business machines corporation
IPC Code(s): G06Q40/02, G06N20/00
CPC Code(s): G06Q40/02
Abstract: input data is obtained and converted into a graph. based on the converted input data, a time series of snapshot graphs is generated by selecting edges whose timestamps are in a given time window for each of a plurality of time windows, each edge having a corresponding attribute. internal flow probabilities are computed for each snapshot graph of the time series of snapshot graphs and a system is controlled based on the internal flow probabilities.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation, Satyam Jakkula of Bengaluru (IN) for international business machines corporation, Binoy Thomas of Kozhikode (IN) for international business machines corporation
IPC Code(s): G06T17/00, G06F3/01, G06F3/16, G06T13/20, G06T13/40
CPC Code(s): G06T17/00
Abstract: a computer-implemented method, according to one embodiment, includes outputting a first virtual reality (vr) environment representation for display on a plurality of vr devices. first inputs received from participants using the vr devices are analyzed to determine whether to output a second vr environment representation. the method further includes determining, based on the analysis, a second vr environment representation and a first transitional sequence for the vr devices to output while transitioning from displaying the first vr environment representation to displaying the second vr environment representation. the second vr environment representation and the first transitional sequence are output for display on the vr devices. in response to a determination that a first of the participants has performed a predetermined gesture, a second transitional sequence for the vr devices to output while transitioning from the second vr environment representation back to the first vr environment representation is output.
Inventor(s): Fang Lu of Billerica MA (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation
IPC Code(s): G06T17/00
CPC Code(s): G06T17/00
Abstract: a method establishes a virtual reality environment for simulating operation of the digital twin model and operates the digital twin model in the virtual reality environment. the digital twin model receives operational parameters from the virtual reality environment in order to determine operational effectiveness of the digital twin model in operating within the virtual reality environment. the method further enables a user to visualize the operation of the digital twin model in the virtual reality environment. in certain embodiments, the method provides a second digital twin model of a second physical object and operates the second digital twin model in the virtual reality environment along with the first digital twin model. this may enable assessment of the interaction between the two digital twin models and/or how operation of one digital twin model may affect operation of the other digital twin model. a corresponding system and computer program product are also disclosed.
Inventor(s): Sudhanshu Sekher Sar of Bangalore (IN) for international business machines corporation, Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Satyam Jakkula of Bengaluru (IN) for international business machines corporation
IPC Code(s): G06T19/00, H04L67/306
CPC Code(s): G06T19/006
Abstract: techniques are described with respect to a system, method, and computer product for managing a risk-free walkway. an associated method includes defining a virtual space in augmented reality and determining a geofence between at least a contaminated area and the risk-free walkway that avoids the contaminated area. the method further includes rendering augmented reality content in the virtual space with the risk-free walkway being associated with a user.
Inventor(s): Aaron K. Baughman of Cary NC (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Micah Forster of Round Rock TX (US) for international business machines corporation, Kavitha Hassan Yogaraj of Bangalore (IN) for international business machines corporation
IPC Code(s): G06V20/40, G06V10/22, G06V10/764
CPC Code(s): G06V20/41
Abstract: an embodiment includes selecting, using a first attribute of a first object, the first object in a first volumetric video. the embodiment also includes selecting, using a second attribute of a second object, the second object in a second volumetric video, where the first attribute and the second attribute satisfy an aggregation rule. the embodiment also includes generating an aggregated volumetric video from the first volumetric video and the second volumetric video, where the generating of the aggregated video comprises rendering the first object and the second object simultaneously in the aggregated volumetric video based on the aggregation rule.
Inventor(s): Su Liu of Austin TX (US) for international business machines corporation, David Jason Hunt of Kirkwood MO (US) for international business machines corporation, NEIL DELIMA of Scarborough (CA) for international business machines corporation, John Walicki of Ridgewood NJ (US) for international business machines corporation
IPC Code(s): G10L15/26, H04L65/403
CPC Code(s): G10L15/26
Abstract: a method, computer program, and computer system are provided for real-time caption generation in an edge computing environment. contexts related to one or more participants using a caption service in a web conference service are monitored. personal characteristics associated with each of the participants are determined based on the monitored contexts. an edge device is selected from among a plurality of edge devices based on the determined personal characteristics. the selected edge device is configured to perform caption conversion a participant from among the participants in the web conference service. a lightweight user accent-oriented caption edge module associated with the selected edge device is customized for the participant. the customized lightweight user accent-oriented caption edge module is deployed to the selected edge device based on a corpus of captions associated with the user accent-oriented caption edge module most closely matching the determined personal characteristics.
Inventor(s): Isaiah Mulang' Onando of Nairobi (KE) for international business machines corporation, Julian Bertram Kuehnert of Nairobi (KE) for international business machines corporation, Sekou Lionel Remy of Nairobi (KE) for international business machines corporation, Charles Muchiri Wachira of Karatina (KE) for international business machines corporation, Aisha Walcott of Nairobi (KE) for international business machines corporation
IPC Code(s): G10L25/63, G08B21/18
CPC Code(s): G10L25/63
Abstract: a method for regulating emotions in conversations is disclosed. in one embodiment, such a method includes monitoring a conversation between participants. the method further divides the conversation into a plurality of utterances and calculates an emotion score for each utterance. the method further determines whether an emotion score of an utterance exceeds a threshold. in the event the emotion score exceeds the threshold, the method intervenes in the conversation in an attempt to return the conversation to a more constructive path. in certain embodiments, this intervention may include taking one or more actions that are specifically tailored to returning the conversation to a more constructive path. in other or the same embodiments, responses or reactions of the participants to the actions are audited to determine if the actions were successful in returning the conversation to a more constructive path. a corresponding system and computer program product are also disclosed.
Inventor(s): Tsuyoshi Miyamura of Yokohama-shi (JP) for international business machines corporation
IPC Code(s): G11B27/10, G11B27/028
CPC Code(s): G11B27/107
Abstract: an end of data set (bod) including a high resolution tape directory (hrtd) is written at a position next to a last written user data set on a tape. when appending a new user data set, the new user data set is written starting from a position next to an end longitudinal position (lpos) of the eod to generate an overwritten bod.
Inventor(s): Giuseppe La Rosa of Fishkill NY (US) for international business machines corporation, Bharat Biyani of Wappingers Falls NY (US) for international business machines corporation, Barry Paul Linder of Hastings-on-Hudson NY (US) for international business machines corporation
IPC Code(s): G11C29/50, G01R31/14, H10B10/00
CPC Code(s): G11C29/50004
Abstract: a semiconductor device configured for individual reliability testing of a bit cell in a static random-access memory (sram). an sram includes a plurality of transistors. a first inverter and a second inverter cross-coupled to the first inverter are constructed of the plurality of transistors. a first access transistor and a second access transistor of the plurality of transistors are configured to share a word line bias. the second inverter and the second access transistor have a shared first gate connection and form respective bit cell devices each with two contacts. at least one contact of each of the respective bit cell devices is a floating diffusion contact, and a second contact of each of the respective bit cells is configured to be individually biased for reliability testing.
Inventor(s): Somnath Ghosh of Clifton Park NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Stuart Sieg of Albany NY (US) for international business machines corporation, Fee Li Lie of Albany NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation
IPC Code(s): H01L21/683, H01L23/544
CPC Code(s): H01L21/6835
Abstract: a semiconductor structure includes a handler substrate and a device substrate bonded to the handler substrate. the handler substrate comprises a trench, and at least one alignment mark in a bottom surface of the trench. one or more dielectric layers are disposed in the trench and on the at least one alignment mark.
Inventor(s): Tsung-Sheng Kang of Ballston Lake NY (US) for international business machines corporation, Tao Li of Slingerlands NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Leon Sigal of Monsey NY (US) for international business machines corporation
IPC Code(s): H01L21/768, H01L21/311, H01L21/8238, H01L23/522, H01L23/528, H01L27/092, H01L29/40, H01L29/423, H01L29/66
CPC Code(s): H01L21/76897
Abstract: semiconductor devices and methods of forming the same include a channel over a backside layer. a dielectric fill is on the backside layer, including a first dielectric material. a gate conductor is on the channel and makes electrical contact with the backside layer through the dielectric fill. a dielectric liner is on sidewalls of the dielectric fill, including a second dielectric material, in contact with the gate conductor at the dielectric fill.
Inventor(s): Kisik Choi of Watervliet NY (US) for international business machines corporation, Nicholas Alexander POLOMOFF of Hopewell Junction NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Terence Hook of Jericho Center VT (US) for international business machines corporation, Matthew Angyal of Stormville NY (US) for international business machines corporation, FEE LI LIE of Albany NY (US) for international business machines corporation
IPC Code(s): H01L23/367, H01L23/00, H01L23/522, H01L23/528
CPC Code(s): H01L23/367
Abstract: semiconductor devices and methods of forming the same include a front-end-of-line (feol) layer. a back-end-of-line (beol) layer includes a thermal transfer structure in contact with the feol layer. a carrier wafer is bonded to the beol layer and includes a thermal dissipation structure in contact with the thermal transfer structure.
Inventor(s): Evan Colgan of Montvale NJ (US) for international business machines corporation, Jae-Woong Nah of Closter NJ (US) for international business machines corporation, Katsuyuki Sakuma of Fishkill NY (US) for international business machines corporation, Kamal K. Sikka of Poughkeepsie NY (US) for international business machines corporation, Joshua M. Rubin of Albany NY (US) for international business machines corporation, Frank Robert Libsch of White Plains NY (US) for international business machines corporation
IPC Code(s): H01L23/473, H01L23/00, H01L25/065, H01L25/18
CPC Code(s): H01L23/473
Abstract: a chip and cooler assembly includes an active or passive interposer that has a front side and a back side. integrated circuit chips are mounted onto the back side of the interposer. each of the chips has a front side that is attached to the interposer and a back side that faces away from the interposer. gaps separate the chips. the assembly also includes a frame that is fitted into the gaps between the chips. the frame is cte-matched to the chips. the frame and the chips define a back side surface. a cooler module is attached to the back side surface. the cooler module is cte-matched to the chips. the cooler module includes a microchannel cooler that is disposed directly against the back sides of the chips and a manifold that is attached to the microchannel cooler opposite the chips. the manifold is cte-matched to the microchannel cooler.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/522, H01L21/768
CPC Code(s): H01L23/5226
Abstract: one or more systems, devices, and/or methods of fabrication provided herein relate to semiconductor devices with discontinuous dielectric caps. according to one embodiment, a semiconductor device can comprise a first level of interconnect wiring, a second level of interconnect wiring, a third level of interconnect wiring, a discontinuous dielectric cap over the second level of interconnect wiring and a skip via connecting the first level of interconnect wiring to the third level of interconnect wiring.
Inventor(s): Brent A. Anderson of Jericho VT (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, REINALDO VEGA of Mahopac NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/522, H01L21/768, H01L29/78
CPC Code(s): H01L23/5226
Abstract: a semiconductor structure is provided that includes a mol and/or beol structure for low resistance, low capacitance and design flexibility. the structure includes a first metal level including a plurality of first metal lines and a plurality of first metal vias located at same level within a first interlayer dielectric material layer, and a second metal level located above the first metal level. the second metal level includes a plurality of second metal lines and a plurality of second metal vias located at a same level within a second interlayer dielectric material layer. the first metal level is formed utilizing a damascene process and the second metal level is formed utilizing a substrative etch. a single metallization is used to provide the first and second metal levels.
Inventor(s): Shravana Kumar Katakam of Lehi UT (US) for international business machines corporation, Tao Li of Slingerlands NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768
CPC Code(s): H01L23/5286
Abstract: semiconductor devices and methods of forming the same include a first semiconductor device in a first device region and a second semiconductor device in a second device region. a dielectric structure between the first device region and the second device region laterally extends part way underneath the first semiconductor device and the second semiconductor device. a buried power rail is under the dielectric structure. a conductive via penetrates the dielectric structure to connect the first semiconductor device to the buried power rail.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Juntao Li of Cohoes NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768, H01L21/8234, H01L23/522, H01L23/532, H01L27/088
CPC Code(s): H01L23/5286
Abstract: semiconductor devices and methods of forming the same include a front-end-of-line (feol) layer including a feol device. a backside power line is on a back side of the feol layer. a conductive structure contacts the feol device at a front side of the feol layer and extends through the feol layer to contact the backside power line. the conductive structure includes a frontside part that includes a metal liner and a first fill material and a backside part that includes a second fill material having an outer surface that aligns with an outer surface of the metal liner.
Inventor(s): Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Reinaldo Vega of Mahopac NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L23/48, H01L23/485, H01L23/498, H01L23/50, H01L25/065
CPC Code(s): H01L23/5286
Abstract: one or more systems, devices, and/or methods of use provided herein relate to a semiconductor device with separate power supplies for front side and backside stacked power distribution. a semiconductor device can include one or more circuits, a first power supply, a second power supply, and a third power supply. the first power supply can be disposed on a first side of the one or more circuits. the second power supply can be disposed on the first side of the one or more circuits. further, the third power supply can be disposed on a second side of the one or more circuits. additionally, the first side of the one or more circuits can be opposite to the second side of the one or more circuits.
Inventor(s): Chen Zhang of Guiderland NY (US) for international business machines corporation, Oleg Gluschenkov of Tannersville NY (US) for international business machines corporation, Junli Wang of Slingerlands NY (US) for international business machines corporation, Somnath Ghosh of Clifton Park NY (US) for international business machines corporation, Dechao Guo of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8238, H01L27/092, H01L29/417
CPC Code(s): H01L23/5286
Abstract: a semiconductor device includes a transistor structure comprising a plurality of source/drain regions. base portions of the plurality of source/drain regions correspond to a second side of the semiconductor device opposite to a first side of the semiconductor device. a plurality of metal lines are disposed on the second side of the semiconductor device, wherein the plurality of metal lines comprise at least a first metal line and a second metal line. at least one dielectric layer is disposed between the first metal line and the second metal line.
Inventor(s): FEE LI LIE of Albany NY (US) for international business machines corporation, Hosadurga Shobha of Niskayuna NY (US) for international business machines corporation, Michael Rizzolo of Delmar NY (US) for international business machines corporation, Aakrati Jain of Albany NY (US) for international business machines corporation, Sagarika Mukesh of ALBANY NY (US) for international business machines corporation, Christopher J. Waskiewicz of Rexford NY (US) for international business machines corporation
IPC Code(s): H01L23/00
CPC Code(s): H01L23/562
Abstract: a semiconductor structure is provided that includes a stress modulating pattern containing bonding dielectric layer. the stress modulating pattern containing bonding dielectric layer can be formed on a wafer, on a device-containing region that is present on a device wafer, or both a wafer and a device-containing region that is present on a device wafer. the stress modulating pattern is composed of a plurality of patterned structures (metal and/or dielectric) that are embedded at least partially within a bonding dielectric layer. warpage modulation can be achieved using such a stress modulating pattern containing bonding dielectric layer.
Inventor(s): Reinaldo Vega of Mahopac NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, David Wolpert of Poughkeepsie NY (US) for international business machines corporation, Takashi Ando of Eastchester NY (US) for international business machines corporation
IPC Code(s): H01L27/06, H01L23/522, H01L23/528, H01L29/66
CPC Code(s): H01L27/0629
Abstract: a logic cell includes a first trench capacitor disposed between and connecting a topside metal layer to a backside metal layer. the first trench capacitor includes an outer plate, connected to a first power rail on the backside metal layer, an inner plate, connected to a second power rail on backside metal layer, and an insulating layer separating the inner plate from the outer plate.
Inventor(s): Su Chen Fan of Cohoes NY (US) for international business machines corporation, Indira Seshadri of Niskayuna NY (US) for international business machines corporation, Jay William Strane of Warwick NY (US) for international business machines corporation, Stuart Sieg of Albany NY (US) for international business machines corporation
IPC Code(s): H01L27/088, H01L21/8234, H01L29/06, H01L29/423, H01L29/775
CPC Code(s): H01L27/088
Abstract: semiconductor devices and methods of forming the same include a lower semiconductor device over a substrate, the lower semiconductor device having a first width. an upper semiconductor device is over the lower semiconductor device. the upper semiconductor device has a second width smaller than the first width. a dielectric structure is over the lower semiconductor device and has a first sidewall that faces the upper semiconductor device and a second sidewall that aligns vertically with a sidewall of the lower semiconductor device.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation
IPC Code(s): H01L27/088, H01L21/822, H01L21/8234, H01L29/417, H01L29/786
CPC Code(s): H01L27/088
Abstract: embodiments are disclosed for a semiconductor device including a top layer having a top vertical-transport field effect transistor (vtfet). further, the semiconductor device includes a bottom layer disposed beneath the top layer, wherein the bottom layer includes a first bottom vtfet. additionally, the semiconductor device includes a first frontside contact that wires, through a first backside contact and a first local interconnect, a bottom source/drain epitaxial of the first bottom vtfet to the back end of line interconnect.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation
IPC Code(s): H01L27/092, H01L21/28, H01L21/822, H01L21/8238, H01L29/06, H01L29/417, H01L29/423, H01L29/66, H01L29/775
CPC Code(s): H01L27/0922
Abstract: a complementary field effect transistor (cfet) device is formed on a semiconductor substrate. the cfet device has a first transistor that is under a second transistor. a filled gate cut is directly adjacent to the sidewall of the gate of the cfet device. the first dielectric material in the gate cut is adjacent to the first transistor. the second dielectric material in the gate cut is adjacent to the second transistor. the two dielectric materials in the gate cut are selected to improve the electrical performance of each of the nfet and the pfet in the cfet device. the first dielectric material can apply a compressive stress to the channels of the first transistor when the first transistor is a pfet to improve the electrical performance of the pfet. when the second transistor is an nfet, the second dielectric material applies a tensile stress to nfet to improve nfet performance.
Inventor(s): Shogo Mochizuki of Mechanicville NY (US) for international business machines corporation, Gen Tsutsui of Glenmont NY (US) for international business machines corporation
IPC Code(s): H01L27/092, H01L21/02, H01L21/822, H01L21/8238, H01L23/535, H01L29/06, H01L29/423, H01L29/66, H01L29/775
CPC Code(s): H01L27/0922
Abstract: a semiconductor device is provided. the semiconductor device includes a stacked field effect transistor (fet) structure. the stacked fet structure includes a bottom fet device and a top fet device. the bottom fet device has a vertically stacked gate-all-around (gaa) nanosheet (ns) structure and a first channel orientation. the top fet device is isolated from the bottom device and has a horizontally stacked structure and a second channel orientation differing from the first channel orientation.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Juntao Li of Cohoes NY (US) for international business machines corporation
IPC Code(s): H01L27/092, H01L21/822, H01L21/8238, H01L23/528, H01L29/06, H01L29/423, H01L29/66, H01L29/775
CPC Code(s): H01L27/0922
Abstract: a semiconductor device is provided. the semiconductor device includes a stacked field effect transistor (fet) structure. the stacked fet structure includes a bottom fet device, a top fet device overlying the bottom fet device, dielectric material interposed between the bottom fet device and the top fet device and a gate tie-down assembly of the top fet device extending through the bottom fet device.
Inventor(s): Brent A. Anderson of Jericho VT (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation
IPC Code(s): H01L27/092, H01L23/498, H01L29/08, H01L29/10, H01L29/66, H01L29/78
CPC Code(s): H01L27/0924
Abstract: embodiments of the invention provide a multi-layer integrated circuit (ic) structure that includes a first transistor, a second transistor, and a contact element. the first transistor includes a first source or drain (s/d). the second transistor includes a second s/d and a gate. the contact element includes substantially horizontal features operable to connect the first s/d of the first transistor to the gate of the second transistor.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Reinaldo Vega of Mahopac NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation
IPC Code(s): H01L27/118, H01L23/528, H01L27/02
CPC Code(s): H01L27/11807
Abstract: embodiments of the invention provide a multi-layer integrated circuit (ic) structure that includes a back-end-of-line (beol) region at a first side of a wafer. a backside region is at a second side of the wafer that is opposite the first side of the wafer. a set of signal lines are in the beol region, and a set of power rails are in the backside region. the set of signal lines includes a substantially constant signal-line pitch between each signal line in the set of signal lines. the set of power rails includes a substantially varying power-rail pitch between each power rail in the set of power rails.
Inventor(s): Tao Li of Slingerlands NY (US) for international business machines corporation, Sagarika Mukesh of Albany NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Nicolas Jean Loubet of Guilderland NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L27/12
CPC Code(s): H01L27/124
Abstract: a semiconductor structure includes a frontside source/drain region, and a dielectric stack disposed on a bottom surface of the frontside source/drain region. the dielectric stack includes a first dielectric layer and a second dielectric layer.
Inventor(s): Chanro Park of Clifton Park NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Juntao Li of Cohoes NY (US) for international business machines corporation
IPC Code(s): H01L27/12, H01L21/768
CPC Code(s): H01L27/1244
Abstract: one or more systems, devices and/or methods of fabrication provided herein relate to forming a via to backside power rail (vbpr) on a semiconductor device. according to one embodiment, a vbpr with a via spacer is formed before a late gate cut is performed to create a replacement metal gate (rmg), wherein the via spacer prevents a short circuit between the vbpr and the rmg. further, the via spacer is removed in locations on the vbpr where a source/drain region is adjacent to the vbpr, allowing a conductive connection between the vbpr and the adjacent source/drain region.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Tao Li of Slingerlands NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Susan Ng Emans of Albany NY (US) for international business machines corporation, Carl Radens of LaGrangeville NY (US) for international business machines corporation, Dureseti Chidambarrao of Weston CT (US) for international business machines corporation
IPC Code(s): H01L29/06, H01L27/092, H01L29/08, H01L29/78
CPC Code(s): H01L29/0642
Abstract: a semiconductor device includes a first gate region and a second gate region. a diffusion break region is between the first gate region and the second gate region. a top surface of the diffusion break region is co-planar with at least one of a top surface of one or more gate contacts and a top surface of one or more source/drain contacts.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Oleg Gluschenkov of Tannersville NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation
IPC Code(s): H01L29/417, H01L21/8238, H01L27/092, H01L29/06, H01L29/08, H01L29/40, H01L29/786
CPC Code(s): H01L29/41733
Abstract: a semiconductor device is provided. the semiconductor device includes a field effect transistor (fet) structure having a source/drain (s/d) region between channel regions, primary epitaxy disposed in the s/d region and a backside contact disposed in contact with and gouging into the primary epitaxy.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Huai Huang of Clifton Park NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Hosadurga Shobha of Niskayuna NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation
IPC Code(s): H01L29/417, H01L21/8238, H01L23/528, H01L27/092, H01L29/06, H01L29/423, H01L29/775
CPC Code(s): H01L29/41766
Abstract: a semiconductor structure with improved backside metal contacts includes a plurality of source/drain regions within a field effect transistor. a backside metal contact is electrically connected to at least one source/drain region of the plurality of source/drain regions. the backside metal contact includes a first taper profile. the semiconductor structure further includes a backside power rail electrically connected to the at least one source/drain region through the backside metal contact. the backside power rail includes a second taper profile that is different from the first taper profile.
Inventor(s): Andrew Gaul of Halfmoon NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Andrew M. Greene of Slingerlands NY (US) for international business machines corporation
IPC Code(s): H01L29/66, H01L27/092, H01L29/06, H01L29/423, H01L29/775
CPC Code(s): H01L29/66439
Abstract: a semiconductor device includes a substrate and a stack of nanosheets supported by the substrate. a plurality of semiconductor channels in the stack of nanosheets includes a top channel. a gate body is coupled to the top channel. the gate body includes a layer of metal positioned on top of the top channel. a spacer body includes a top dielectric layer positioned on top of the layer of metal. a thickness of the layer of metal above the top channel is based on a distance from a bottom surface of the top dielectric layer to a top surface of the top channel.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Shogo Mochizuki of Mechanicville NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation
IPC Code(s): H01L29/78, H01L29/40, H01L29/417, H01L29/66
CPC Code(s): H01L29/7827
Abstract: a semiconductor structure with self-aligned backside trench epitaxy includes a channel fin extending vertically from a bottom source/drain region of a field effect transistor. the bottom source/drain region includes a trench epitaxy later located underneath a bottommost surface of the channel fin. a high-k metal gate stack is disposed along sidewalls of the channel fin. the high-k metal gate is separated from the bottom source/drain region by a bottom spacer. a top source/drain region is located above a topmost surface of the channel fin. the top source/drain region is separated from the high-k metal gate by a top spacer. the semiconductor structure further includes a backside metal contact within a backside interlayer dielectric. the backside metal contact is electrically connected to, and vertically aligned with, the bottom source/drain region.
Inventor(s): Patryk GUMANN of Tarrytown NY (US) for international business machines corporation, Salvatore Bernardo OLIVADESE of Stamford CT (US) for international business machines corporation
IPC Code(s): H01P11/00, G06N10/00, H01B12/02, H01P1/20, H01P1/203, H01P1/22, H01P1/30, H01P3/00, H05K7/20
CPC Code(s): H01P11/001
Abstract: an architecture for, and techniques for fabricating, a thermal decoupling device are provided. in some embodiments, thermal decoupling device can be included in a thermally decoupled cryogenic microwave filter. in some embodiments, the thermal decoupling device can comprise a dielectric material and a conductive line. the dielectric material can comprise a first channel that is separated from a second channel by a wall of the dielectric material. the conductive line can comprise a first segment and a second segment that are separated by the wall. the wall can facilitate propagation of a microwave signal between the first segment and the second segment and can reduce heat flow between the first segment and the second segment of the conductive line.
Inventor(s): Phillip V. Mann of Rochester MN (US) for international business machines corporation, Tyler Smith of Rochester MN (US) for international business machines corporation, Tyler Jandt of Austin TX (US) for international business machines corporation, Sandra J. Shirk/Heath of Rochester MN (US) for international business machines corporation
IPC Code(s): H01R12/72, H01R12/73, H05K1/11
CPC Code(s): H01R12/721
Abstract: a connection system comprises a printed circuit board. the printed circuit board comprises a top face and a bottom face. the printed circuit board also comprises a first edge that is normal to the top face and bottom face. the printed circuit board also comprises a second edge that is normal to the top face and bottom face. the first edge face and second edge face intersect at an angle that is not a straight angle. the connection system also comprises a coplanar card-edge socket on the printed circuit board. the socket comprises a top section that interfaces with the top face of the printed circuit board along the first and second edge faces of the printed circuit board. the socked also comprises a bottom section that interfaces with the bottom face of the printed circuit board along the first and second edge faces of the printed circuit board.
Inventor(s): Bryan Edward Truong of Raleigh NC (US) for international business machines corporation, Derek Brewer of Bowling Green OH (US) for international business machines corporation, Robert Wilhelm of Cheyenne WY (US) for international business machines corporation
IPC Code(s): H02H3/08, H02H1/00, H02H3/04
CPC Code(s): H02H3/08
Abstract: preventing overloading an electrical circuit includes determining, by one or more processors, an electrical load of an electrical circuit including a plurality of power control units each electrically connected to an electronic device and each electrically connected to an electrical output component powered through a circuit breaker set to trip at a safety threshold for the electrical circuit. the one or more processors receive from each of the power control units an electrical load status of the electrical circuit including the determined electrical load, and determine when a new electrical load corresponding to a new electronic device is added to the electrical circuit. the one or more processors determine when the new electrical load will cause the electrical load of the electrical circuit to exceed the safety threshold and, based on the determination, deny power to the new electronic device to prevent tripping the circuit breaker.
Inventor(s): Sarbajit K. RAKSHIT of Kolkata (IN) for international business machines corporation, Sudhanshu Sekher SAR of Bangalore (IN) for international business machines corporation, Sudheesh S. KAIRALI of Kozhikode (IN) for international business machines corporation, Satyam JAKKULA of Bengaluru (IN) for international business machines corporation
IPC Code(s): H02J50/30
CPC Code(s): H02J50/30
Abstract: embodiments of the present disclosure provide an enhanced system and new techniques to implement a multi-vehicle moving power bus for supplying external power to autonomous target vehicles moving on the road. a multi-vehicle power bus controller forms a multi-vehicle moving power bus and controls a roadside laser power-beaming source connecting with autonomous vehicles in the moving power bus and supplying external power to the moving power bus. any target autonomous vehicles in the moving power bus requiring additional power for battery charging are supplied with requested power from the multi-vehicle moving power bus connected to one or more roadside laser power-beaming sources.
Inventor(s): Chia-Yu CHEN of Westchester NY (US) for international business machines corporation, Ankur Agrawal of Chappaqua NY (US) for international business machines corporation, Andrea Fasoli of San Jose CA (US) for international business machines corporation, Kyu-hyoun Kim of Chappaqua NY (US) for international business machines corporation
IPC Code(s): H03M1/38
CPC Code(s): H03M1/38
Abstract: an apparatus includes multiple analog to digital converters. individual analog to digital converters are configured to produce a digital output from an analog input and configured to compute a least significant bit of the digital output by comparing an internal residual voltage for determination of the least significant bit and a residual voltage from another analog to digital converter.
Inventor(s): Heng Wang of Beijing (CN) for international business machines corporation, Ming Zhe Jiang of Beijing (CN) for international business machines corporation, Jun Long Xiang of Beijing (CN) for international business machines corporation, Jian Guo Liu of Beijing (CN) for international business machines corporation, Qi Ye of Shanghai (CN) for international business machines corporation, Xiao Ling Chen of Beijing (CN) for international business machines corporation
IPC Code(s): H04L9/06
CPC Code(s): H04L9/0625
Abstract: data protection using portable data structures includes packaging ciphertext blocks into portable data structures, the ciphertext blocks being produced based on encryption of plaintext blocks according to a block encryption mode that includes dependencies between cryptographic processing of the plaintext blocks, the dependencies including decryption of a first ciphertext block being dependent on a second ciphertext block or decryption processing of the second ciphertext block, the packaging including providing, for each ciphertext block that has a dependency on another ciphertext block, an associated dependency label in the portable data structure in which the ciphertext block is packaged, and distributing the portable data structures to nodes such that portable data structures, of the portable data structures, that package ciphertext blocks between which at least one dependency exists are distributed to different nodes of the nodes.
Inventor(s): Alessandro Sorniotti of Zürich (CH) for international business machines corporation, Elli Androulaki of Zürich (CH) for international business machines corporation, Julia Hesse of Langnau am Albis (CH) for international business machines corporation, Jens Jelitto of Rueschlikon (CH) for international business machines corporation, Ilie Circiumaru of Zürich (CH) for international business machines corporation, Nitin Singh of BANGALORE (IN) for international business machines corporation
IPC Code(s): H04L9/32, G06V40/12, G06V40/16, H04L9/08
CPC Code(s): H04L9/3231
Abstract: a computer-implemented method for privacy preserving authentication augmented with physical biometric proof is disclosed. the computer-implemented method comprises providing an integrated smart entity comprising both, a visual indicator of a physical entity and a persistent memory storing picture identifier data. the visual indicator and the persistent memory are physically inseparable. the computer-implemented method further comprises comparing the visual indicator and a related feature of the physical entity to be authenticated, receiving an output value of a function having the picture identifier data as argument and a verifiable credential. upon determining that the output value of the function and the received verifiable credential are satisfy a matching predicate, confirming the verifiable credential.
Inventor(s): Andrew Low of Stittsville (CA) for international business machines corporation, Zachary Charles Beckett Pywell of Stamford (UA) for international business machines corporation, James McConnell of Ottawa (CA) for international business machines corporation, Nathan James Roane of Gatineau (CA) for international business machines corporation, Troy E. Fisher of Phoenixville PA (US) for international business machines corporation, Dusan Boskovic of Ottawa (CA) for international business machines corporation
IPC Code(s): H04L9/40, H04L61/4511
CPC Code(s): H04L63/0414
Abstract: dns request obfuscation includes generating decoy domain name system (dns) requests for obfuscating dns request activity being handled by a private dns server for an organization, and sending the decoy dns requests to external dns server(s) for resolution, receiving a dns request seeking a dns lookup for a client device, obfuscating the dns request by sending, to an external dns server of the external dns server(s), the dns request interspersed with at least some of the generated decoy dns requests sent to the external dns server, receiving, from the external dns server, a dns response to the sent dns request, and providing the dns response to a source of the dns request.
Inventor(s): Aviv RON of Klachim (IL) for international business machines corporation, Yuval LAPIDOT of Beer Sheva (IL) for international business machines corporation, Alon FREUND of Maale Adumim (IL) for international business machines corporation, Bar HAIM of Sufa (IL) for international business machines corporation, Ilgen Banu YUCEER of London (GB) for international business machines corporation, Amit HAIM of Bat Yam (IL) for international business machines corporation
IPC Code(s): H04L9/40
CPC Code(s): H04L63/1416
Abstract: techniques are provided for generating security response recommendations. in one embodiment, the techniques involve receiving scoring functions, a logical operator selection, a security graph, and external threat intelligence, generating a search pattern based on the scoring functions and the logical operator selection, evaluating the search pattern against a selected node of the security graph to identify a potential security threat represented by the security graph at the selected node, and generating a recommendation based on the evaluation and the external threat intelligence.
Inventor(s): Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): H04L9/40
CPC Code(s): H04L63/1433
Abstract: a computer-implemented method for providing a threat aware service mesh is provided. the method includes extending the threat aware service mesh to accept, in a control plane of the threat aware service mesh, a plugin threat modeling management resource for managing threat model details. the method further includes automatically re-arranging a network policy related to a given service responsive to a high severity vulnerability above a threshold and an associated threat probability being marked against the given service. the method also includes performing a threshold based optimization of removing a particular service from a network policy allowed list responsive to one or more threats against the particular service at one of more different threat levels above a threshold. the method additionally includes assigning default not-allowed policies and only allowing access to restricted services for trust boundaries marked in a threat model of the threat aware service mesh.
Inventor(s): Rong Fu of Ningbo (CN) for international business machines corporation, Jian Dong Yin of Beijing (CN) for international business machines corporation, Hao Sheng of Ningbo (CN) for international business machines corporation, Chuan Qing Yu of Beijing (CN) for international business machines corporation, Wen Wang of Beijing (CN) for international business machines corporation, Kang Zhang of Shanghai (CN) for international business machines corporation
IPC Code(s): H04L67/63, H04L43/16, H04L67/61
CPC Code(s): H04L67/63
Abstract: embodiments relate to dynamic horizontal autoscaling for a multi-tenant service. according to an aspect, a computer-implemented method includes configuring a network computing element to route a plurality of requests from two or more clients to a service in a containerized-networked system. a horizontal service-level autoscaler monitors one or more aspects of the requests to the service from the two or more clients. a new pod including a set of running containers with shared resources in the containerized-networked system is created based at least in part on the horizontal service-level autoscaler determining that at least one of the one or more aspects of the requests exceeds a threshold. a new service mapping is created to accept subsequent requests from one of the two or more clients that triggered creation of the new pod.
Inventor(s): Yi Jie Ma of Beijing (CN) for international business machines corporation, Jing Wen Chen of BEIJING (CN) for international business machines corporation, Jing Ren of Beijing (CN) for international business machines corporation, Zhao Yu Wang of BEIJING (CN) for international business machines corporation, Xizhuo Zhang of Beijing (CN) for international business machines corporation
IPC Code(s): H04N21/858
CPC Code(s): H04N21/858
Abstract: a method, computer program product and computer system are provided to minimize data transfer in an online meeting. a processor initiates an online meeting between at least one broadcaster and at least one viewer. a processor captures actions performed by the at least one broadcaster during the online meeting. a processor converts at least one action performed by the broadcaster to a uniform resource identifier (uri). a processor sends the captured actions including the uri to the at least one viewer, where the captured actions including the uri replicate locally the at least one broadcaster's captured actions on a device associated with the viewer.
Inventor(s): Ashim Dutta of Clifton Park NY (US) for international business machines corporation, Shravana Kumar Katakam of Lehi UT (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation
IPC Code(s): H10N50/80, H10B61/00, H10N50/01
CPC Code(s): H01L43/02
Abstract: a magnetic tunnel junction (mtj) stack, and a metallic encapsulation layer surrounding vertical side surfaces of the mtj stack, electrically and physically connected to a top electrode of the mtj stack. a magnetic tunnel junction (mtj) stack, and a metallic encapsulation layer surrounding vertical side surfaces of the mtj stack, electrically and physically connected to a top electrode of the mtj stack, where a lower horizontal surface of the metallic encapsulation layer is below a bottom electrode contact of the mtj stack. forming a magnetic tunnel junction (mtj) stack and forming a metallic encapsulation layer surrounding vertical side surfaces of the mtj stack, electrically and physically connected to a top electrode of the mtj stack.
Inventor(s): Shravana Kumar Katakam of Lehi UT (US) for international business machines corporation, Ashim Dutta of Clifton Park NY (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation
IPC Code(s): H10N50/80, H10B61/00, H10N50/01
CPC Code(s): H01L43/02
Abstract: a magnetoresistive random access memory (mram) structure, a system, and a method of forming an mram structure. the mram structure may include a bottom electrode. the bottom electrode may include a diffusion barrier. the bottom electrode may further include a dielectric that surrounds one or more sidewalls of the diffusion barrier. the method may include depositing a first dielectric, where a metal component remains uncovered by the dielectric. the method may further include depositing a diffusion barrier on at least the metal component. the method may further include depositing an electrode layer on the first dielectric and the diffusion barrier, resulting in a bottom electrode comprising the electrode layer, the first dielectric, and the diffusion barrier.
Inventor(s): Soon-Cheon Seo of Glenmont NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Takashi Ando of Eastchester NY (US) for international business machines corporation
IPC Code(s): H10N70/00, H10B63/00
CPC Code(s): H10N70/8833
Abstract: a memory device including a trench to a first electrically conductive structure; a first electrode of a conformal electrically conductive material contained within the trench in electrical communication with the first electrically conductive structure and is present on sidewalls of the trench; a switching layer is present in the trench on the first electrode and extends outside the trench; and a second electrode present on the switching layer overfilling the trench. the memory device also includes a contact positioned on a portion of the second electrode that is overfilling the trench to provide that the contact is horizontally offset from the first electrode that is present in the trench.
International Business Machines Corporation patent applications on June 20th, 2024
- International Business Machines Corporation
- B29C64/393
- B29C64/209
- B33Y10/00
- B33Y30/00
- B33Y50/02
- CPC B29C64/393
- International business machines corporation
- B29C64/245
- B60L58/10
- B60L53/60
- B60W40/08
- CPC B60L58/10
- B60W50/14
- B60W60/00
- CPC B60W50/14
- B60W30/06
- G08G1/14
- F25D3/10
- F17C3/08
- F25D3/00
- CPC F25D3/102
- G01C21/34
- G01C21/36
- CPC G01C21/3461
- G01R31/367
- G01R31/382
- H01M10/42
- CPC G01R31/367
- G03F7/00
- G03F7/09
- G03F7/20
- G06K19/06
- CPC G03F7/0005
- G05B19/4099
- CPC G05B19/4099
- G05B19/418
- G06T19/00
- CPC G05B19/41885
- G05D1/10
- B64C39/02
- B64U10/00
- G05D1/00
- H04W12/088
- CPC G05D1/104
- CPC G05D1/1064
- G06F1/30
- G06F1/3203
- CPC G06F1/305
- G06F3/06
- CPC G06F3/0614
- G06F7/544
- G06F7/523
- G06N3/065
- CPC G06F7/5443
- G06F8/61
- H04L9/30
- H04L9/32
- CPC G06F8/61
- G06F8/65
- CPC G06F8/65
- G06F8/656
- G06F16/11
- CPC G06F8/656
- G06F8/72
- G06F8/77
- CPC G06F8/72
- G06F9/50
- CPC G06F9/5033
- CPC G06F9/5038
- CPC G06F9/505
- G06F9/54
- H04L41/50
- CPC G06F9/547
- G06F11/34
- G06F9/451
- CPC G06F11/3438
- G06F11/36
- G06F8/60
- CPC G06F11/3664
- G06F12/0802
- CPC G06F12/0802
- G06F12/0875
- G06F9/30
- G06F9/38
- CPC G06F12/0875
- G06F16/21
- G06F16/22
- CPC G06F16/211
- G06F16/2455
- CPC G06F16/2237
- G06F16/23
- G06F16/27
- CPC G06F16/2365
- G06F16/2452
- CPC G06F16/24526
- G06F16/2457
- G06F16/242
- CPC G06F16/24578
- G06F16/28
- CPC G06F16/285
- G06F16/35
- G06F18/2325
- G06F40/295
- G06F40/30
- CPC G06F16/35
- G06F12/02
- G06F17/16
- CPC G06F12/0207
- G06F18/23211
- G06F18/2415
- G06F40/166
- G06F40/289
- G06F40/35
- CPC G06F18/23211
- CPC G06F18/2415
- G06F21/44
- G06F21/73
- G11C7/24
- H01L23/525
- H01L29/06
- CPC G06F21/44
- G06F21/62
- G06F16/31
- G06F16/332
- CPC G06F21/6245
- G06F30/20
- CPC G06F30/20
- G06F16/33
- G06F40/103
- G06F40/126
- G06F40/40
- G06N5/02
- CPC G06F40/295
- CPC G06F40/40
- G06N3/0499
- CPC G06N3/0499
- G06N3/0985
- CPC G06N3/065
- G06N3/08
- G06N3/0464
- CPC G06N3/08
- G06N5/04
- CPC G06N5/04
- G06N5/045
- G06N5/022
- CPC G06N5/045
- G06N10/20
- CPC G06N10/20
- G06N10/70
- G06N10/60
- CPC G06N10/70
- G06N20/00
- CPC G06N20/00
- G06N3/004
- G06Q10/083
- CPC G06Q10/083
- G06Q10/087
- CPC G06Q10/087
- G06Q10/10
- H04L51/42
- CPC G06Q10/10
- G06Q10/20
- G06Q10/0631
- CPC G06Q10/20
- G06Q20/02
- G06Q20/38
- G06Q20/40
- CPC G06Q20/02
- G06Q30/0601
- CPC G06Q30/0635
- G06Q40/02
- CPC G06Q40/02
- G06T17/00
- G06F3/01
- G06F3/16
- G06T13/20
- G06T13/40
- CPC G06T17/00
- H04L67/306
- CPC G06T19/006
- G06V20/40
- G06V10/22
- G06V10/764
- CPC G06V20/41
- G10L15/26
- H04L65/403
- CPC G10L15/26
- G10L25/63
- G08B21/18
- CPC G10L25/63
- G11B27/10
- G11B27/028
- CPC G11B27/107
- G11C29/50
- G01R31/14
- H10B10/00
- CPC G11C29/50004
- H01L21/683
- H01L23/544
- CPC H01L21/6835
- H01L21/768
- H01L21/311
- H01L21/8238
- H01L23/522
- H01L23/528
- H01L27/092
- H01L29/40
- H01L29/423
- H01L29/66
- CPC H01L21/76897
- H01L23/367
- H01L23/00
- CPC H01L23/367
- H01L23/473
- H01L25/065
- H01L25/18
- CPC H01L23/473
- CPC H01L23/5226
- H01L29/78
- CPC H01L23/5286
- H01L21/8234
- H01L23/532
- H01L27/088
- H01L23/48
- H01L23/485
- H01L23/498
- H01L23/50
- H01L29/417
- CPC H01L23/562
- H01L27/06
- CPC H01L27/0629
- H01L29/775
- CPC H01L27/088
- H01L21/822
- H01L29/786
- H01L21/28
- CPC H01L27/0922
- H01L21/02
- H01L23/535
- H01L29/08
- H01L29/10
- CPC H01L27/0924
- H01L27/118
- H01L27/02
- CPC H01L27/11807
- H01L27/12
- CPC H01L27/124
- CPC H01L27/1244
- CPC H01L29/0642
- CPC H01L29/41733
- CPC H01L29/41766
- CPC H01L29/66439
- CPC H01L29/7827
- H01P11/00
- G06N10/00
- H01B12/02
- H01P1/20
- H01P1/203
- H01P1/22
- H01P1/30
- H01P3/00
- H05K7/20
- CPC H01P11/001
- H01R12/72
- H01R12/73
- H05K1/11
- CPC H01R12/721
- H02H3/08
- H02H1/00
- H02H3/04
- CPC H02H3/08
- H02J50/30
- CPC H02J50/30
- H03M1/38
- CPC H03M1/38
- H04L9/06
- CPC H04L9/0625
- G06V40/12
- G06V40/16
- H04L9/08
- CPC H04L9/3231
- H04L9/40
- H04L61/4511
- CPC H04L63/0414
- CPC H04L63/1416
- CPC H04L63/1433
- H04L67/63
- H04L43/16
- H04L67/61
- CPC H04L67/63
- H04N21/858
- CPC H04N21/858
- H10N50/80
- H10B61/00
- H10N50/01
- CPC H01L43/02
- H10N70/00
- H10B63/00
- CPC H10N70/8833
