Intel corporation (20250006616). HYBRID METALLIZATION SURFACES FOR INTEGRATED CIRCUIT PACKAGES
Contents
HYBRID METALLIZATION SURFACES FOR INTEGRATED CIRCUIT PACKAGES
Organization Name
Inventor(s)
Suddhasattwa Nad of Chandler AZ US
Kristof Darmawikarta of Chandler AZ US
Srinivas Pietambaram of Chandler AZ US
HYBRID METALLIZATION SURFACES FOR INTEGRATED CIRCUIT PACKAGES
This abstract first appeared for US patent application 20250006616 titled 'HYBRID METALLIZATION SURFACES FOR INTEGRATED CIRCUIT PACKAGES
Original Abstract Submitted
ic die package with hybrid metallization surfaces. routing metallization features have lower surface roughness for reduced high-frequency signal transmission losses while ic die attach metallization features have higher surface roughness for greater adhesion. routing and die attach features may be formed within a same package metallization level, for example with a plating process. an insulator material may be formed over the surface of the metallization features, for example with a dry film lamination process. optionally, an interface material may be deposited upon at least the routing features to enhance adhesion of the insulator material to metallization surfaces of low roughness. an opening in the insulator material may be formed to expose a surface of a die attach feature. the exposed surface may be selectively roughened, and an ic die attached to the roughened surface.
