Intel corporation (20240427600). VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

Organization Name

intel corporation

Inventor(s)

Robert C. Valentine of Kiryat Tivon (IL)

Jesus Corbal San Adrian of King City OR (US)

Roger Espasa Sans of Barcelona (ES)

Robert D. Cavin of San Francisco CA (US)

Bret L. Toll of Hillsboro OR (US)

Santiago Galan Duran of Molins de Rei (ES)

Jeffrey G. Wiedemeier of Austin TX (US)

Sridhar Samudrala of Austin TX (US)

Milind Baburao Girkar of Sunnyvale CA (US)

Edward Thomas Grochowski of San Jose CA (US)

Jonathan Cannon Hall of Hillsboro OR (US)

Dennis R. Bradford of Portland OR (US)

Elmoustapha Ould-ahmed-vall of Chandler AZ (US)

James C Abel of Phoenix AZ (US)

Mark Charney of Lexington MA (US)

Seth Abraham of Tempe AZ (US)

Suleyman Sair of Phoenix AZ (US)

Andrew Thomas Forsyth of Kirkland WA (US)

Lisa Wu of New York NY (US)

Charles Yount of Phoenix AZ (US)

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

This abstract first appeared for US patent application 20240427600 titled 'VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

Original Abstract Submitted

a vector friendly instruction format and execution thereof. according to one embodiment of the invention, a processor is configured to execute an instruction set. the instruction set includes a vector friendly instruction format. the vector friendly instruction format has a plurality of fields including a base operation field, a modifier field, an augmentation operation field, and a data element width field, wherein the first instruction format supports different versions of base operations and different augmentation operations through placement of different values in the base operation field, the modifier field, the alpha field, the beta field, and the data element width field, and wherein only one of the different values may be placed in each of the base operation field, the modifier field, the alpha field, the beta field, and the data element width field on each occurrence of an instruction in the first instruction format in instruction streams.