Intel corporation (20240298004). LOW- DELAY VIDEO ENCODING simplified abstract
Contents
LOW- DELAY VIDEO ENCODING
Organization Name
Inventor(s)
Vasily Aristarkhov of Magdebury (DE)
LOW- DELAY VIDEO ENCODING - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240298004 titled 'LOW- DELAY VIDEO ENCODING
The technology described in the patent application involves low-delay encoding of live video streams in multi-adapter systems. This system includes a host processor and memory with instructions that encode an i-frame and subsets of p-frames of a live video signal using two graphics adapters, then combines the encoded frames into an output video bitstream. The p-frames are divided into subsets on an alternating frame basis, allowing for parallel encoding of the subsets.
- Live video streams are encoded with low delay in multi-adapter systems
- Instructions in the system encode i-frames and subsets of p-frames using two graphics adapters
- Encoded frames are combined into an output video bitstream
- P-frames are divided into subsets on an alternating frame basis for parallel encoding
- I-frame is copied from the first graphics adapter to the second graphics adapter before encoding the second subset of p-frames
Potential Applications: - Live streaming services - Video conferencing systems - Security surveillance systems
Problems Solved: - Reduced delay in encoding live video streams - Efficient use of multiple graphics adapters for encoding
Benefits: - Improved video quality - Reduced latency in live video streams - Enhanced performance in multi-adapter systems
Commercial Applications: - Video streaming platforms - Telecommunication companies - Security camera manufacturers
Questions about the technology: 1. How does the system ensure parallel encoding of subsets of p-frames? 2. What are the advantages of using multiple graphics adapters for encoding live video streams?
Original Abstract Submitted
technology for low-delay encoding of live video streams in multi-adapter systems can include a host processor and memory comprising instructions which, when executed, cause a computing system to encode, via a first graphics adapter, an i-frame of a live video signal and a first subset of p-frames of the live video signal, encode, via a second graphics adapter, a second subset of p-frames of the live video signal, and combine the encoded video frames from the first adapter and the encoded video frames from the second adapter into an output video bitstream. frames of the live video signal are divided into the first and second subsets of p-frames on an alternating frame basis, and the i-frame copied from the first graphics adapter to the second graphics adapter prior to encoding the second subset of p-frames, such that encoding the first and second subsets of p-frames occurs essentially in parallel.
