Intel corporation (20240243099). HYPERCHIP simplified abstract

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HYPERCHIP

Organization Name

intel corporation

Inventor(s)

Mark T. Bohr of Aloha OR (US)

Wilfred Gomes of Portland OR (US)

Rajesh Kumar of Portland OR (US)

Pooya Tadayon of Portland OR (US)

Doug Ingerly of Portland OR (US)

HYPERCHIP - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240243099 titled 'HYPERCHIP

The abstract describes structures and methods for fabricating hyperchips, where an integrated circuit assembly includes a first integrated circuit chip with transistor devices and contact points on the device side, and a second integrated circuit chip smaller in size, placed on top of the first chip in a device side to device side configuration.

  • Hyperchip structures and methods of fabricating hyperchips are described.
  • An integrated circuit assembly includes a first integrated circuit chip with transistor devices and contact points on the device side.
  • A second integrated circuit chip, smaller in size, is placed on top of the first chip in a device side to device side configuration.
  • The second chip's contact points are coupled to the first chip's contact points.
  • The second chip is smaller than the first chip from a plan view perspective.

Potential Applications: - Advanced semiconductor technology - High-density integrated circuits - Miniaturized electronic devices

Problems Solved: - Increasing circuit density - Enhancing performance in a smaller footprint - Facilitating complex electronic systems

Benefits: - Improved functionality in compact devices - Enhanced performance capabilities - Cost-effective manufacturing processes

Commercial Applications: Title: Advanced Semiconductor Technology for Compact Electronics This technology can be applied in the development of smartphones, tablets, wearables, and other compact electronic devices, enhancing their performance and functionality while reducing size and cost.

Prior Art: Readers can explore prior research on hyperchip structures, integrated circuit assemblies, and semiconductor fabrication techniques to understand the evolution of this technology.

Frequently Updated Research: Researchers are continually exploring new materials and processes to further improve hyperchip structures and enhance their performance in various electronic applications.

Questions about Hyperchip Technology: 1. How does the size difference between the first and second integrated circuit chips impact overall performance? 2. What are the key challenges in fabricating hyperchips with high-density transistor devices?


Original Abstract Submitted

hyperchip structures and methods of fabricating hyperchips are described. in an example, an integrated circuit assembly includes a first integrated circuit chip having a device side opposite a backside. the device side includes a plurality of transistor devices and a plurality of device side contact points. the backside includes a plurality of backside contacts. a second integrated circuit chip includes a device side having a plurality of device contact points thereon. the second integrated circuit chip is on the first integrated circuit chip in a device side to device side configuration. ones of the plurality of device contact points of the second integrated circuit chip are coupled to ones of the plurality of device contact points of the first integrated circuit chip. the second integrated circuit chip is smaller than the first integrated circuit chip from a plan view perspective.