Intel corporation (20240224543). STACKED MULTICHIP IC DEVICE PACKAGES INCLUDING A GLASS SUBSTRATE simplified abstract
Contents
STACKED MULTICHIP IC DEVICE PACKAGES INCLUDING A GLASS SUBSTRATE
Organization Name
Inventor(s)
Suddhasattwa Nad of Chandler AZ (US)
Srinivas Pietambaram of Chandler AZ (US)
Brandon Marin of Gilbert AZ (US)
Jeremy Ecton of Gilbert AZ (US)
STACKED MULTICHIP IC DEVICE PACKAGES INCLUDING A GLASS SUBSTRATE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240224543 titled 'STACKED MULTICHIP IC DEVICE PACKAGES INCLUDING A GLASS SUBSTRATE
The patent application describes a multi-chip/die device with a logic IC die and a memory IC die coupled together on a glass substrate.
- Logic IC die features are connected to through-glass vias that pass through the glass substrate.
- Memory IC die is connected to other logic IC die features either directly or through additional through-glass vias.
- The logic IC die and memory IC die can be bonded directly to the through-glass vias or attached using solder.
- The logic IC die or memory IC die may be embedded within the glass substrate.
- Through-glass vias beyond the memory IC die can connect the logic IC die to a host component through a routing structure or solder features.
Potential Applications: - High-density integrated circuits - Advanced electronic devices - Miniaturized electronics
Problems Solved: - Improved connectivity between logic and memory IC dies - Enhanced performance and reliability of multi-chip devices - Increased integration capabilities in electronic systems
Benefits: - Higher efficiency in data processing - Reduced footprint for electronic components - Enhanced durability and longevity of devices
Commercial Applications: Title: "Advanced Multi-Chip Device for High-Performance Electronics" This technology can be utilized in: - Consumer electronics - Telecommunications equipment - Automotive systems
Prior Art: Further research can be conducted in the field of multi-chip integration on glass substrates to explore similar innovations and advancements.
Frequently Updated Research: Stay updated on the latest developments in multi-chip integration technologies and advancements in electronic packaging methods.
Questions about Multi-Chip Device Integration: 1. How does the use of through-glass vias improve the connectivity between different IC dies? 2. What are the potential challenges in embedding IC dies within a glass substrate and how can they be addressed?
Original Abstract Submitted
multi-chip/die device including a logic ic die facing a first side of a glass substrate and a memory ic die facing, and coupled to, the logic ic die. first ones of first metallization features of the logic ic die are coupled to through-glass vias extending through a thickness of the glass substrate. the memory ic die is coupled to second ones of the first metallization features, either directly or by way of other through-glass vias. the logic ic die and/or memory ic die may be directly bonded to the through-glass vias or may be attached by solder. the logic ic die or memory ic die may be embedded within the glass substrate. through-glass vias within a region beyond an edge of the memory ic die may couple the logic ic die to a host component either through a routing structure built up adjacent the memory ic die, or through solder features attached to the glass substrate adjacent to the memory ic die.
