Intel corporation (20240222320). DIRECTLY BONDED MULTICHIP IC DEVICE PACKAGES simplified abstract
Contents
DIRECTLY BONDED MULTICHIP IC DEVICE PACKAGES
Organization Name
Inventor(s)
Suddhasattwa Nad of Chandler AZ (US)
Srinivas Pietambaram of Chandler AZ (US)
Brandon Marin of Gilbert AZ (US)
Jeremy Ecton of Gilbert AZ (US)
DIRECTLY BONDED MULTICHIP IC DEVICE PACKAGES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240222320 titled 'DIRECTLY BONDED MULTICHIP IC DEVICE PACKAGES
The patent application describes a multi-chip/die device that includes two or more base IC dies directly bonded to a bridge IC die, providing high pitch interconnect.
- Direct bonding of the bridge IC die allows for high pitch interconnect.
- Package metallization routing structure includes conductive vias adjacent to the bridge IC die.
- Temporary carrier, such as glass, may be used to form multi-chip devices.
- Conductive vias terminate at first level interconnect interfaces.
- The device allows for building up a package metallization routing structure.
Potential Applications: - Semiconductor industry for high-density integrated circuits. - Electronics industry for compact and efficient devices.
Problems Solved: - High pitch interconnect in multi-chip devices. - Efficient routing of conductive vias in package metallization.
Benefits: - Increased interconnect density. - Improved performance of multi-chip devices. - Enhanced reliability of interconnect interfaces.
Commercial Applications: Title: "High-Density Multi-Chip Devices for Enhanced Performance" This technology can be used in the semiconductor and electronics industries to create compact and efficient devices with high interconnect density, improving overall performance and reliability.
Questions about the technology: 1. How does direct bonding of the bridge IC die contribute to high pitch interconnect? 2. What are the potential advantages of using a temporary carrier, such as glass, in forming multi-chip devices?
Original Abstract Submitted
multi-chip/die device including two or more substantially coplanar base ic dies directly bonded to a bridge ic die over or under the base ic dies. direct bonding of the bridge ic die provides high pitch interconnect. a package metallization routing structure including conductive vias adjacent to the bridge ic die may be built up and terminate at first level interconnect interfaces. a temporary carrier, such as glass, may be employed to form such multi-chip devices.
