Intel corporation (20240213131). DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING simplified abstract
Contents
DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING
Organization Name
Inventor(s)
Andrew Wentzel of Tempe AZ (US)
Marcel Wall of Phoenix AZ (US)
Suddhasattwa Nad of Chandler AZ (US)
DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240213131 titled 'DIRECT PLATING OF COPPER ON DIELECTRICS FOR GLASS CORE PLATING
The patent application describes a package substrate with a dielectric layer containing a conductive via that directly contacts the layer.
- The package substrate includes a dielectric layer.
- A via opening is provided through the layer.
- A conductive via with uniform composition is present in the via opening.
- The conductive via directly contacts the dielectric layer.
Potential Applications: - Semiconductor packaging - Microelectronics - Integrated circuits
Problems Solved: - Improved electrical connectivity - Enhanced signal transmission - Increased reliability of electronic devices
Benefits: - Higher performance in electronic devices - Better signal integrity - Reduced signal loss
Commercial Applications: Title: Advanced Package Substrates for High-Performance Electronics This technology can be used in the manufacturing of high-performance electronic devices such as smartphones, computers, and automotive electronics, enhancing their overall functionality and reliability.
Questions about the technology: 1. How does the uniform composition of the conductive via improve signal transmission? 2. What are the potential cost implications of implementing this technology in electronic devices?
Frequently Updated Research: Researchers are continuously exploring new materials and manufacturing techniques to further improve the performance and reliability of package substrates in electronic devices. Stay updated on the latest advancements in this field to leverage the full potential of this technology.
Original Abstract Submitted
in an embodiment, a package substrate is described. in an embodiment, the package substrate comprises a layer, where the layer is a dielectric material. in an embodiment, a via opening is provided through a thickness of the layer. in an embodiment, a conductive via is in the via opening, where the conductive via has a substantially uniform composition throughout a thickness of the conductive via. in an embodiment the conductive via directly contacts the layer.
