Intel corporation (20240194673). INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES simplified abstract
Contents
INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES
Organization Name
Inventor(s)
Hwichan Jun of Portland OR (US)
Guillaume Bouche of Hillsboro OR (US)
INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240194673 titled 'INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES
Simplified Explanation: The patent application discusses techniques to create semiconductor devices that combine FinFET and Gate-All-Around (GAA) structures on the same substrate, with different gate oxide and shallow trench isolation thicknesses.
- Key Features and Innovation:
- Formation of FinFET and GAA devices on a single substrate. - Different gate oxide and STI thicknesses for each device. - Coplanar channel regions for both structures.
Potential Applications: This technology can be applied in the semiconductor industry for advanced integrated circuits, high-performance computing, and mobile devices.
Problems Solved: The technology addresses the need for more efficient and versatile semiconductor devices with improved performance and scalability.
Benefits: - Enhanced device performance and efficiency. - Increased scalability and flexibility in semiconductor design. - Potential for higher integration density on a single substrate.
Commercial Applications: The technology has significant commercial potential in the semiconductor manufacturing industry, particularly for companies developing cutting-edge electronic devices and processors.
Prior Art: Readers can explore prior research on FinFET and GAA structures in semiconductor devices to understand the evolution of this technology.
Frequently Updated Research: Stay updated on the latest advancements in semiconductor device fabrication techniques and materials to enhance the performance and efficiency of integrated circuits.
Questions about Semiconductor Device Integration: 1. How does the combination of FinFET and GAA structures improve semiconductor device performance? 2. What are the potential challenges in manufacturing semiconductor devices with different gate oxide thicknesses?
Original Abstract Submitted
techniques to form semiconductor devices that include both finfet and gate-all-around (gaa) devices on same substrate. the finfet and gaa devices may have different gate oxide thicknesses and/or shallow trench isolation (sti) thicknesses, along with coplanar channel regions. in an example, a first semiconductor device includes a finfet structure with a first gate structure around or otherwise on a semiconductor fin while a second semiconductor device includes a gaa structure with a second gate structure around or otherwise on a plurality of semiconductor bodies (e.g., nanoribbons). the first gate structure includes a first gate dielectric and a first gate electrode (e.g., conductive material such as workfunction material and/or gate fill metal) and the second gate structure includes a second gate dielectric and a second gate electrode. the first gate dielectric includes a first gate oxide layer that is thicker than a second gate oxide layer of the second gate dielectric.
