Intel corporation (20240194533). INTEGRATED CIRCUIT DEVICE STRUCTURES AND DOUBLE-SIDED ELECTRICAL TESTING simplified abstract

INTEGRATED CIRCUIT DEVICE STRUCTURES AND DOUBLE-SIDED ELECTRICAL TESTING

Organization Name

intel corporation

Inventor(s)

Valluri R. Rao of Saratoga CA (US)

Patrick Morrow of Portland OR (US)

Rishabh Mehandru of Portland OR (US)

Doug Ingerly of Portland OR (US)

Kimin Jun of Portland OR (US)

Kevin O'brien of Portland OR (US)

Paul Fischer of Portland OR (US)

Szuya S. Liao of Portland OR (US)

Bruce Block of Portland OR (US)

INTEGRATED CIRCUIT DEVICE STRUCTURES AND DOUBLE-SIDED ELECTRICAL TESTING - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240194533 titled 'INTEGRATED CIRCUIT DEVICE STRUCTURES AND DOUBLE-SIDED ELECTRICAL TESTING

• • Simplified Explanation:**

The patent application describes integrated circuit cell architectures that involve processing on both the front and back sides of a substrate. This includes various steps such as back-side implant, semiconductor deposition, dielectric deposition, metallization, film patterning, and wafer-level layer transfer.

• • Key Features and Innovation:**
• Integration of front-side and back-side processing in integrated circuit cell architectures.
• Building host-donor substrate assemblies to support and protect front-side structures during back-side processing.
• Modification and interconnection of front-side devices, such as FETs, during back-side processing.
• Integration of back-side devices, such as FETs, with front-side devices to enhance device functionality, performance, or density.

• • Potential Applications:**

This technology can be applied in the semiconductor industry for the development of advanced integrated circuits with improved functionality and performance.

• • Problems Solved:**

This technology addresses the need for more efficient and integrated processing methods for fabricating complex integrated circuit structures.

• • Benefits:**
• Enhanced device functionality and performance.
• Increased device density.
• Improved efficiency in processing complex integrated circuit structures.

• • Commercial Applications:**

The technology can be utilized in the production of high-performance integrated circuits for various applications such as consumer electronics, telecommunications, and computing.

• • Prior Art:**

Prior research in the field of integrated circuit processing methods and architectures may provide insights into similar approaches to front-side and back-side integration.

• • Frequently Updated Research:**

Ongoing research in semiconductor processing techniques and integrated circuit design may offer further advancements in the integration of front-side and back-side processing.

• • Questions about Integrated Circuit Cell Architectures:**

1. How does the integration of front-side and back-side processing in integrated circuit cell architectures improve device performance? 2. What are the potential challenges in implementing back-side processing in integrated circuit fabrication?

Original Abstract Submitted

integrated circuit cell architectures including both front-side and back-side structures. one or more of back-side implant, semiconductor deposition, dielectric deposition, metallization, film patterning, and wafer-level layer transfer is integrated with front-side processing. such double-side processing may entail revealing a back side of structures fabricated from the front-side of a substrate. host-donor substrate assemblies may be built-up to support and protect front-side structures during back-side processing. front-side devices, such as fets, may be modified and/or interconnected during back-side processing. electrical test may be performed from front and back sides of a workpiece. back-side devices, such as fets, may be integrated with front-side devices to expand device functionality, improve performance, or increase device density.