Intel corporation (20240192755). MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL simplified abstract

MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL

Organization Name

intel corporation

Inventor(s)

Chuen Ming Tan of Bayan Lepas (MY)

Venkataramani Gopalakrishnan of Folsom CA (US)

Aneesh Tuljapurkar of Bangalore (IN)

Vishwanath Somayaji of Bangalore (IN)

Tabassum Yasmin of Bangalore (IN)

MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240192755 titled 'MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL

Simplified Explanation

The circuit described in the patent application allows for the re-use of existing power supply units in computing devices, supporting large memory configurations in a sleep state to prevent data loss. By determining the power requirements of memory modules, the processor can assert an override signal to keep the power supply on in the sleep state, while disconnecting unnecessary components.

• Processor determines memory module power requirements
• Override signal forces power supply to remain on in sleep state
• Switches disconnect main rails from components not needed in sleep state
• Select circuit chooses main rail to power memory modules

Key Features and Innovation

• Re-use of existing power supply units
• Support for large memory configurations in sleep state
• Override signal to keep power supply on
• Selective powering of memory modules

Potential Applications

This technology can be applied in various computing devices where large memory configurations are required, such as servers, data centers, and high-performance workstations.

Problems Solved

• Prevents data loss in large memory configurations during sleep state
• Efficient use of power supply units without the need for additional hardware

Benefits

• Cost-effective solution for supporting large memory configurations
• Enhanced data protection during sleep mode
• Energy-efficient operation by selectively powering components

Commercial Applications

• Server farms and data centers requiring large memory configurations
• High-performance workstations for intensive computing tasks
• Embedded systems with memory-intensive applications

Prior Art

Readers can explore prior patents related to power management in computing devices, memory module power requirements, and sleep state power optimization.

Frequently Updated Research

Stay informed about advancements in power management technologies, memory module efficiency, and sleep state optimization for computing devices.

Questions about Power Management Circuit

How does the circuit prevent data loss in large memory configurations during sleep mode?

The circuit uses an override signal to keep the power supply on, ensuring continuous power to memory modules and preventing data loss.

What are the potential commercial applications of this power management circuit?

This technology can be utilized in server farms, data centers, and high-performance workstations that require large memory configurations while optimizing power usage.

Original Abstract Submitted

embodiments herein relate to a circuit which allows the re-use of an existing power supply units having main power rails and an auxiliary power rail, while supporting large memory configurations in a sleep state to avoid data loss. a processor determines whether a power requirement of memory modules in a computing device exceeds an available power of the auxiliary power rail. if this is the case, the processor asserts an override signal which is used by a logic circuit to force the power supply to remain on in the sleep state. a set of switches disconnect the main rails from other components which can be turned off in the sleep state. a select circuit selects one of the main rails to power the memory modules.