Intel corporation (20240178145). LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING simplified abstract

LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING

Organization Name

intel corporation

Inventor(s)

Kristof Darmawikarta of Chandler AZ (US)

Hiroki Tanaka of Chandler AZ (US)

Robert May of Chandler AZ (US)

Sameer Paital of Chandler AZ (US)

Bai Nie of Chandler AZ (US)

Jesse Jones of Chandler AZ (US)

Chung Kwang Christopher Tan of Chandler AZ (US)

LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240178145 titled 'LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING

Simplified Explanation

The patent application describes an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of manufacturing such packages.

• The electronic package includes a first layer made of organic material and a second layer placed over the first layer.
• A cavity is formed through the second layer to expose a first surface of the first layer.
• A bridge substrate is placed in the cavity and supported by the first surface of the first layer.
• A first die is electrically connected to a first contact on the bridge substrate, and a second die is electrically connected to a second contact on the bridge substrate.
• The first die is electrically connected to the second die through the bridge substrate.

Potential Applications

The technology described in the patent application could be used in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics.

Problems Solved

This technology solves the problem of efficiently connecting multiple dies in an electronic package while reducing the overall size and complexity of the package.

Benefits

The benefits of this technology include improved performance, reduced size and weight of electronic packages, and increased reliability of interconnections between dies.

Potential Commercial Applications

The technology could be applied in the semiconductor industry for manufacturing advanced electronic packages with high-density interconnects.

Possible Prior Art

One possible prior art for this technology could be the use of traditional wire bonding or flip-chip technologies for connecting multiple dies in electronic packages.

How does this technology compare to existing interconnect technologies in terms of performance and reliability?

This article does not provide a direct comparison between this technology and existing interconnect technologies. Further research or testing may be needed to determine the performance and reliability differences.

What are the potential cost implications of implementing this technology in electronic devices?

The article does not discuss the cost implications of implementing this technology. A cost analysis would be necessary to understand the economic impact of using this technology in commercial applications.

Original Abstract Submitted

embodiments include an electronic package with an embedded multi-interconnect bridge (emib) and methods of making such packages. embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. in an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. a bridge substrate is in the cavity and is supported by the first surface of the first layer. embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. in an embodiment the first die is electrically coupled to the second die by the bridge substrate.