Intel corporation (20240113725). EMBEDDED SAR-ADC WITH LEAST SIGNIFICANT BIT SKIPPING BASED RELU ACTIVATION FUNCTION simplified abstract

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EMBEDDED SAR-ADC WITH LEAST SIGNIFICANT BIT SKIPPING BASED RELU ACTIVATION FUNCTION

Organization Name

intel corporation

Inventor(s)

Hechen Wang of Portland OR (US)

Renzhi Liu of Portland OR (US)

Richard Dorrance of Hillsboro OR (US)

Deepak Dasalukunte of Beaverton OR (US)

Brent Carlton of Portland OR (US)

EMBEDDED SAR-ADC WITH LEAST SIGNIFICANT BIT SKIPPING BASED RELU ACTIVATION FUNCTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240113725 titled 'EMBEDDED SAR-ADC WITH LEAST SIGNIFICANT BIT SKIPPING BASED RELU ACTIVATION FUNCTION

Simplified Explanation

The patent application describes technology that includes a capacitor ladder, memory cells, and a successive approximation register (SAR) to perform multi-bit multiply accumulate (MAC) operations and digitize the results.

  • The technology involves a capacitor ladder that is controlled by memory cells to conduct multi-bit MAC operations during a computation phase.
  • The SAR is coupled to the capacitor ladder to digitize the results of the multi-bit MAC operations during a digitization phase.

Potential Applications

This technology could be applied in:

  • Signal processing systems
  • Digital signal processors
  • Communication systems

Problems Solved

This technology helps in:

  • Improving efficiency in performing MAC operations
  • Enhancing accuracy in digitizing results

Benefits

The benefits of this technology include:

  • Faster computation of multi-bit MAC operations
  • More precise digitization of results

Potential Commercial Applications

A potential commercial application for this technology could be in:

  • High-performance computing systems

Possible Prior Art

One possible prior art for this technology could be:

  • Previous systems using SAR for digitizing results of MAC operations

Unanswered Questions

How does this technology compare to existing MAC operation methods?

This article does not provide a direct comparison to existing MAC operation methods.

What specific industries could benefit most from this technology?

This article does not specify which industries could benefit most from this technology.


Original Abstract Submitted

systems, apparatuses and methods may provide for technology that includes a capacitor ladder, a plurality of memory cells coupled to the capacitor ladder, the plurality of memory cells to control the capacitor ladder to conduct multi-bit multiply accumulate (mac) operations during a computation phase, and a successive approximation register (sar) coupled to the capacitor ladder, the sar to control the capacitor ladder to digitize results of the multi-bit mac operations during a digitization phase.