Intel Corporation patent applications published on May 30th, 2024
Summary of the patent applications from Intel Corporation on May 30th, 2024
Intel Corporation has recently filed patents related to time-domain resource allocation for transport block over multiple slot (TBoMS) transmissions, joint channel estimation of uplink transmissions in 5G NR networks, and dynamic management of network slices based on performance metrics.
Summary: - Patents involve optimizing resource allocation for TBoMS transmissions, joint channel estimation in 5G NR networks, and dynamic network slice management. - Applications include wireless communication systems, 5G networks, and network infrastructure optimization. - Benefits include improved data transmission efficiency, enhanced network performance, and better resource utilization. - Challenges in implementing the technology may include compatibility issues and infrastructure upgrades. - Security implications and impact on network latency are not fully addressed in the patents.
Notable Applications:
- Wireless communication systems
- 5G networks
- Network infrastructure optimization
Contents
- 1 Patent applications for Intel Corporation on May 30th, 2024
- 1.1 METHOD AND APPARATUS FOR LAMINATING A FILM ON A SUBSTRATE (18059993)
- 1.2 VARIABLE DIMENSION HEAT PIPE (18395919)
- 1.3 ENHANCED JET IMPINGEMENT LEAK PREVENTION FOR INTEGRATED CIRCUIT (18071399)
- 1.4 PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18058980)
- 1.5 PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18058996)
- 1.6 PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18059057)
- 1.7 PHOTONIC INTEGRATED CIRCUIT (PIC) FIRST PATCH ARCHITECTURE (18059923)
- 1.8 PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18059074)
- 1.9 INTEGRATED OPTICAL PHASE CHANGE MATERIALS FOR RECONFIGURABLE OPTICS IN GLASS CORES (18071246)
- 1.10 Techniques For Transposing A Matrix Using A Memory Block (18431803)
- 1.11 FPGA Specialist Processing Block for Machine Learning (18435993)
- 1.12 COMPUTING DEVICES AND METHOD AND COMPUTING DEVICE FOR INITIALIZING A COMPUTING DEVICE (18553213)
- 1.13 NOISY NEIGHBOR DETECTION (18433021)
- 1.14 HOST MANAGED MEMORY SHARED BY MULTIPLE HOST SYSTEMS IN A HIGH AVAILABILITY SYSTEM (18071923)
- 1.15 System, Apparatus And Method For Integrity Protecting Tenant Workloads In A Multi-Tenant Computing Environment (18528124)
- 1.16 FLEXIBLE CONTAINER ATTESTATION (18387409)
- 1.17 PRINTED CIRCUIT BOARD PIN FIELD SIGNAL ROUTING (18552213)
- 1.18 METHODS AND APPARATUS FOR DISCRIMINATIVE SEMANTIC TRANSFER AND PHYSICS-INSPIRED OPTIMIZATION OF FEATURES IN DEEP LEARNING (18431458)
- 1.19 APPARATUS AND METHOD FOR MANAGING DATA BIAS IN A GRAPHICS PROCESSING ARCHITECTURE (18536581)
- 1.20 TOPOLOGY SHADER TECHNOLOGY (18324611)
- 1.21 TEXTURE OPACITY OPTIMIZATIONS FOR OPTICAL SEE-THROUGH AR DISPLAYS (18432970)
- 1.22 CARRIER CHUCK AND METHODS OF FORMING AND USING THEREOF (18059992)
- 1.23 GLASS EMBEDDED TRUE AIR CORE INDUCTORS (18071237)
- 1.24 DUAL METAL SILICIDE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION (18435609)
- 1.25 INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH STRENGTHENED GLASS CORES (18060106)
- 1.26 PERMANENT LAYER FOR BUMP CHIP ATTACH (18071961)
- 1.27 INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP BOUNDARY VIA (18072569)
- 1.28 RBTV IMPROVEMENT FOR GLASS CORE ARCHITECTURES (18071116)
- 1.29 LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING (18434347)
- 1.30 INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH STRENGTHENED GLASS CORES (18060080)
- 1.31 OVERLYING FIDUCIAL DESIGN FOR GLASS PLACEMENT ACCURACY IMPROVEMENT (18071901)
- 1.32 SHAPE MEMORY POLYMER (SMP) GLASS CORE PACKAGE FOR MODULATING WARPAGE (18071257)
- 1.33 INTEGRATED CIRCUIT PACKAGES INCLUDING A GLASS CORE WITH A FILTER STRUCTURE (18060125)
- 1.34 PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18059089)
- 1.35 FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATES (18437961)
- 1.36 FABRICATION OF INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORMITY AMONG VARYING GATE TRENCH WIDTHS (18072564)
- 1.37 INTEGRATED CIRCUIT STRUCTURES WITH SOURCE OR DRAIN CONTACTS HAVING ENHANCED CONTACT AREA (18072559)
- 1.38 TECHNIQUES FOR MULTI-TRANSMISSION-RECEPTION POINT (TRP) BASED UPLINK CHANNEL TRANSMISSION (18549332)
- 1.39 TIME DOMAIN BUNDLING OF HYBRID AUTOMATIC REPEAT REQUEST-ACKNOWLEDGEMENT (HARQ-ACK) FEEDBACK (18550274)
- 1.40 MULTIPLEXING OF UPLINK CONTROL INFORMATION (UCI) WITH DIFFERENT PHYSICAL LAYER PRIORITIES (18281721)
- 1.41 SWITCHING BETWEEN PHYSICAL DOWNLINK CONTROL CHANNEL (PDCCH) MONITORING CONFIGURATIONS OF SEARCH SPACE SET GROUPS (SSSGS) (18549518)
- 1.42 ENHANCED SRS CARRIER SWITCHING IN 5G NETWORKS (18283317)
- 1.43 Apparatus, Device, Method, and Computer Program for Providing a Certificate Chain (18474283)
- 1.44 TECHNIQUES TO CONTROL QUALITY OF SERVICE FOR END-TO-END PATHS IN A COMPUTE ENVIRONMENT (18526782)
- 1.45 BUS-OFF ATTACK PREVENTION CIRCUIT (18526456)
- 1.46 APPARATUS, SYSTEM, AND METHOD OF CONFIGURING A BLUETOOTH LINK FOR COMMUNICATION WITH A HUMAN INTERFACE DEVICE (HID) (18072429)
- 1.47 METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO MANAGE NETWORK SLICES (18427242)
- 1.48 TIME DOMAIN WINDOW FOR JOINT CHANNEL ESTIMATION (18284132)
- 1.49 TIME-DOMAIN RESOURCE ALLOCATION FOR TRANSPORT BLOCK OVER MULTIPLE SLOT (TBOMS) TRANSMISSIONS (18549329)
Patent applications for Intel Corporation on May 30th, 2024
METHOD AND APPARATUS FOR LAMINATING A FILM ON A SUBSTRATE (18059993)
Main Inventor
Joshua STACEY
VARIABLE DIMENSION HEAT PIPE (18395919)
Main Inventor
Santosh Gangal
ENHANCED JET IMPINGEMENT LEAK PREVENTION FOR INTEGRATED CIRCUIT (18071399)
Main Inventor
Ruben NUNEZ BLANCO
PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18058980)
Main Inventor
Xiaoqian Li
PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18058996)
Main Inventor
Xiaoqian Li
PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18059057)
Main Inventor
Jeremy Ecton
PHOTONIC INTEGRATED CIRCUIT (PIC) FIRST PATCH ARCHITECTURE (18059923)
Main Inventor
Jeremy D. Ecton
PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18059074)
Main Inventor
Jeremy Ecton
INTEGRATED OPTICAL PHASE CHANGE MATERIALS FOR RECONFIGURABLE OPTICS IN GLASS CORES (18071246)
Main Inventor
Benjamin DUONG
Techniques For Transposing A Matrix Using A Memory Block (18431803)
Main Inventor
Hong Shan Neoh
FPGA Specialist Processing Block for Machine Learning (18435993)
Main Inventor
Martin Langhammer
COMPUTING DEVICES AND METHOD AND COMPUTING DEVICE FOR INITIALIZING A COMPUTING DEVICE (18553213)
Main Inventor
Vincent ZIMMER
NOISY NEIGHBOR DETECTION (18433021)
Main Inventor
Adrian Stanciu
HOST MANAGED MEMORY SHARED BY MULTIPLE HOST SYSTEMS IN A HIGH AVAILABILITY SYSTEM (18071923)
Main Inventor
Krishna Kumar SIMMADHARI RAMADASS
System, Apparatus And Method For Integrity Protecting Tenant Workloads In A Multi-Tenant Computing Environment (18528124)
Main Inventor
Siddhartha Chhabra
FLEXIBLE CONTAINER ATTESTATION (18387409)
Main Inventor
Vincent R. Scarlata
PRINTED CIRCUIT BOARD PIN FIELD SIGNAL ROUTING (18552213)
Main Inventor
Xiaoning Ye
METHODS AND APPARATUS FOR DISCRIMINATIVE SEMANTIC TRANSFER AND PHYSICS-INSPIRED OPTIMIZATION OF FEATURES IN DEEP LEARNING (18431458)
Main Inventor
Anbang YAO
APPARATUS AND METHOD FOR MANAGING DATA BIAS IN A GRAPHICS PROCESSING ARCHITECTURE (18536581)
Main Inventor
Joydeep RAY
TOPOLOGY SHADER TECHNOLOGY (18324611)
Main Inventor
Hugues Labbe
TEXTURE OPACITY OPTIMIZATIONS FOR OPTICAL SEE-THROUGH AR DISPLAYS (18432970)
Main Inventor
Akshay Jindal
CARRIER CHUCK AND METHODS OF FORMING AND USING THEREOF (18059992)
Main Inventor
Yosef KORNBLUTH
GLASS EMBEDDED TRUE AIR CORE INDUCTORS (18071237)
Main Inventor
Suddhasattwa NAD
DUAL METAL SILICIDE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION (18435609)
Main Inventor
Jeffrey S. LEIB
INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH STRENGTHENED GLASS CORES (18060106)
Main Inventor
Soham Agarwal
PERMANENT LAYER FOR BUMP CHIP ATTACH (18071961)
Main Inventor
Frederick Atadana
INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP BOUNDARY VIA (18072569)
Main Inventor
Tao CHU
RBTV IMPROVEMENT FOR GLASS CORE ARCHITECTURES (18071116)
Main Inventor
Mohammad Mamunur RAHMAN
LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING (18434347)
Main Inventor
Kristof DARMAWIKARTA
INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH STRENGTHENED GLASS CORES (18060080)
Main Inventor
Benjamin T. Duong
OVERLYING FIDUCIAL DESIGN FOR GLASS PLACEMENT ACCURACY IMPROVEMENT (18071901)
Main Inventor
Minglu LIU
SHAPE MEMORY POLYMER (SMP) GLASS CORE PACKAGE FOR MODULATING WARPAGE (18071257)
Main Inventor
Vinith BEJUGAM
INTEGRATED CIRCUIT PACKAGES INCLUDING A GLASS CORE WITH A FILTER STRUCTURE (18060125)
Main Inventor
Jeremy Ecton
PHOTONIC INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH GLASS CORES (18059089)
Main Inventor
Jeremy Ecton
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING PRE-SPACER DEPOSITION CUT GATES (18437961)
Main Inventor
Leonard P. GULER
FABRICATION OF INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORMITY AMONG VARYING GATE TRENCH WIDTHS (18072564)
Main Inventor
Venkata Aditya ADDEPALLI
INTEGRATED CIRCUIT STRUCTURES WITH SOURCE OR DRAIN CONTACTS HAVING ENHANCED CONTACT AREA (18072559)
Main Inventor
Chiao-Ti HUANG
TECHNIQUES FOR MULTI-TRANSMISSION-RECEPTION POINT (TRP) BASED UPLINK CHANNEL TRANSMISSION (18549332)
Main Inventor
Alexei Davydov
TIME DOMAIN BUNDLING OF HYBRID AUTOMATIC REPEAT REQUEST-ACKNOWLEDGEMENT (HARQ-ACK) FEEDBACK (18550274)
Main Inventor
Gang Xiong
MULTIPLEXING OF UPLINK CONTROL INFORMATION (UCI) WITH DIFFERENT PHYSICAL LAYER PRIORITIES (18281721)
Main Inventor
Toufiqul Islam
SWITCHING BETWEEN PHYSICAL DOWNLINK CONTROL CHANNEL (PDCCH) MONITORING CONFIGURATIONS OF SEARCH SPACE SET GROUPS (SSSGS) (18549518)
Main Inventor
Yingyang Li
ENHANCED SRS CARRIER SWITCHING IN 5G NETWORKS (18283317)
Main Inventor
Guotong Wang
Apparatus, Device, Method, and Computer Program for Providing a Certificate Chain (18474283)
Main Inventor
Xiaoyu RUAN
TECHNIQUES TO CONTROL QUALITY OF SERVICE FOR END-TO-END PATHS IN A COMPUTE ENVIRONMENT (18526782)
Main Inventor
FRANCESC GUIM BERNAT
BUS-OFF ATTACK PREVENTION CIRCUIT (18526456)
Main Inventor
Marcio Rogerio Juliato
APPARATUS, SYSTEM, AND METHOD OF CONFIGURING A BLUETOOTH LINK FOR COMMUNICATION WITH A HUMAN INTERFACE DEVICE (HID) (18072429)
Main Inventor
Chandra Sekhar U
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO MANAGE NETWORK SLICES (18427242)
Main Inventor
Akhilesh Shivanna Thyagaturu
TIME DOMAIN WINDOW FOR JOINT CHANNEL ESTIMATION (18284132)
Main Inventor
Gang Xiong
TIME-DOMAIN RESOURCE ALLOCATION FOR TRANSPORT BLOCK OVER MULTIPLE SLOT (TBOMS) TRANSMISSIONS (18549329)
Main Inventor
Gang Xiong
