Intel Corporation patent applications published on May 16th, 2024
Summary of the patent applications from Intel Corporation on May 16th, 2024
Intel Corporation has recently filed patents for various innovative technologies in the field of semiconductor devices, electronic components, RF front-end packages, and uplink data transmissions. These patents aim to enhance the performance, efficiency, and reliability of electronic devices and communication systems.
Summary: - Patents focus on transistor devices with depopulated channels, hingedly coupled electronic components, RF front-end packages with embedded passive circuit elements, and optimized scheduling of uplink transmissions. - Technologies include depopulated channels with varying dopant concentrations, hingedly coupled electronic components with communication and thermal interconnects, RF front-end packages with embedded passive circuit elements, and single-DCI-based PUSCH transmission scheduling. - Notable applications include high-performance integrated circuits, foldable smartphones, wireless communication systems, and 5G networks.
Potential Applications:
- High-performance integrated circuits
- Foldable smartphones
- Wireless communication systems
- 5G networks
By focusing on these innovative technologies, Intel Corporation aims to stay at the forefront of technological advancements in the semiconductor industry and contribute to the development of cutting-edge electronic devices and communication systems.
Contents
- 1 Patent applications for Intel Corporation on May 16th, 2024
- 1.1 Processing Devices for reducing scan traffic, Method and Computer Program (18551879)
- 1.2 CONTROLLER AND METHODS THEREOF (18552454)
- 1.3 COMPUTATION OF CORRECTLY ROUNDED FLOATING POINT SUMMATION (18417215)
- 1.4 INTEGER SQUARE 1ULP HARDWARE MULTIPLIER (18394946)
- 1.5 TECHNOLOGIES TO UPDATE FIRMWARE AND MICROCODE (18391637)
- 1.6 COMPLEX NUMBER MATRIX MULTIPLICATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS (17985869)
- 1.7 INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS ENVIRONMENT (17987185)
- 1.8 DYNAMIC MICROSERVICES ALLOCATION MECHANISM (18539516)
- 1.9 TECHNIQUES FOR DATA MOVEMENT TO A CACHE IN A DISAGGREGATED DIE SYSTEM (17987773)
- 1.10 MECHANISM TO IDENTIFY KEY SECTIONS OF IO PACKETS AND ITS USE FOR EFFICIENT IO CACHING (17988626)
- 1.11 VIRTUAL EXTENSION TO GLOBAL ADDRESS SPACE AND SYSTEM SECURITY (18333750)
- 1.12 CACHE OPTIMIZATION MECHANISM (17986528)
- 1.13 SHARING MEMORY AND I/O SERVICES BETWEEN NODES (18419159)
- 1.14 APPROXIMATING ACTIVATION FUNCTION IN NEURAL NETWORK WITH LOOK-UP TABLE HAVING HYBRID ARCHITECTURE (18392618)
- 1.15 ATTESTATION-AS-A-SERVICE FOR CONFIDENTIAL COMPUTING (18284429)
- 1.16 NFT-based Firmware Management (18360857)
- 1.17 VARIABLE PRECISION AND MIX TYPE REPRESENTATION OF MULTIPLE LAYERS IN A NETWORK (18527734)
- 1.18 INCREMENTAL PRECISION NETWORKS USING RESIDUAL INFERENCE AND FINE-GRAIN QUANTIZATION (18532795)
- 1.19 Concept for Performing Operations on an Asset (18343797)
- 1.20 MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT (18511074)
- 1.21 ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY (18532245)
- 1.22 METHOD AND SYSTEM OF IMAGE PROCESSING WITH MULTI-SKELETON TRACKING (18281946)
- 1.23 CONTROLLING COARSE PIXEL SIZE FROM A STENCIL BUFFER (18517318)
- 1.24 DEEP GEOMETRIC MODEL FITTING (18482463)
- 1.25 METHODS AND DEVICES FOR GESTURE RECOGNITION (18548585)
- 1.26 TOOLS AND METHODS FOR SUBTRACTIVE METAL PATTERNING (18423577)
- 1.27 VARIED BALL BALL-GRID-ARRAY (BGA) PACKAGES (18418154)
- 1.28 SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STACKED DEVICES (18419015)
- 1.29 BUMPLESS HYBRID ORGANIC GLASS INTERPOSER (17988051)
- 1.30 PACKAGE ARCHITECTURE WITH MICROFLUIDIC CHANNELS IN GLASS SUBSTRATES (18055605)
- 1.31 PACKAGE SUBSTRATE WITH ALTERNATING DIELECTRIC MATERIAL LAYER PAIRS (18054211)
- 1.32 SOURCE/DRAIN REGIONS IN INTEGRATED CIRCUIT STRUCTURES (18399885)
- 1.33 TRENCH CONTACT STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION (18416508)
- 1.34 BEAMFORMING FOR MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) MODES IN OPEN RADIO ACCESS NETWORK (O-RAN) SYSTEMS (18550398)
- 1.35 DEVICES AND METHODS FOR ENHANCED TIME SYNCHRONIZATION (17985949)
- 1.36 TYPE-1 HARQ-ACK CODEBOOK GENERATION FOR MULTI-PDSCH SCHEDULING (18279527)
- 1.37 MULTI-ACCESS MANAGEMENT SERVICES PACKET RECOVERY MECHANISMS (18513338)
- 1.38 MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES (18391579)
- 1.39 CREDENTIAL DEPENDENCY ENCODING AND VERIFICATION BASED ON OTHER CREDENTIAL RESOURCES (18541973)
- 1.40 AUGMENTED REALITY VIRTUAL REALITY RAY TRACING SENSORY ENHANCEMENT SYSTEM, APPARATUS AND METHOD (18517862)
- 1.41 DEVICE FOR OPERATING A RADIO COMMUNICATION NETWORK, TERMINAL COMMUNICATION DEVICE, AND METHOD FOR OPERATING A RADIO COMMUNICATION NETWORK (17985971)
- 1.42 CONFIGURED GRANT BASED SMALL DATA TRANSMISSION (CG-SDT) IN MULTIBEAM OPERATION (18280098)
- 1.43 MULTI-TRANSMISSION TIME INTERVAL (TTI) SCHEDULING FOR DATA TRANSMISSION (18521646)
- 1.44 ENHANCED GROUP DCI FORMAT 2_3 FOR SRS TRANSMISSION (18280760)
- 1.45 SINGLE-DCI-BASED PHYSICAL UPLINK SHARED CHANNEL (PUSCH) TRANSMISSION SCHEDULING (18549514)
- 1.46 RADIO FREQUENCY FRONT-END STRUCTURES (18418513)
- 1.47 AXIALLY ARRANGED COMMUNICATION AND THERMAL INTERCONNECTS FOR FOLDABLE ELECTRONIC DEVICES (18394829)
- 1.48 CHANNEL DEPOPULATION FOR FORKSHEET TRANSISTORS (18375858)
Patent applications for Intel Corporation on May 16th, 2024
Processing Devices for reducing scan traffic, Method and Computer Program (18551879)
Main Inventor
Min LIU
CONTROLLER AND METHODS THEREOF (18552454)
Main Inventor
Satish JHA
COMPUTATION OF CORRECTLY ROUNDED FLOATING POINT SUMMATION (18417215)
Main Inventor
Brett SAIKI
INTEGER SQUARE 1ULP HARDWARE MULTIPLIER (18394946)
Main Inventor
Theo Drane
TECHNOLOGIES TO UPDATE FIRMWARE AND MICROCODE (18391637)
Main Inventor
Mohan J. KUMAR
COMPLEX NUMBER MATRIX MULTIPLICATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS (17985869)
Main Inventor
Kenneth DAXER
INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS ENVIRONMENT (17987185)
Main Inventor
Jiasheng Chen
DYNAMIC MICROSERVICES ALLOCATION MECHANISM (18539516)
Main Inventor
Soham Jayesh Desai
TECHNIQUES FOR DATA MOVEMENT TO A CACHE IN A DISAGGREGATED DIE SYSTEM (17987773)
Main Inventor
Kapil SOOD
MECHANISM TO IDENTIFY KEY SECTIONS OF IO PACKETS AND ITS USE FOR EFFICIENT IO CACHING (17988626)
Main Inventor
George Leonard TKACHUK
VIRTUAL EXTENSION TO GLOBAL ADDRESS SPACE AND SYSTEM SECURITY (18333750)
Main Inventor
Gurpreet Singh KALSI
CACHE OPTIMIZATION MECHANISM (17986528)
Main Inventor
Marcin Andrzej Chrapek
SHARING MEMORY AND I/O SERVICES BETWEEN NODES (18419159)
Main Inventor
Debendra Das Sharma
APPROXIMATING ACTIVATION FUNCTION IN NEURAL NETWORK WITH LOOK-UP TABLE HAVING HYBRID ARCHITECTURE (18392618)
Main Inventor
Dinakar Kondru
ATTESTATION-AS-A-SERVICE FOR CONFIDENTIAL COMPUTING (18284429)
Main Inventor
Yeluri Raghuram
NFT-based Firmware Management (18360857)
Main Inventor
Ke HAN
VARIABLE PRECISION AND MIX TYPE REPRESENTATION OF MULTIPLE LAYERS IN A NETWORK (18527734)
Main Inventor
Uzi Sarel
INCREMENTAL PRECISION NETWORKS USING RESIDUAL INFERENCE AND FINE-GRAIN QUANTIZATION (18532795)
Main Inventor
Abhisek KUNDU
Concept for Performing Operations on an Asset (18343797)
Main Inventor
Clair Michael BOWMAN
MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT (18511074)
Main Inventor
Joydeep Ray
ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY (18532245)
Main Inventor
Abhishek Appu
METHOD AND SYSTEM OF IMAGE PROCESSING WITH MULTI-SKELETON TRACKING (18281946)
Main Inventor
Hongzhai Tao
CONTROLLING COARSE PIXEL SIZE FROM A STENCIL BUFFER (18517318)
Main Inventor
Karthik Vaidyanathan
DEEP GEOMETRIC MODEL FITTING (18482463)
Main Inventor
Rene Ranftl
METHODS AND DEVICES FOR GESTURE RECOGNITION (18548585)
Main Inventor
Ping GUO
TOOLS AND METHODS FOR SUBTRACTIVE METAL PATTERNING (18423577)
Main Inventor
Christopher J. Jezewski
VARIED BALL BALL-GRID-ARRAY (BGA) PACKAGES (18418154)
Main Inventor
Xiao LU
SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STACKED DEVICES (18419015)
Main Inventor
Ehren MANNEBACH
BUMPLESS HYBRID ORGANIC GLASS INTERPOSER (17988051)
Main Inventor
Jeremy D. Ecton
PACKAGE ARCHITECTURE WITH MICROFLUIDIC CHANNELS IN GLASS SUBSTRATES (18055605)
Main Inventor
Brandon C. Marin
PACKAGE SUBSTRATE WITH ALTERNATING DIELECTRIC MATERIAL LAYER PAIRS (18054211)
Main Inventor
Jeremy Ecton
SOURCE/DRAIN REGIONS IN INTEGRATED CIRCUIT STRUCTURES (18399885)
Main Inventor
Sean T. Ma
TRENCH CONTACT STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION (18416508)
Main Inventor
Subhash M. JOSHI
BEAMFORMING FOR MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) MODES IN OPEN RADIO ACCESS NETWORK (O-RAN) SYSTEMS (18550398)
Main Inventor
Nicholas Whinnett
DEVICES AND METHODS FOR ENHANCED TIME SYNCHRONIZATION (17985949)
Main Inventor
Anshu AGARWAL
TYPE-1 HARQ-ACK CODEBOOK GENERATION FOR MULTI-PDSCH SCHEDULING (18279527)
Main Inventor
Yingyang Li
MULTI-ACCESS MANAGEMENT SERVICES PACKET RECOVERY MECHANISMS (18513338)
Main Inventor
Jing ZHU
MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES (18391579)
Main Inventor
Hossein FARROKHBAKHT
CREDENTIAL DEPENDENCY ENCODING AND VERIFICATION BASED ON OTHER CREDENTIAL RESOURCES (18541973)
Main Inventor
Ned M. Smith
AUGMENTED REALITY VIRTUAL REALITY RAY TRACING SENSORY ENHANCEMENT SYSTEM, APPARATUS AND METHOD (18517862)
Main Inventor
Joydeep Ray
DEVICE FOR OPERATING A RADIO COMMUNICATION NETWORK, TERMINAL COMMUNICATION DEVICE, AND METHOD FOR OPERATING A RADIO COMMUNICATION NETWORK (17985971)
Main Inventor
Anshu AGARWAL
CONFIGURED GRANT BASED SMALL DATA TRANSMISSION (CG-SDT) IN MULTIBEAM OPERATION (18280098)
Main Inventor
Gang Xiong
MULTI-TRANSMISSION TIME INTERVAL (TTI) SCHEDULING FOR DATA TRANSMISSION (18521646)
Main Inventor
Gang Xiong
ENHANCED GROUP DCI FORMAT 2_3 FOR SRS TRANSMISSION (18280760)
Main Inventor
Guotong Wang
SINGLE-DCI-BASED PHYSICAL UPLINK SHARED CHANNEL (PUSCH) TRANSMISSION SCHEDULING (18549514)
Main Inventor
Alexei Davydov
RADIO FREQUENCY FRONT-END STRUCTURES (18418513)
Main Inventor
Sidharth Dalmia
AXIALLY ARRANGED COMMUNICATION AND THERMAL INTERCONNECTS FOR FOLDABLE ELECTRONIC DEVICES (18394829)
Main Inventor
Samarth Alva
CHANNEL DEPOPULATION FOR FORKSHEET TRANSISTORS (18375858)
Main Inventor
Peng ZHENG
