Intel Corporation patent applications on November 14th, 2024
Patent Applications by Intel Corporation on November 14th, 2024
Intel Corporation: 12 patent applications
Intel Corporation has applied for patents in the areas of G01S7/4911 (1), G06F21/72 (1), H04B17/318 (1), H04L1/1812 (1), H04W72/044 (1) G01S7/4911 (1), G06F1/1652 (1), G06F12/0815 (1), G06F21/572 (1), G06N20/20 (1)
With keywords such as: device, transmission, data, slot, tci, laser, heat, light, processor, and display in patent application abstracts.
Patent Applications by Intel Corporation
20240377514. LONG RANGE COHERENT LIDAR_simplified_abstract_(intel corporation)
Inventor(s): Shachar GREENBERG of Nofit (IL) for intel corporation, Yaakov VILENCHIK of Menlo Park CA (US) for intel corporation, Eyal YAIR of Givat Ela (IL) for intel corporation, Naresh SATYAN of Pasadena CA (US) for intel corporation
IPC Code(s): G01S7/4911, G01S7/493, G01S7/497, G01S17/34, G01S17/93
CPC Code(s): G01S7/4911
Abstract: a light detection and ranging system is provided, which includes an output to output coherent laser light; an optical frequency discriminator configured to apply optical frequency discrimination to a portion of the coherent laser light to generate frequency discriminated laser light; and a processor configured to determine laser phase noise in the frequency discriminated laser light; to determine a laser phase noise compensation using the determined laser phase noise; and to apply the laser phase noise compensation to a received light signal corresponding to the output coherent laser light.
Inventor(s): Guy M. Therien of Beaverton OR (US) for intel corporation, David W. Browning of Portland OR (US) for intel corporation, Joshua L. Zuniga of Damascus OR (US) for intel corporation
IPC Code(s): G06F1/16, G06F3/038, G06F3/14
CPC Code(s): G06F1/1652
Abstract: embodiments are generally directed to a flexible overlapping display. an embodiment of a mobile device includes a processor to process data for the mobile device, a bendable and foldable display screen, one or more device sensors to sense an orientation of the mobile device, and one or more display sensors to sense a current arrangement of the display screen. the processor is to identify one or more portions of the display screen that are visible to a user based at least in part on data from the one or more device sensors and the one or more display sensors.
Inventor(s): Frank T. HADY of Cannon Beach OR (US) for intel corporation, Sanjeev N. TRIKA of Portland OR (US) for intel corporation
IPC Code(s): G06F12/0815, G06F8/41, G06F12/0804
CPC Code(s): G06F12/0815
Abstract: an apparatus is described. the apparatus includes a mass storage device processor that is to behave as an additional general purpose processing core of a computing system that a mass storage device having the mass storage device processor is to be coupled to, wherein, the mass storage device processor is to execute out of a component of main memory within the mass storage device.
20240378294. FIRMWARE VERIFICATION MECHANISM_simplified_abstract_(intel corporation)
Inventor(s): Prashant Dewan of Portland OR (US) for intel corporation, Chao Zhang of Shanghai (CN) for intel corporation, Nivedita Aggarwal of Portland OR (US) for intel corporation, Aditya Katragada of Austin TX (US) for intel corporation, Mohamed Haniffa of Tamilnadu (IN) for intel corporation, Kenji Chen of Taiwan (CN) for intel corporation
IPC Code(s): G06F21/57, G06F8/65, G06F21/64
CPC Code(s): G06F21/572
Abstract: an apparatus to verify firmware in a computing system, comprising a non-volatile memory, including firmware memory to store agent firmware associated with each of a plurality of interconnect protocol (ip) agents and version memory to store security version numbers (svns) included in the agent firmware, a security controller comprising verifier logic to verify an integrity of the version memory by applying a hash algorithm to contents of the version memory to generate a svn hash, and a trusted platform module (tpm) to store the svn hash.
Inventor(s): Haim Barad of Zichron Yaakov (IL) for intel corporation
IPC Code(s): G06N20/20, G06F17/15, G06F21/55, G06N3/045
CPC Code(s): G06N20/20
Abstract: methods, apparatus, systems and articles of manufacture to self-generate a multiple-output ensemble model defense against adversarial attacks are disclosed. an example apparatus includes a model acquirer to acquire the model, an exit point quantity identifier to determine a number of exit points to place in the model, an exit point selector to select exit points to be enabled in the model, and an exit output generator to generate an additional model structure to calculate an output at each respective exit point.
Inventor(s): Smit KAPILA of Bangalore (IN) for intel corporation, Sumod CHERUKKATE of Bangalore (IN) for intel corporation, Abhishek SRIVASTAV of Bangalore (IN) for intel corporation, Sandesh Geejagaaru KRISHNAMURTHY of Bangalore (IN) for intel corporation, Sankarananda BASAK of Campbell CA (US) for intel corporation, Ellann COHEN of Beaverton OR (US) for intel corporation, Jerrod PETERSON of Hillsboro OR (US) for intel corporation
IPC Code(s): H01L23/373, H05K1/02
CPC Code(s): H01L23/3737
Abstract: the present disclosure is directed to monitoring the integrity of the thermal interface material (tim) of a semiconductor device directly by a monitoring component of a motherboard, a system on chip (soc), or a remote device to measure either the electrical resistivity or capacitive property of the tim, depending on the type of tim being used, as a means to directly assess the thermal properties (conductivity, resistance, and/or impedance) of the tim as it ages. in an aspect, the electrical resistivity or capacitive property of the tim may be initially measured and charted, and thereafter, the changes in the electrical resistivity or capacitive property may be sensed by the monitoring component and, based on the delta of those changes, there may be remedial actions taken to mitigate impacts to the overall system performance and/or to prevent irreparable damage to the semiconductor device/system.
Inventor(s): Hua Li of Arlington CA (US) for intel corporation, Meng Zhang of Beijing (CN) for intel corporation, Andrey Chervyakov of Nizhny Novgorod (RU) for intel corporation, Rui Huang of Beijing, 11 (CN) for intel corporation, llya Bolotin of Nizhny Novgorod (RU) for intel corporation
IPC Code(s): H04B17/364, H04B17/318
CPC Code(s): H04B17/364
Abstract: an apparatus and system for a unified transmission configuration indicator (tci) state switch requirement are described. both radio resource management and tci state switch delay requirements are described. the ul tci state switch delay requirement may depend on whether a downlink (dl) reference signal (rs) associated with the ul tci state satisfies known conditions, as well as whether a joint or separate tci mode is being used. in the separate tci mode. the delay requirement may include timing between a dl data transmission and acknowledgement, and also include a time for receive beam refinement in frequency range2. in the joint tci mode. the ul and dl tci state switch delay requirement—due may be the same or may be the same as the separate tci mode.
Inventor(s): Debdeep CHATTERJEE of San Jose CA (US) for intel corporation, Gregory V. MOROZOV of Nizhny Novgorod (RU) for intel corporation, Sudeep PALAT of Cheltenham (GB) for intel corporation, Sergey D. SOSNIN of Zavolzhie (RU) for intel corporation, Gang XIONG of Portland OR (US) for intel corporation
IPC Code(s): H04L1/1812, H04W72/044, H04W72/21, H04W76/27
CPC Code(s): H04L1/1812
Abstract: provided herein are mechanisms on response of pre-allocated resource based pusch transmission. the disclosure provides an apparatus including processor circuitry. the processor circuitry is to: encode data, for transmission to an access node (an) over a pre-allocated uplink (ul) resource (pur) based physical uplink shared channel (pusch); start a timer once the data is transmitted; and monitor, based on the timer, a physical downlink control channel (pdcch) to obtain a response of the an to the transmission of the data. other embodiments may also be disclosed and claimed.
Inventor(s): Tat Kin Tan of Penang (MY) for intel corporation, Michael Neve De Mevergnies of Guidel (FR) for intel corporation
IPC Code(s): H04L9/32, G06F21/72
CPC Code(s): H04L9/3247
Abstract: an integrated circuit includes a region of configurable logic circuits, and a control circuit that generates a digital signature based on a private key and data using a signing engine for verifying that data stored in the region of the configurable logic circuits has been erased. a method is provided for verifying that the region of the configurable logic circuits in the integrated circuit has been erased. the method includes receiving a public key, data, and a digital signature at a control circuit comprising a signature verifier engine, and generating an output that verifies whether the region of the configurable logic circuits has been erased by performing a signature verification of the digital signature using the data and the public key with the signature verifier engine.
Inventor(s): Po-Kai HUANG of San Jose CA (US) for intel corporation, Robert STACEY of Portland OR (US) for intel corporation, Daniel BRAVO of Portland OR (US) for intel corporation, Ido OUZIELI of Tel Aviv (IL) for intel corporation, Danny ALEXANDER of Neve Efraim Monoson (IL) for intel corporation, Ofer HAREUVENI of Haifa (IL) for intel corporation
IPC Code(s): H04L43/12, H04W88/08
CPC Code(s): H04L43/12
Abstract: this disclosure describes systems, methods, and devices related to enhanced frame exchange. a device may generate a first subset of a plurality of fields, wherein the first subset is mandatory in a probe request frame. the device may generate a second subset of the plurality of fields, wherein the second subset is optional in the probe request frame regardless of capability information of the device. the device may generate the probe request frame comprising the first subset and the second subset. the device may cause to send the probe request frame to an access point (ap) device.
Inventor(s): Guotong Wang of Beijing (CN) for intel corporation, Alexei Davydov of Nizhny Novgorod (RU) for intel corporation, Bishwarup Mondal of San Ramon CA (US) for intel corporation, Avik Sengupta of San Jose CA (US) for intel corporation
IPC Code(s): H04W72/1273
CPC Code(s): H04W72/1273
Abstract: a generation node b (gnb) configured for aperiodic channel state information reference signal (csi-rs) triggering and transmission may encode signalling for transmission to a user equipment (ue). the signalling to indicate an aperiodic triggering offset (aperiodictriggeringoffset). the aperiodic triggering offset may comprise a slot offset. the gnb may encode a downlink control information (dci) for transmission that may trigger transmission of a csi-rs in one or more aperiodic csi-rs resource set(s) (i.e., in one or more slots (n)). the dci triggers transmission of the aperiodic csi-rs within a triggered slot with the slot offset (i.e., the aperiodic triggeringoffset). the gnb may transmit the csi-rs in resource elements of the triggered slot in accordance with the slot offset, when csi-rs resources are available in the slot at the slot offset. the gnb may postpone transmission of the aperiodically triggered csi-rs to a first available downlink slot when the csi-rs resources are not available in the triggered slot at the slot offset.
Inventor(s): Praveen VISHAKANTAIAH of Hillsboro OR (US) for intel corporation, Zhiming J. ZHUANG of Sammamish WA (US) for intel corporation, Hong W. WONG of Portland OR (US) for intel corporation
IPC Code(s): H10K50/87, F28D15/02, H01K5/02, H10K10/46, H10K59/00, H10K85/10
CPC Code(s): H10K50/87
Abstract: an electronic device may include an organic light emitting display (oled), a heat generating device, and a heat spreading device. the heat generating device may provide heat directly to the heat spreading device, and the heat spreading device is to dissipate the heat from the heat generating device and evenly heat the oled and lower a driving voltage of the oled to reduce power consumption of the oled.
Intel Corporation patent applications on November 14th, 2024
- Intel Corporation
- G01S7/4911
- G01S7/493
- G01S7/497
- G01S17/34
- G01S17/93
- CPC G01S7/4911
- Intel corporation
- G06F1/16
- G06F3/038
- G06F3/14
- CPC G06F1/1652
- G06F12/0815
- G06F8/41
- G06F12/0804
- CPC G06F12/0815
- G06F21/57
- G06F8/65
- G06F21/64
- CPC G06F21/572
- G06N20/20
- G06F17/15
- G06F21/55
- G06N3/045
- CPC G06N20/20
- H01L23/373
- H05K1/02
- CPC H01L23/3737
- H04B17/364
- H04B17/318
- CPC H04B17/364
- H04L1/1812
- H04W72/044
- H04W72/21
- H04W76/27
- CPC H04L1/1812
- H04L9/32
- G06F21/72
- CPC H04L9/3247
- H04L43/12
- H04W88/08
- CPC H04L43/12
- H04W72/1273
- CPC H04W72/1273
- H10K50/87
- F28D15/02
- H01K5/02
- H10K10/46
- H10K59/00
- H10K85/10
- CPC H10K50/87
