INTERNATIONAL BUSINESS MACHINES CORPORATION patent applications on May 30th, 2024
Patent Applications by INTERNATIONAL BUSINESS MACHINES CORPORATION on May 30th, 2024
INTERNATIONAL BUSINESS MACHINES CORPORATION: 52 patent applications
INTERNATIONAL BUSINESS MACHINES CORPORATION has applied for patents in the areas of H01L29/775 (14), H01L27/092 (8), H01L29/0673 (7), H01L29/06 (7), H01L29/42392 (7)
With keywords such as: data, device, layer, computer, guest, based, secure, user, structure, and process in patent application abstracts.
Patent Applications by INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s): Michael Boone of Lutz FL (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): G03H1/04, G03H1/00, G03H1/08
Abstract: aspects of the present disclosure relate to holographic display of content based on visibility. low visibility of a 2-dimensional (2d) display with respect to a user can be detected. in response to detecting the low visibility, holographic content display characteristics of holographic content to be generated from the 2d display can be determined. based on the determined holographic content display characteristics, holographic content can be generated via a holographic display of the 2d display.
Inventor(s): Ali Y. DUALE of Poughkeepsie NY (US) for international business machines corporation, Timothy SLEGEL of Staatsburg NY (US) for international business machines corporation, Patrick DUFFY of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F3/06
Abstract: methods, system, and computer program product are disclosed for enhanced system level testing of an ai hardware accelerator comprising artificial intelligence (ai) primitives. the system level testing provides uncompromised test coverage of the ai hardware accelerator while enabling efficient and effective testing performance. enhanced test data generation, result prediction, and test execution are provided for system level testing of ai hardware accelerator including the ai primitives.
Inventor(s): Nedlaya Yazzie Francisco of Tucson AZ (US) for international business machines corporation, Theresa Mary Brown of Tucson AZ (US) for international business machines corporation, Gregory Edward McBride of Vail AZ (US) for international business machines corporation
IPC Code(s): G06F3/06
Abstract: provided are a computer program product, system, and method for coordinating establishment of source and target copy relationships on primary and secondary servers. a command is received to establish a primary copy relationship of primary source data in the primary storage to copy to primary target data in the primary storage and a secondary copy relationship of secondary source data in the secondary storage to copy to secondary target data in the secondary storage. a determination is made as to whether a part of the secondary target data in a secondary pre-existing copy relationship at the secondary storage can be withdrawn from the secondary pre-existing copy relationship. in response to determining that the part of the secondary target data in the secondary pre-existing copy relationship can be withdrawn, establishing the primary copy relationship for the primary storage and establishing the secondary copy relationship for the secondary storage.
Inventor(s): Chia-Yu Chen of Westchester NY (US) for international business machines corporation, Andrea Fasoli of San Jose CA (US) for international business machines corporation, Ankur Agrawal of Chappaqua NY (US) for international business machines corporation, Kyu-hyoun Kim of Chappaqua NY (US) for international business machines corporation, Chi-Chun LIU of Altamont NY (US) for international business machines corporation, Mauricio J. Serrano of Bronx NY (US) for international business machines corporation, Monodeep Kar of New York NY (US) for international business machines corporation, Naigang Wang of Ossining NY (US) for international business machines corporation, Leland Chang of New York NY (US) for international business machines corporation
IPC Code(s): G06F7/523
Abstract: an apparatus comprising: a first plurality of inputs representing an activation input vector; a second plurality of inputs representing a weight input vector; an analog multiplier-and-accumulator to generate a first analog voltage representing a first multiply-and-accumulate result for the said first inputs and the second inputs; a voltage multiplier that takes the said first analog voltage and produces a second analog voltage representing, a second multiply-and-accumulate result by multiplying at least one scaling factor to the first analog voltage; an analog to digital converter configured to convert the said second analog voltage multiply-and-accumulate result into a digital signal using a limited-precision operation during a neural network inference operation; and a hardware controller configured to determine the at least one scaling factor based on the first multiply-and-accumulate result, or a software controller configured to determine the at least one scaling factor based on the first multiply-and-accumulate result.
Inventor(s): Joel Garnatz of Waconia MN (US) for international business machines corporation, Zachary A. Silverstein of Georgetown TX (US) for international business machines corporation, Martin G. Keen of Cary NC (US) for international business machines corporation, Jeremy R. Fox of Gerogetown TX (US) for international business machines corporation
IPC Code(s): G06F8/30, G06F16/28, G06F40/20
Abstract: an embodiment includes classifying an incoming communication message as having an instruction classification based on a natural language processing (nlp) analysis of the incoming communication message. the embodiment extracts, responsive to classifying the incoming communication message as having the instruction classification, user operations as a workflow dataset. the embodiment clusters the workflow dataset into a task cluster with other similar workflow datasets representative of previously-extracted user operations. the embodiment designates the instruction classification as a trigger event based at least in part on the nlp analysis of the incoming communication message. the embodiment generates a robotic process automation (rpa) bot script that comprises program instructions executable by a processor to cause the processor to perform operations that automate the user operations in response to the trigger event.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Vinod A. Valecha of Pune (IN) for international business machines corporation
IPC Code(s): G06F8/34, G06F8/33, G06T19/00
Abstract: according to one embodiment, a method, computer system, and computer program product for collaborative software development in mixed reality is provided. the present invention may include rendering a three-dimensional integrated development environment (3d ide) within a mixed-reality environment; responsive to confirming credentials of a plurality of developers, admitting the plurality of developers to the mixed-reality environment; monitoring interactions between the plurality of developers and the 3d ide within the mixed-reality environment; and responsive to the interactions, updating and displaying changes to the 3d ide within the mixed-reality environment.
Inventor(s): Zachary A. SILVERSTEIN of Georgetown TX (US) for international business machines corporation, Suman PATRA of KOLKATA (IN) for international business machines corporation, Melanie DAUBER of Oceanside NY (US) for international business machines corporation, Jeremy R. FOX of Georgetown TX (US) for international business machines corporation
IPC Code(s): G06F8/71, G06F8/10, G06F8/60
Abstract: aspects of the present disclosure relate generally to robotic process automation (rpa) and, more particularly, to systems, computer program products, and methods of automation of generating rpa robots (bots) from automation domain specific languages (dsl). for example, a computer-implemented method includes receiving, by a processor set, process automation requirements specifying a process flow; generating, by the processor set, alternative automation requirements in a domain specific language from terms of the domain specific language identified in the process automation requirements; generating, by the processor set, robotic process automation code from the alternative automation requirements in the domain specific language; building, by the processor set, a robotic process automation robot deployable in a production environment using the robotic process automation code; and deploying, by the processor set, the robotic process automation robot in the production environment.
Inventor(s): Charles E. HACKETT of Greenlawn NY (US) for international business machines corporation
IPC Code(s): G06F9/30
Abstract: an instruction that includes an operation code indicating a reduce instruction is obtained and executed within a computing environment. the executing includes selecting a field of a source operand stored in a source location. the source location is designated using the instruction and the field includes a plurality of bits. an operation is performed on the plurality of bits of the field to obtain a result. the result reduces the plurality of bits to a set of bits. the set of bits includes one or more bits and has fewer bits than the plurality of bits. the result is placed in a target location specified using the instruction.
Inventor(s): Reinhard Theodor Buendgen of Tuebingen (DE) for international business machines corporation, Viktor Mihajlovski of Wildberg (DE) for international business machines corporation, Jonathan D. Bradbury of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F9/455, G06F21/57
Abstract: a computer-implemented method for personalizing a secure guest instance from a generic boot image using trusted firmware that maintains metadata of the secure guest instance is disclosed. the method comprises passing a request structure from the secure guest instance to the trusted firmware for modifying the metadata of the secure guest instance and to establish at least one retrievable secret in the metadata of the secure guest instance that is specific to the secure guest instance, verifying, by the trusted firmware, the request structure and upon success modifying the metadata as specified by the request structure, retrieving, by the secure guest instance, a secret object derived from the retrievable secret from the trusted firmware, and using, by the secure guest instance, the retrieved secret object to personalize the secure guest instance.
Inventor(s): Matthias KLEIN of Poughkeepsie NY (US) for international business machines corporation, Deanna Postles Dunn BERGER of Hyde Park NY (US) for international business machines corporation, Robert J. SONNELITTER, III of Bedford Hills NY (US) for international business machines corporation, Kenneth Douglas KLAPPROTH of Austin TX (US) for international business machines corporation, Timothy BRONSON of Round Rock TX (US) for international business machines corporation, Gregory William ALEXANDER of Pflugerville TX (US) for international business machines corporation, Ashraf ELSHARIF of Austin TX (US) for international business machines corporation
IPC Code(s): G06F9/455
Abstract: a network of hang avoidance controllers and components which provide layer or scope based hang avoidance mechanisms in a distributed computing system is described. the detection of hang avoidance conditions and activation of the hang avoidance mechanisms are implemented on various limited scopes in the computing system, which prevent unnecessary system wide interruptions to avoid potential hangs in the system.
Inventor(s): Alaa S. Youssef of Valhalla NY (US) for international business machines corporation, Asser Nasreldin Tantawi of Somers NY (US) for international business machines corporation, Tamar Eilam of NEW YORK NY (US) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: an embodiment for improved methods for energy efficient scaling of multi-zone container clusters is provided. the embodiment may establish a connection between an upper layer container orchestration controller associated with multiple container cluster zones and lower layer resource manager controllers corresponding to multiple datacenters. the embodiment may determine additional workers are needed to perform a task and request worker offers from the lower layer resource manager controllers. the embodiment may receive the worker offers including worker profile data at the upper layer container orchestration controller. the embodiment may utilize the upper layer container orchestration controller to determine estimated expected utilization and corresponding incremental power consumption for each of the received worker offers, utilize the upper layer container orchestration controller to accept the received worker offer corresponding to a most energy efficient worker, and add the most energy efficient worker to a target cluster.
Inventor(s): Walter Charles Dietrich, JR. of Armonk NY (US) for international business machines corporation, Michael Patrick Shute of Stratford CT (US) for international business machines corporation, Marcelo Fernandes de Oliveira of Sorocaba (BR) for international business machines corporation, Tiago Jose Adami of Centro (BR) for international business machines corporation, Norberto Gasparotto Filho of Agua Verde (BR) for international business machines corporation
IPC Code(s): G06F11/14
Abstract: method, computer program product, and computer system are provided. a controller component verifies the state of all file sets. the controller component initiates a sub-controller component, based on successfully verifying the state of the file sets. the sub-controller component suspends write operations to all databases at the primary site computer. based on the suspending completing without error, the sub-controller executes point-in-time copy processes for each of the databases and for application non-database files at the primary site computer. applications using the databases and non-database files are not suspended. based on all of the point-in-time copy processes completing without error, the sub-controller component resumes write operations to all databases at the primary site computer. the point-in-time copies are automatically sent to the secondary site computer so that the applications can operate at the secondary site computer if the primary site computer becomes unavailable.
Inventor(s): Ali Y. DUALE of Poughkeepsie NY (US) for international business machines corporation, Timothy SLEGEL of Staatsburg NY (US) for international business machines corporation, Patrick DUFFY of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F11/263, G06F11/26
Abstract: methods, system, and computer program product are disclosed for enhanced system level testing of an ai hardware accelerator comprising artificial intelligence (ai) primitives. the system level testing provides uncompromised test coverage of the ai hardware accelerator while enabling efficient and effective testing performance. enhanced test data generation, result prediction, and test execution are provided for system level testing of ai hardware accelerator including the ai primitives.
Inventor(s): Michal RIMON of Nofit (IL) for international business machines corporation, Avishai Moshe FEDIDA of Gesher Ha'Ziv (IL) for international business machines corporation, Oz Dov HERSHKOVITZ of Zichron Yaacov (IL) for international business machines corporation, Ofek GUTMAN of Haifa (IL) for international business machines corporation
IPC Code(s): G06F11/36
Abstract: embodiments of the present disclosure are directed to an efficient and uniform process for generating multiple outputs for different generated test cases for an input request that share a common section in a pseudo-random software system. an enhanced disclosed method comprises processing an input request and a sequence of instructions until a state or condition of interest is reached in a first process. the condition of interest is marked as a split point in the first process. at the split point, a next process for generating multiple outputs is created to include a common section of the first process from the input request to the split point, an added form of randomization, and at least one instruction after the split point. the common section is generated only once in the first process, which can provide significantly enhanced performance.
Inventor(s): Melanie DAUBER of Oceanside NY (US) for international business machines corporation, Jacob Ryan JEPPERSON of St. Paul MN (US) for international business machines corporation, Zachary A. SILVERSTEIN of Georgetown TX (US) for international business machines corporation, Jeremy R. FOX of Georgetown TX (US) for international business machines corporation
IPC Code(s): G06F11/36
Abstract: a method includes: saving data logs from a plurality of user devices; creating a knowledge corpus based on the data logs; creating a remediation library based on the knowledge corpus, wherein each entry in the remediation library includes data defining a respective error state from the knowledge corpus and user actions associated with the respective error state; detecting a real time error state in one of the user devices; identifying an entry in the remediation library based on the real time error state in the one of the user devices; and causing the one of the user devices to display a message indicating the actions included in the identified entry in the remediation library.
Inventor(s): Yair ALLOUCHE of Dvira (IL) for international business machines corporation, Aviad COHEN of Meitar (IL) for international business machines corporation, Samuel Solomon ACKERMAN of Haifa (IL) for international business machines corporation, Ofer Haim BILLER of Midreshet Ben-Gurion (IL) for international business machines corporation, Eitan Daniel FARCHI of Pardes Hanna-Karkur (IL) for international business machines corporation
IPC Code(s): G06F16/2455, G06F16/901, G06F17/18
Abstract: an example system includes a processor to receive a stream of records. the processor can generate an unbiased outlier score for each sample in the stream of records via a trained histogram-based outlier score model. the unbiased outlier score is unbiased for samples including dependent features using feature grouping. the processor can then detect an anomaly in response to detecting that an associated unbiased outlier score of the sample is higher than a predefined threshold.
Inventor(s): Tayfun Gokmen of Briarcliff Manor NY (US) for international business machines corporation, Vasileios Kalantzis of White Plains NY (US) for international business machines corporation, Shashanka Ubaru of Ossining NY (US) for international business machines corporation, Lior Horesh of North Salem NY (US) for international business machines corporation
IPC Code(s): G06F17/12
Abstract: a method of computation includes receiving, by a requesting device, a system of linear equations, and computing a solution to the system of linear equations by a flexible iterative algorithm. the computing includes, for each iteration, determining a most computationally expensive operation of the iteration, mapping the most expensive operation to a low precision format, performing the most expensive operation according to a low precision, performing other operations of the iteration according to a high precision, and returning the solution to the requesting device.
Inventor(s): Bahman Hekmatshoartabari of White Plains NY (US) for international business machines corporation
IPC Code(s): G06F17/17, G06F7/02, G06F7/60, H03K19/20
Abstract: providing neural network output values by receiving a neural network having defined node weights, determining network activations according to network input data, for each activation x of the network activations and each node weight w of the defined node weights: generating an activation sequence which is a unary representation of x/n, a first weight sequence w, and a second weight sequence w, where the sequence w=(w, w, . . . , w, w, w) is a unary representation of w/n, the sequence v=(w, w, w, . . . , w, w) is the reverse of w, and nis a multiple of nso that wand ware of length n; and computing m(x, w)+m(x, w) as an approximation for 2(x/n)(w/n), wherein m(.,.) denotes stochastic multiplication, and providing a neural network output based on, at least in part, a set of computed approximations for 2(x/n)(w/n) values.
Inventor(s): Reinhard Theodor Buendgen of Tuebingen (DE) for international business machines corporation, Jonathan D. Bradbury of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F21/53, G06F21/31, G06F21/60
Abstract: a method, system, and computer program product implement a three-factor authorization in a trusted computing environment. the method includes triggering, by a hypervisor, a start of a secure guest by passing control regarding an image of the secure guest and metadata of the secure guest to a trusted firmware, where the secure guest is designed to access a hardware security module (hsm). upon a successful integrity check of the metadata of the secure guest by the trusted firmware, the secure guest is started using the hypervisor and any sensitive request from the secure guest to the hsm is blocked. the secure guest submits a request with a request structure including a third authorization secret and a characterization of a requested hsm to the trusted firmware. the method also includes binding each hsm protected key generated in the requested hsm in response to the request to the third authorization secret.
Inventor(s): Yu-Siang Chen of Minxiong Township (TW) for international business machines corporation, Ci-Hao Wu of Taipei City (TW) for international business machines corporation, Ying-Chen Yu of Taipei City (TW) for international business machines corporation, Pao-Chuan Liao of Taipei (TW) for international business machines corporation, June-Ray Lin of Taipei City (TW) for international business machines corporation
IPC Code(s): G06F21/56, G06N5/02, G06N5/04
Abstract: a malware family identification engine constructs a graph data structure of direct relationships between malware instances and malware families, direct relationships between malware instances and detected tags, and indirect relationships between detected tags and malware families. the engine builds a dictionary data structure comprising detected tag entries linking each detected tag to one or more malware family nodes based on the graph data structure. the engine identifies significant indirect entities (sies) within the detected tag entries of the dictionary data structure and selects a sie with a highest number of out-going links (ogls) as a root node in a family tree data structure, recursively connects sies with a number of ogls less than the highest number of ogls to the root node in the family tree data structure, and converts each sie name in the family tree data structure to a chained family entity name in the family tree data structure.
Inventor(s): Reinhard Theodor Buendgen of Tuebingen (DE) for international business machines corporation
IPC Code(s): G06F21/57, G06F9/455, G06F21/64
Abstract: a method for securely modifying metadata of a secure guest instance that is personalized by an initialization code, using firmware that maintains metadata of the secure guest is disclosed. the method comprises starting a secure guest instance using a hypervisor, receiving, by the secure guest instance, user-specific data, and personalizing, by the secure guest instance, the secure guest instance using the user-specific data. the method comprises also receiving, by the secure guest instance, a request structure for modifying the metadata of the secure guest instance, verifying partially, by the secure guest instance, the request structure using the user-specific data and upon successful verification passing the request structure to the trusted firmware for modifying the metadata of the secure guest instance, and verifying, by the trusted firmware, the request structure and upon success modifying the metadata, as specified by the request structure.
Inventor(s): Reinhard Theodor Buendgen of Tuebingen (DE) for international business machines corporation, Viktor Mihajlovski of Wildberg (DE) for international business machines corporation, Jonathan D. Bradbury of Poughkeepsie NY (US) for international business machines corporation, Harald Freudenberger of Fellbach (DE) for international business machines corporation, Steffen Eiden of Böblingen (DE) for international business machines corporation, Volker Urban of Böblingen (DE) for international business machines corporation, Eric David Rossman of Hopewell Junction NY (US) for international business machines corporation
IPC Code(s): G06F21/72
Abstract: a method for a policy-based association of a hardware security module to a secure guest is disclosed. the method comprises maintaining a binding between a secure guest and an hsm. thereby, the binding enables the trusted guest to send only non-sensitive request to the hsm. the method comprises further maintaining, for a secure guest, a pair of a secret and a secret name, submitting a query to the bound hsm for obtaining hsm configuration data, and upon determining that the obtained hsm configuration data match a rule available to the secure guest, wherein the rule associates the hsm to a secret name, requesting to associate the secret from the pair of secret and the secret name to the bound hsm, thereby triggering that the trusted firmware allows the secure guest to submit a sensitive crypto-request to the bound and associated hsm.
Inventor(s): John S. Werner of Fishkill NY (US) for international business machines corporation, Abigail E. Wise of Wappingers Falls NY (US) for international business machines corporation, Kyle Olson of Lagrangeville NY (US) for international business machines corporation, Steven Leslie Shafer of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F21/85, G06F11/07, G06F21/55
Abstract: a system and method for hardening security within a physical location. at least one cable in the physical location is monitored for errors. in response to detecting an error on the cable a cable fault analysis procedure is performed to determine the location of the fault on the cable. a probability that the fault is caused by a threat actor is calculated based upon the location of the fault on the cable. the probability can be calculated using mixture modules of known nonthreat locations using supervised learning approaches. at least one security protocol at the physical location is implemented in response to the location of the fault having a probability that the fault location is related to a threat actor exceeding a threshold value.
Inventor(s): Ali Y. DUALE of Poughkeepsie NY (US) for international business machines corporation, Timothy SLEGEL of Staatsburg NY (US) for international business machines corporation, Patrick DUFFY of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F30/331, G06F15/78
Abstract: methods, system, and computer program product are disclosed for enhanced system level testing of an ai hardware accelerator comprising artificial intelligence (ai) primitives. the system level testing provides uncompromised test coverage of the ai hardware accelerator while enabling efficient and effective testing performance. enhanced test data generation, result prediction, and test execution are provided for system level testing of ai hardware accelerator including the ai primitives.
Inventor(s): Natalia Martinez Gil of Durham NC (US) for international business machines corporation, Kanthi Sarpatwar of Elmsford NY (US) for international business machines corporation, Roman Vaculin of Larchmont NY (US) for international business machines corporation
IPC Code(s): G06N3/0455, G06N3/044, G06N3/047
Abstract: a computer-implemented method, system and computer program product for utilizing a variational autoencoder for neighborhood sampling. a variational autoencoder is trained to generate in-distribution neighborhood samples. upon training the variational autoencoder to generate in-distribution neighborhood samples, in-distribution neighborhood samples of an instance of a dataset in latent space that satisfy a distortion constraint are generated using the trained variational autoencoder. a set of interpretable examples for the in-distribution neighborhood samples are then generated using a k-nearest neighbors algorithm. such interpretable examples are then used to explain the black box model's predictions. as a result, the accuracy of the decision making ability of post-hoc local explanation methods is improved.
Inventor(s): Oleg Blinder of Haifa (IL) for international business machines corporation, Omer Yehuda Boehm of Haifa (IL) for international business machines corporation, LEV Greenberg of Haifa (IL) for international business machines corporation, Michael Vinov of Nofit (IL) for international business machines corporation
IPC Code(s): G06N3/08
Abstract: a computer-implemented method including: training a first generative adversarial network (gan) based on original structured data; training a second gan based on fabricated structured data that adhere to user-defined constraints; combining the first and second gans into a combined gan; training the combined gan; and operating the trained combined gan to generate new fabricated data that both imitate characteristics of the original structured data, and adhere to the user-defined constraints.
Inventor(s): Anup KALIA of White Plains NY (US) for international business machines corporation, Mihir CHOUDHURY of Jersey City NJ (US) for international business machines corporation, Jin XIAO of White Plains NY (US) for international business machines corporation, Divya SANKAR of West Nyack NY (US) for international business machines corporation, John ROFRANO of Mahopac NY (US) for international business machines corporation, Venkata Nagaraju PAVULURI of New Rochelle NY (US) for international business machines corporation, Lambert POUGUEM WASSI of Yonkers NY (US) for international business machines corporation, Maja VUKOVIC of New York NY (US) for international business machines corporation, Michele MERLER of New York City NY (US) for international business machines corporation
IPC Code(s): G06N5/04, G06F40/40
Abstract: a method includes receiving a natural language problem statement corresponding to application modernization needs of a user, the natural language problem statement including at least one technical entity, business constraint and disposition information; providing structured information by extracting information from the natural language problem statement using a neural word segmentation method; generating standardized technical entities, standardized business entities, and standardized dispositions by inputting the structured information to at least one machine learning model; and generating at least one recommended disposition of at least one technical entity to a second technical entity based at least on a business constraint corresponding to the natural language problem statement using the standardized technical entities, business entities, and dispositions. optionally, the at least one recommended disposition corresponds to one or more possible target environments along with explanation generated based on the business constraints and mentions of technical entities present in the natural language problem statement.
Inventor(s): Matthias Graefe of Eppstein (DE) for international business machines corporation, Daniel Thomas of Raleigh NC (US) for international business machines corporation, Zachary A. Silverstein of Georgetown TX (US) for international business machines corporation, Jacob Ryan Jepperson of St. Paul MN (US) for international business machines corporation
IPC Code(s): G06N5/045, G06N5/022
Abstract: process mining systems and methods are provided for automatically identifying unknown decision making factors. in implementations, a computer-based method includes accessing a process model comprising a representation of steps in a lifecycle of a process, including a process step associated with a decision making point of the process, wherein a decision input at the decision making point determines a next step in the process from multiple next-step options; obtaining electronic communication data for communications between human participants in the process; analyzing the electronic communication data to identify decision making content associated with the decision making point; inputting the decision making content to a trained machine learning (ml) model, thereby generating an output of a decision making factor predicted to impact the decision input at the decision making point; automatically updating the process model based on the predicted decision making factor, thereby generating an updated process model.
Inventor(s): Joel Russell Huffman of Austin TX (US) for international business machines corporation, Francis Harkins of Winchester (GB) for international business machines corporation, Stefan A. G. Van Der Stockt of Austin TX (US) for international business machines corporation, Grace Lindsell of Austin TX (US) for international business machines corporation
IPC Code(s): G06N10/20
Abstract: a method, system and computer program product for visually depicting a topology of a quantum device. quantum system calibration data is retrieved, which includes the number of qubits utilized by the quantum device and a coupling map, which provides connectivity data pertaining to how qubits of the quantum device are interconnected. furthermore, the operational characteristics of the quantum device are retrieved. a topology diagram of the quantum device is then generated and displayed based on the quantum system calibration data and the operational characteristics of the quantum device, where the nodes in the topology diagram represent the qubits utilized by the quantum device and are interconnected in the topology diagram based on the coupling map. furthermore, the distance of each line interconnecting two nodes is based on the operational characteristics of the quantum device, such as the value of the operational characteristic involving the qubits represented by the two nodes.
Inventor(s): Zhong Fang Yuan of Xi'an (CN) for international business machines corporation, Tong Liu of Xi'an (CN) for international business machines corporation, Si Tong Zhao of Beijing (CN) for international business machines corporation, Xiang Yu Yang of Xi'an (CN) for international business machines corporation, Shi Bo Yan of Xi'an (CN) for international business machines corporation
IPC Code(s): G06N20/00, G06F18/22
Abstract: a method, computer system, and a computer program product for enhancing deployed machine learning (ml) models using prompt learning is provided. the present invention may include receiving an input for a prediction task using a first ml model. the present invention may also include adding a feature to the received input using a second ml model, where the added feature is recognized by the first ml model. the present invention may further include predicting, using the first ml model, an output for the received input based on the added feature, wherein the predicted output by the first ml model based on the added feature includes an improved accuracy relative to another predicted output by the first ml model without considering the added feature.
Inventor(s): Aditi Chakraborty of Plano TX (US) for international business machines corporation, Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation, Rachana Vishwanathula of Hyderabad (IN) for international business machines corporation, Sweta Agarwal of Birpara (IN) for international business machines corporation
IPC Code(s): G06Q10/1093, G06F40/20
Abstract: a method, computer system, and a computer program product for automated management of a meeting are provided. a first computer may receive a meeting agenda for a first meeting. the first computer may access live content from the first meeting. the first computer may generate a meeting suggestion based on the meeting agenda and on the accessed live content. the first computer may transmit the meeting suggestion to a second computer.
Inventor(s): Allison Kei Ishida of Alameda CA (US) for international business machines corporation, Su Liu of Austin TX (US) for international business machines corporation, Diana Isabelle Ovadia of Camarillo CA (US) for international business machines corporation, Ravithej Chikkala of Pflugerville TX (US) for international business machines corporation
IPC Code(s): G06V40/10, G06Q10/0639, G06T7/73
Abstract: remediating ergonomic issues is provided. an ergonomic score corresponding to a user is generated based on differences between variations in physical positions of the user at a workstation and an ideal ergonomic setup corresponding to a target correct posture of the user at the workstation. an alert regarding the differences is sent to a client device of the user via a network. a set of remediation actions is performed based on the ergonomic score.
Inventor(s): Christopher Muzzy of Burlington VT (US) for international business machines corporation, Noah Singer of White Plains NY (US) for international business machines corporation, Madhana Sunder of Meridian ID (US) for international business machines corporation
IPC Code(s): G08G5/00, G06N3/04, G07C5/00, G07C5/08, G08G5/04
Abstract: a computer-implemented method operating on a first aircraft and performed by one or more processors collects sensor data and aircraft performance data generated by the first aircraft during flight. the method pre-processes the sensor and performance data generating a context with respect to the first aircraft. the method transmits the pre-processed sensor data and first aircraft performance data to a set of aircraft within a region of the first aircraft. the method receives pre-processed sensor data and aircraft performance data from the set of aircraft within the region of the first aircraft. the method processes the received pre-processed sensor and performance data from the set of aircraft, and the method generates alerts associated with adverse conditions determined based on the analysis of the pre-processed sensor data and performance data received from the set of aircraft in the context of the performance data of the first aircraft.
Inventor(s): Erhan Bilal of Westport CT (US) for international business machines corporation, Tian Hao of White Plains NY (US) for international business machines corporation, Bing Dang of Chappaqua NY (US) for international business machines corporation, Bo Wen of New York NY (US) for international business machines corporation, Jeffrey L. Rogers of Briarcliff Manor NY (US) for international business machines corporation
IPC Code(s): G16H10/60
Abstract: automated labeling of user sensor data is provided. it is determined that a user is at a medical facility using a location of a user device. user sensor data is collected from one or more user devices while the user is at the medical facility. a result is retrieved of a medical evaluation of the user performed at the medical facility. user sensor data collected during the medical evaluation is tagged with the retrieved result from the medical evaluation.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Albert M. Chu of Nashua NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Biswanath Senapati of Mechanicville NY (US) for international business machines corporation, Seiji Munetoh of Inagi (JP) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation
IPC Code(s): H01L21/74, H01L21/822, H01L23/528, H01L23/535
Abstract: one or more systems, devices, and/or methods of fabrication provided herein relate to adjacent buried power rail for stacked field-effect transistor architecture. according to one embodiment, a semiconductor device can comprise a first transistor stacked on a second transistor, wherein the first transistor is offset laterally from the second transistor, and a first buried power rail and a second buried power rail, wherein the first buried power rail is coupled to the first transistor and the second buried power rail is coupled to the second transistor.
Inventor(s): Ruqiang Bao of Niskayuna NY (US) for international business machines corporation, Eric Miller of Albany NY (US) for international business machines corporation, Dechao Guo of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L21/8238, H01L21/28, H01L27/092, H01L29/06, H01L29/423, H01L29/49, H01L29/66, H01L29/775
Abstract: semiconductor devices and methods of forming the same include a first transistor in a first region having a first work function metal layer. a second transistor in a second region has a second work function metal layer that overlaps a portion of the first work function metal layer and that has a vertical part above the portion of the first work function metal layer.
Inventor(s): Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation
IPC Code(s): H01L23/522, H01L21/768, H01L23/528
Abstract: one or more systems, devices, and/or methods of fabrication provided herein relate to isolated self-aligned super vias. according to one embodiment, a super via device can comprise a super via structure, a metallic line and a dielectric fill material located between the sidewalls of the super via structure and the metallic line.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8238, H01L27/092, H01L29/06, H01L29/423, H01L29/66, H01L29/775
Abstract: a microelectronic structure including a first nano device that includes a plurality of first transistors and a second nano device that includes a plurality of second transistors. the first nano device and the second nano device are parallel to each other. a doubled diffusion break that extends across the first nano device and the second nano device. a back-end-of-the-line (beol) layer located on a frontside of the first nano device and the second nano device. a backside interconnect located on a backside of the first nano device and the second nano device and the beol layer is connected to the backside interconnect through the double diffusion break.
Inventor(s): Shravana Kumar Katakam of Lehi UT (US) for international business machines corporation, Tao Li of Slingerlands NY (US) for international business machines corporation, Indira Seshadri of Niskayuna NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8238, H01L27/092, H01L29/06, H01L29/40, H01L29/417, H01L29/423, H01L29/66, H01L29/775, H01L29/786
Abstract: according to the embodiment of the present invention, a semiconductor device includes a first nanodevice comprised of a plurality of first transistors and a second nanodevice comprised of a plurality of second transistors. the first nanodevice includes a first source/drain contact. the second nanodevice includes a second source/drain contact. the second nanodevice is located adjacent to and parallel to the first nanodevice. a power bar is located between the first nanodevice and the second nanodevice. the power bar is connected to the second source/drain contact. a top surface of the power bar and the second source/drain contact are substantially in a same plane. the top surface of the power bar and the second source/drain contact are substantially a same height.
Inventor(s): Tao Li of Slingerlands NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768, H01L29/06, H01L29/40, H01L29/417, H01L29/423, H01L29/775
Abstract: a semiconductor chip device includes an electronic components layer supported by the substrate. the electronic components layer includes a plurality of active component structures. a power rail is positioned on a back side of the electronic components layer. a buried oxide layer is positioned between the electronic components layer and the power rail. a back side metal contact is buried in the buried oxide layer. the back side metal contact bridges one of the active components in the electronic components layer to the power rail.
Inventor(s): Juntao Li of Cohoes NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation
IPC Code(s): H01L23/00, H01L21/02, H01L21/306, H01L21/308, H01L29/06, H01L29/423, H01L29/66, H01L29/775
Abstract: one or more systems, devices, and/or methods of fabrication provided herein relate to nanosheet transistors with support dielectric pillars. according to one embodiment, a transistor device can comprise an active transistor fin and a support dielectric pillar located adjacent to the active transistor fin, wherein the support dielectric pillar stabilizes the active transistor fin.
Inventor(s): Jennifer Toy of San Leandro CA (US) for international business machines corporation, Alexander Reznicek of Troy NY (US) for international business machines corporation, Jingyun Zhang of Albany NY (US) for international business machines corporation, Sagarika Mukesh of Albany NY (US) for international business machines corporation
IPC Code(s): H01L29/40, H01L21/8238, H01L27/092, H01L29/06, H01L29/423, H01L29/66, H01L29/775
Abstract: a semiconductor structure includes a nanosheet channel stack disposed on a semiconductor substrate. the nanosheet channel stack includes one or more layers of a semiconducting material providing nanosheet channels for one or more nanosheet field-effect transistors and an insulator layer as the bottom most layer disposed on the semiconductor substrate. the semiconductor structure further includes an epitaxial oxide spacer layer disposed on outer ends of a bottom surface of the insulator layer and extending downwardly into the substrate; shallow trench isolation regions disposed adjacent the nanosheet channel stack and extending downwardly from a top surface of the semiconductor substrate, wherein a portion of each of the shallow trench isolation regions is disposed on an outer sidewall of the respective epitaxial oxide spacer layer; and a gate surrounding the nanosheet channel stack and on a top surface of each of the shallow trench isolation regions.
Inventor(s): Indira Seshadri of Niskayuna NY (US) for international business machines corporation, Su Chen Fan of Cohoes NY (US) for international business machines corporation, Jay William Strane of Warwick NY (US) for international business machines corporation, Stuart Sieg of Albany NY (US) for international business machines corporation, Shogo Mochizuki of Mechanicville NY (US) for international business machines corporation
IPC Code(s): H01L29/423, H01L27/088, H01L29/06, H01L29/417, H01L29/66, H01L29/775
Abstract: a semiconductor structure is presented including semiconductor layers of a first nanosheet stack, semiconductor layers of a second nanosheet stack formed over and having a stepped nanosheet formation with respect to the semiconductor layers of the first nanosheet stack, a first epitaxial growth formed adjacent the semiconductor layers of the first nanosheet stack, and a second epitaxial growth formed adjacent the semiconductor layers of the second nanosheet stack such that the second epitaxial growth has a stepped formation with respect to the first epitaxial growth. the second epitaxial growth has a volume greater than a volume of the first epitaxial growth.
Inventor(s): Hemant Kumar Sivaswamy of Pune (IN) for international business machines corporation, Venkata Vara Prasad Karri of Visakhapatnam (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Afroz Khan I of Davanagere (IN) for international business machines corporation
IPC Code(s): H04L41/0893, G16Y40/30, H04L41/0823
Abstract: according to one embodiment, a method, computer system, and computer program product for transmitting data from a set of edge devices is provided. the embodiment may include identifying one or more internet-of-things (iot) devices within a structure. the embodiment may include combining the identified one or more iot devices into one or more groups. the embodiment may include identifying a respective primary device for each group of the one or more groups. the embodiment may include deploying a tiny machine learning (ml) model on each identified respective primary device. in response to detection of an event within the structure by a group of the one or more groups, the embodiment may include utilizing the tiny ml model of a primary device of the group to select one or more other groups for activation.
Inventor(s): Peeyush Jaiswal of Boca Raton FL (US) for international business machines corporation, Priyansh Jaiswal of Boca Raton FL (US) for international business machines corporation, Paul Llamas Virgen of Guadalajara (MX) for international business machines corporation
IPC Code(s): H04L65/403, H04L65/1083
Abstract: a method, computer system, and a computer program product for private audio communication in a conference call is provided. the present invention may include receiving a mute request from a first participant in a conference call. the present invention may also include muting the first participant in the conference call. the present invention may further include capturing an audio from the muted first participant. the present invention may include transmitting the captured audio to a second participant in the conference call over a private communication channel.
Inventor(s): Tiberiu Suto of Franklin NY (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): H04L67/1095, G05B19/04
Abstract: multi-device ecosystem management is provided. a plurality of devices in a multi-device ecosystem, including a set of specifications and a relative position corresponding to each respective device of the plurality of devices, are identified. the multi-device ecosystem works together to perform an activity. a primary device is selected from the plurality of devices in the multi-device ecosystem based on an analysis of the set of specifications and the relative position corresponding to each respective device. the primary device has sufficient data processing capabilities to coordinate and control actions of secondary devices in the multi-device ecosystem and has a communication connection with each of the secondary devices to facilitate completion of the activity. a set of requirements to complete the activity by the multi-device ecosystem is determined. the activity is completed in accordance with the set of requirements by the multi-device ecosystem as coordinated and controlled by the primary device.
Inventor(s): Jun Su of Beijing (CN) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation, Gang Tang of Nanjing (CN) for international business machines corporation, Guang Han Sui of Beijing (CN) for international business machines corporation, Yan Zhou of Beijing (CN) for international business machines corporation
IPC Code(s): H04N7/15, H04L12/18, H04N7/14
Abstract: a method for transmitting web-conference content over a network connection is disclosed. in one embodiment, such a method conducts a web conference over a network connection. the method monitors characteristics of the network connection in order to determine bandwidth of the network connection during the web conference. the method implements, on the network connection, a “raw” mode wherein audio data of the web conference is transmitted over the network connection in an original format. upon detecting a low bandwidth condition on the network connection, the method toggles from the “raw” mode to a “saving” mode where audio data of the web conference is converted to text at a first end of the network connection, transmitted over the network connection as text, and converted from text back to audio data at a second end of the network connection. a corresponding system and computer program product are also disclosed.
Inventor(s): Aditi Chakraborty of Plano TX (US) for international business machines corporation, Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation, Rachana Vishwanathula of Hyderabad (IN) for international business machines corporation, Sweta Agarwal of Birpara (IN) for international business machines corporation
IPC Code(s): H04W24/02, G06N20/00
Abstract: a method, computer system, and a computer program product for generating a communication mode suggestion are provided. a first computer may receive a communication request from a first user to communicate with a second user. the first computer inputs the received communication request to a first machine learning model. the first machine learning model was trained with historical usage of the second user for communication of responses across multiple communication platforms. the trained first machine learning model generates the communication mode suggestion in response to receiving the received communication request as an input. the first computer transmits the communication mode suggestion for presentation to the first user.
Inventor(s): Min Gyu Sung of Latham NY (US) for international business machines corporation, Soon-Cheon Seo of Glenmont NY (US) for international business machines corporation, Heng Wu of Santa Clara CA (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Chen Zhang of Guilderland NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L27/24, H01L45/00
Abstract: a resistive random access memory (reram) device and a method for forming the device are provided. the reram device includes a first electrode, a resistive switching element layer in contact with the first electrode, and a plurality of second electrodes in contact with the resistive switching element layer. protruding portions of the first electrode and the resistive switching element layer overlap with the plurality of second electrodes in a vertical direction of the reram device to form a plurality of vertically stacked reram cells.
Inventor(s): Oscar van der Straten of Guilderland Center NY (US) for international business machines corporation
IPC Code(s): H10N50/80, H10B61/00, H10N50/01
Abstract: mram device structures and techniques for fabrication thereof with improved dielectric gapfill and individually configurable bottom and top encapsulation layers are provided. in one aspect, an mram device includes: memory cell pillars having a diamond shaped profile; and an interlayer dielectric fully filling gaps between the memory cell pillars. for instance, each of the memory cell pillars can include a reference layer, a free layer, a tunnel barrier between the reference layer and the free layer, a first encapsulation layer alongside the reference layer, and a second encapsulation layer alongside the free layer; and an interlayer dielectric fully filling gaps between the memory cell pillars. optionally, the first encapsulation layer can include an oxide dielectric material, and the second encapsulation layer can include a nitride dielectric material. a method of fabricating the present mram devices is also provided.
Inventor(s): Jared B. Hertzberg of Ossining NY (US) for international business machines corporation, Jason S. Orcutt of Katonah NY (US) for international business machines corporation, Hanhee Paik of Danbury CT (US) for international business machines corporation, Sami Rosenblatt of White Plains NY (US) for international business machines corporation, Martin O. Sandberg of Ossining NY (US) for international business machines corporation
IPC Code(s): H10N60/01, G06N10/00, H10N60/12, H10N60/80
Abstract: the invention includes methods, and the structures formed, for multi-qubit chips. the methods may include annealing a josephson junction of a qubit to either increase or decrease the frequency of the qubit. the conditions of the anneal may be based on historical conditions, and may be chosen to tune each qubit to a desired frequency.
20240180047.PHASE CHANGE MEMORY_simplified_abstract_(international business machines corporation)
Inventor(s): Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Juntao Li of Cohoes NY (US) for international business machines corporation, Julien Frougier of ALBANY NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L45/00, H01L27/24
Abstract: an apparatus includes a substrate that has an upper face; a first electrode that is attached to the upper face of the substrate; a second electrode that is attached to the upper face of the substrate at a distance from the first electrode; and a bridge of phase-change-memory material that is attached to and lies along the upper face of the substrate between and electrically connecting the first and second electrodes. at least a portion of the bridge is thermally switchable between a low resistance solid phase and a high resistance solid phase. in some embodiments, the apparatus also includes access devices that are disposed between the electrodes and the substrate, with the bridge being electrically connected between the access devices. at least a portion of the bridge is thermally switchable between a low resistance solid phase and a high resistance solid phase.
INTERNATIONAL BUSINESS MACHINES CORPORATION patent applications on May 30th, 2024
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- G03H1/04
- G03H1/00
- G03H1/08
- International business machines corporation
- G06F3/06
- G06F7/523
- G06F8/30
- G06F16/28
- G06F40/20
- G06F8/34
- G06F8/33
- G06T19/00
- G06F8/71
- G06F8/10
- G06F8/60
- G06F9/30
- G06F9/455
- G06F21/57
- G06F9/50
- G06F11/14
- G06F11/263
- G06F11/26
- G06F11/36
- G06F16/2455
- G06F16/901
- G06F17/18
- G06F17/12
- G06F17/17
- G06F7/02
- G06F7/60
- H03K19/20
- G06F21/53
- G06F21/31
- G06F21/60
- G06F21/56
- G06N5/02
- G06N5/04
- G06F21/64
- G06F21/72
- G06F21/85
- G06F11/07
- G06F21/55
- G06F30/331
- G06F15/78
- G06N3/0455
- G06N3/044
- G06N3/047
- G06N3/08
- G06F40/40
- G06N5/045
- G06N5/022
- G06N10/20
- G06N20/00
- G06F18/22
- G06Q10/1093
- G06V40/10
- G06Q10/0639
- G06T7/73
- G08G5/00
- G06N3/04
- G07C5/00
- G07C5/08
- G08G5/04
- G16H10/60
- H01L21/74
- H01L21/822
- H01L23/528
- H01L23/535
- H01L21/8238
- H01L21/28
- H01L27/092
- H01L29/06
- H01L29/423
- H01L29/49
- H01L29/66
- H01L29/775
- H01L23/522
- H01L21/768
- H01L29/40
- H01L29/417
- H01L29/786
- H01L23/00
- H01L21/02
- H01L21/306
- H01L21/308
- H01L27/088
- H04L41/0893
- G16Y40/30
- H04L41/0823
- H04L65/403
- H04L65/1083
- H04L67/1095
- G05B19/04
- H04N7/15
- H04L12/18
- H04N7/14
- H04W24/02
- H01L27/24
- H01L45/00
- H10N50/80
- H10B61/00
- H10N50/01
- H10N60/01
- G06N10/00
- H10N60/12
- H10N60/80
- H01L29/0673
- H01L29/42392
