Google llc (20250068694). Sparse Matrix Multiplication in Hardware
Contents
Sparse Matrix Multiplication in Hardware
Organization Name
Inventor(s)
Reiner Alwyn Pope of Sunnyvale CA (US)
Sparse Matrix Multiplication in Hardware
This abstract first appeared for US patent application 20250068694 titled 'Sparse Matrix Multiplication in Hardware
Original Abstract Submitted
aspects of the disclosure provide for methods, systems, and apparatuses, including computer-readable storage media, for sparse matrix multiplication. a system for matrix multiplication includes an array of sparse shards. each sparse shard can be configured to receive an input sub-matrix and an input sub-vector, where the input sub-matrix has a number of non-zero values equal to or less than a predetermined maximum non-zero threshold. the sparse shard can, by a plurality of multiplier circuits, compute one or more products of vector values multiplied with respective non-zero values of the input sub-matrix. the sparse shard can generate, as output to the sparse shard and using the one or more products, a shard output vector that is the product of applying the shard input vector to the shard input matrix.