Google llc (20240250082). Integrated Circuit Package For High Bandwidth Memory simplified abstract
Contents
Integrated Circuit Package For High Bandwidth Memory
Organization Name
Inventor(s)
Nam Hoon Kim of San Jose CA (US)
Woon Seong Kwon of Santa Clara CA (US)
Teckgyu Kang of Saratoga CA (US)
Yujeong Shim of Cupertino CA (US)
Integrated Circuit Package For High Bandwidth Memory - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240250082 titled 'Integrated Circuit Package For High Bandwidth Memory
The abstract describes an integrated circuit package that includes a substrate for high-bandwidth memory (HBM) stacks, an interposer for a logic die, interposer channels connecting the logic die to the HBM stacks, and substrate traces interfacing the interposer channels to the HBM stacks.
- Substrate configured for HBM stacks
- Interposer for logic die
- Interposer channels connecting logic die to HBM stacks
- Substrate traces interfacing interposer channels to HBM stacks
Potential Applications: - High-performance computing - Data centers - Artificial intelligence applications
Problems Solved: - Increased data processing speeds - Enhanced memory capabilities - Improved overall system performance
Benefits: - Higher bandwidth memory access - Improved data processing efficiency - Enhanced system reliability
Commercial Applications: Title: "Next-Generation Integrated Circuit Packages for High-Performance Computing" This technology can be utilized in high-performance computing systems, data centers, and AI applications to enhance data processing speeds and memory capabilities, leading to improved overall system performance.
Questions about the technology: 1. How does this integrated circuit package improve data processing speeds in high-performance computing applications? 2. What are the specific advantages of using an interposer to connect the logic die to the HBM stacks in this technology?
Original Abstract Submitted
an integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (hbm) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more hbm stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more hbm stacks.
