Category:Yu Hsin Chen of Santa Clara CA (US)

Yu Hsin Chen of Santa Clara CA (US)

Executive Summary

Yu Hsin Chen of Santa Clara CA (US) is an inventor who has filed 3 patents. Their primary areas of innovation include using burst mode transfer, e.g. direct memory access {DMA}, cycle steal ( (2 patents), Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition (1 patents), using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] (1 patents), and they have worked with companies such as Meta Platforms, Inc. (3 patents). Their most frequent collaborators include (3 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• G06F13/28 (using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (): 2 patents
• G06F17/16 (Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition): 1 patents
• G06F12/1027 (using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]): 1 patents
• G06F2212/6022 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G06F13/4027 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents

Companies

List of Companies

• Meta Platforms, Inc.: 3 patents

Collaborators

• Kyong Ho Lee of Los Altos CA (US) (3 collaborations)
• Liangzhen Lai of Fremont CA (US) (2 collaborations)
• Harshit Khaitan of Fremont CA (US) (2 collaborations)
• Janam Kumarbhai Trivedi of San Jose CA (US) (1 collaborations)
• Mohit Mittal of Campbell CA (US) (1 collaborations)
• Xu Chen of San Jose CA (US) (1 collaborations)