Category:Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)
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Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)
Executive Summary
Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US) is an inventor who has filed 14 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (12 patents), {Multilayer substrates (multilayer metallisation on monolayer substrate (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), and they have worked with companies such as Intel Corporation (14 patents). Their most frequent collaborators include (12 collaborations), (8 collaborations), (3 collaborations).
Patent Filing Activity
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Technology Areas
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List of Technology Areas
- H01L23/15 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
- H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 7 patents
- H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
- H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 6 patents
- H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 5 patents
- H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
- H01L23/49894 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 4 patents
- H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
- H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/17 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/1703 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L23/645 ({Inductive arrangements (): 2 patents
- H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 2 patents
- H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L23/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/14 ({of a plurality of bump connectors}): 2 patents
- H01L2224/1403 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L23/24 (solid or gel at the normal operating temperature of the device {(): 1 patents
- H01L23/3675 (Cooling facilitated by shape of device {(): 1 patents
- H01L23/373 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/5383 ({Multilayer substrates (): 1 patents
- H01L24/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/24226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L28/40 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/49866 ({characterised by the materials (materials of the substrates): 1 patents
- H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 1 patents
- H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
- H01L23/642 ({Capacitive arrangements (): 1 patents
- H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
- H01L23/535 (including internal interconnections, e.g. cross-under constructions {(internal lead connections): 1 patents
- H01L25/117 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/66181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/32157 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/32165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1205 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/0345 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/03452 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/0347 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05022 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05073 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05558 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05571 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05573 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05644 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05664 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L21/6835 ({using temporarily an auxiliary support}): 1 patents
- H01L21/76843 ({formed in openings in a dielectric}): 1 patents
- H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
- H01L2224/16257 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1436 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H05K1/181 (Printed circuits structurally associated with non-printed electric components ({): 1 patents
- H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
- H01L2924/16152 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
Companies
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List of Companies
- Intel Corporation: 14 patents
Collaborators
- Gang Duan of Chandler AZ (US) (12 collaborations)
- Minglu Liu of Chandler AZ (US) (8 collaborations)
- Jeremy Ecton of Gilbert AZ (US) (3 collaborations)
- Brandon Christian Marin of Gilbert AZ (US) (3 collaborations)
- Hiroki Tanaka of Gilbert AZ (US) (2 collaborations)
- Haobo Chen of Chandler AZ (US) (2 collaborations)
- Bohan Shan of Chandler AZ (US) (2 collaborations)
- Benjamin Taylor Duong of Phoenix AZ (US) (2 collaborations)
- Ibrahim El Khatib of Chandler AZ (US) (1 collaborations)
- Jesse Cole Jones of Chandler AZ (US) (1 collaborations)
- Yi Li of Chandler AZ (US) (1 collaborations)
- Robin Shea McRee of Chandler AZ (US) (1 collaborations)
- Praveen Sreeramagiri of Gilbert AZ (US) (1 collaborations)
- Marcel Arlan Wall of Phoenix AZ (US) (1 collaborations)
- Hamid Azimi of Chandler AZ (US) (1 collaborations)
- Rahul N. Manepalli of Chandler AZ (US) (1 collaborations)
- Darko Grujicic of Chandler AZ (US) (1 collaborations)
- Steve Cho of Chandler AZ (US) (1 collaborations)
- Thomas L. Sounart of Chandler AZ (US) (1 collaborations)
- Jung Kyu Han of Chandler AZ (US) (1 collaborations)
- Suddhasattwa Nad of Chandler AZ (US) (1 collaborations)
- Benjamin Duong of Phoenix AZ (US) (1 collaborations)
- Shayan Kaviani of Phoenix AZ (US) (1 collaborations)
- Jason Gamba of Gilbert AZ (US) (1 collaborations)
- Robert May of Chandler AZ (US) (1 collaborations)
- Bai Nie of Chandler AZ (US) (1 collaborations)
- Whitney Bryks of Tempe AZ (US) (1 collaborations)
- Tarek Adly Ibrahim of Mesa AZ (US) (1 collaborations)
- Ravindra Vijay Tanikella of Chandler AZ (US) (1 collaborations)
- Rahul Nagaraj Manepalli of Chandler AZ (US) (1 collaborations)
- Sashi Shekhar Kandanur of Phoenix AZ (US) (1 collaborations)
- Wei Wei of Chandler AZ (US) (1 collaborations)
- Jose Fernando Waimin Almendares of Gilbert AZ (US) (1 collaborations)
- Ryan Joseph Carrazzone of Chandler AZ (US) (1 collaborations)
- Kyle Jordan Arrington of Gilbert AZ (US) (1 collaborations)
- Ziyin Lin of Chandler AZ (US) (1 collaborations)
- Dingying Xu of Chandler AZ (US) (1 collaborations)
- Hongxia Feng of Chandler AZ (US) (1 collaborations)
- Yiqun Bai of Chandler AZ (US) (1 collaborations)
- Rui Zhang of Chandler AZ (US) (1 collaborations)
- Mohit Gupta of Chandler AZ (US) (1 collaborations)
Subcategories
This category has the following 4 subcategories, out of 4 total.
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Pages in category "Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)"
The following 73 pages are in this category, out of 73 total.
1
- 17948586. THIN FILM CAPACITORS simplified abstract (Intel Corporation)
- 17956338. EMBEDDED PASSIVES WITH CAVITY SIDEWALL INTERCONNECT IN GLASS CORE ARCHITECTURE simplified abstract (Intel Corporation)
- 17956384. HYBRID BONDED PASSIVE INTEGRATED DEVICES ON GLASS CORE simplified abstract (Intel Corporation)
- 17956421. DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING simplified abstract (Intel Corporation)
- 17957003. HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE simplified abstract (Intel Corporation)
- 17957094. GLASS RECIRCULATOR FOR OPTICAL SIGNAL REROUTING ACROSS PHOTONIC INTEGRATED CIRCUITS simplified abstract (Intel Corporation)
- 17957225. INTEGRATED POWER DELIVERY REGULATION CIRCUITS IN GLASS CORE USING EMBEDDED ACTIVE AND PASSIVE COMPONENTS simplified abstract (Intel Corporation)
- 17957257. EMBEDDED THIN FILM VARISTOR IN THROUGH GLASS VIAS simplified abstract (Intel Corporation)
- 17957590. INTEGRATED HORIZONTAL VARISTOR ON GLASS CORE FOR VOLTAGE REGULATION simplified abstract (Intel Corporation)
- 17958002. MICROELECTRONICS PACKAGES WITH PHOTO-INTEGRATED GLASS INTERPOSER simplified abstract (Intel Corporation)
- 18086232. GLASS SUBSTRATE DEVICE WITH THROUGH GLASS CAVITY simplified abstract (Intel Corporation)
- 18086265. LOW DIE HEIGHT GLASS SUBSTRATE DEVICE AND METHOD simplified abstract (Intel Corporation)
- 18086293. GLASS SUBSTRATE DEVICE WITH EMBEDDED COMPONENTS simplified abstract (Intel Corporation)
- 18089801. GLASS SUBSTRATE DEVICE WITH PLATED THROUGH HOLES simplified abstract (Intel Corporation)
- 18089871. OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract (Intel Corporation)
- 18089892. OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract (Intel Corporation)
- 18089916. OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract (Intel Corporation)
- 18089934. OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract (Intel Corporation)
- 18089963. OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract (Intel Corporation)
- 18091188. ELECTRICAL LAYER WITH ROUGHENED SURFACES simplified abstract (Intel Corporation)
- 18091543. APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING NO REMELT METALLURGY simplified abstract (Intel Corporation)
- 18091548. GLASS SUBSTRATE FABRICATION USING HYBRID BONDING simplified abstract (Intel Corporation)
- 18091555. APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING HYBRID BONDING simplified abstract (Intel Corporation)
- 18211455. SUBSTRATE PROCESS FLOW FOR ENABLING SUBSTRATE TO DIE HYBRID BONDING (Intel Corporation)
- 18217123. SEMICONDUCTOR LAYER WITH DRY DEPOSITION LAYER (Intel Corporation)
- 18367963. LOW STRESS THROUGH GLASS VIAS (TGVS) (Intel Corporation)
- 18392368. EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING simplified abstract (Intel Corporation)
- 18756679. METHODS AND APPARATUS TO REDUCE DELAMINATION IN HYBRID CORES simplified abstract (Intel Corporation)
- 18883752. METHODS AND APPARATUS FOR PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883759. METHODS AND APPARATUS FOR PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883781. METHODS AND APPARATUS FOR POWER DELIVERY THROUGH PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883786. METHODS AND APPARATUS FOR POWER DELIVERY THROUGH PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883796. METHODS AND APPARATUS FOR POWER DELIVERY THROUGH PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883807. METHODS AND APPARATUS FOR PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS INCLUDING INTERCONNECT BRIDGES (Intel Corporation)
- 18883825. METHODS AND APPARATUS FOR STACKS OF GLASS LAYERS INCLUDING DEEP TRENCH CAPACITORS (Intel Corporation)
- 18883851. GLASS CORES INCLUDING MULTIPLE LAYERS AND RELATED METHODS (Intel Corporation)
- 18883861. METHODS AND APPARATUS FOR STACKS OF GLASS LAYERS INCLUDING THIN FILM CAPACITORS (Intel Corporation)
I
- Intel corporation (20240101413). SELF-ALIGNED AIR GAP FORMATION IN MICROELECTRONICS PACKAGES simplified abstract
- Intel corporation (20240105625). OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS simplified abstract
- Intel corporation (20240111093). GLASS RECIRCULATOR FOR OPTICAL SIGNAL REROUTING ACROSS PHOTONIC INTEGRATED CIRCUITS simplified abstract
- Intel corporation (20240112972). MICROELECTRONICS PACKAGES WITH PHOTO-INTEGRATED GLASS INTERPOSER simplified abstract
- Intel corporation (20240113000). DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING simplified abstract
- Intel corporation (20240113046). EMBEDDED THIN FILM VARISTOR IN THROUGH GLASS VIAS simplified abstract
- Intel corporation (20240113047). INTEGRATED POWER DELIVERY REGULATION CIRCUITS IN GLASS CORE USING EMBEDDED ACTIVE AND PASSIVE COMPONENTS simplified abstract
- Intel corporation (20240113048). INTEGRATED HORIZONTAL VARISTOR ON GLASS CORE FOR VOLTAGE REGULATION simplified abstract
- Intel corporation (20240113158). HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE simplified abstract
- Intel corporation (20240114622). EMBEDDED PASSIVES WITH CAVITY SIDEWALL INTERCONNECT IN GLASS CORE ARCHITECTURE simplified abstract
- Intel corporation (20240114623). HYBRID BONDED PASSIVE INTEGRATED DEVICES ON GLASS CORE simplified abstract
- Intel corporation (20240128138). EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING simplified abstract
- Intel corporation (20240203806). GLASS LAYER WITH LITHO DEFINED THROUGH-GLASS VIA simplified abstract
- Intel corporation (20240203853). DRY FILM PHOTORESIST WET LAMINATION AND METHOD simplified abstract
- Intel corporation (20240213169). LOW DIE HEIGHT GLASS SUBSTRATE DEVICE AND METHOD simplified abstract
- Intel corporation (20240213170). GLASS SUBSTRATE DEVICE WITH EMBEDDED COMPONENTS simplified abstract
- Intel corporation (20240215269). GLASS SUBSTRATE DEVICE WITH THROUGH GLASS CAVITY simplified abstract
- Intel corporation (20240219654). OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract
- Intel corporation (20240219655). OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract
- Intel corporation (20240219656). OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract
- Intel corporation (20240219659). OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract
- Intel corporation (20240219660). OPTICAL SEMICONDUCTOR PACKAGE AND METHOD simplified abstract
- Intel corporation (20240222136). ELECTRICAL LAYER WITH ROUGHENED SURFACES simplified abstract
- Intel corporation (20240222210). GLASS SUBSTRATE FABRICATION USING HYBRID BONDING simplified abstract
- Intel corporation (20240222238). APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING NO REMELT METALLURGY simplified abstract
- Intel corporation (20240222243). APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING HYBRID BONDING simplified abstract
- Intel corporation (20240222257). GLASS SUBSTRATE DEVICE WITH PLATED THROUGH HOLES simplified abstract
- Intel corporation (20240332322). INDUCTORLESS CIRCUITS FOR CURRENT-VOLTAGE CONTROL AND REGULATION IN GLASS CORE simplified abstract
- Intel corporation (20240347402). METHODS AND APPARATUS TO REDUCE DELAMINATION IN HYBRID CORES simplified abstract
- Intel corporation (20240355749). DISAGGREGATED PACKAGE SUBSTRATES WITH GLASS CORES simplified abstract
- Intel corporation (20240355758). METHODS AND APPARATUS TO REDUCE STRESS BETWEEN SOCKETS AND ASSOCIATED INTEGRATED CIRCUIT PACKAGES HAVING GLASS CORES simplified abstract
- Intel corporation (20240421043). SUBSTRATE PROCESS FLOW FOR ENABLING SUBSTRATE TO DIE HYBRID BONDING
- Intel corporation (20250062207). METHODS AND APPARATUS TO REDUCE CRACKING IN GLASS CORES
- Intel corporation (20250089156). LOW STRESS THROUGH GLASS VIAS (TGVS)
Categories:
- Gang Duan of Chandler AZ (US)
- Minglu Liu of Chandler AZ (US)
- Jeremy Ecton of Gilbert AZ (US)
- Brandon Christian Marin of Gilbert AZ (US)
- Hiroki Tanaka of Gilbert AZ (US)
- Haobo Chen of Chandler AZ (US)
- Bohan Shan of Chandler AZ (US)
- Benjamin Taylor Duong of Phoenix AZ (US)
- Ibrahim El Khatib of Chandler AZ (US)
- Jesse Cole Jones of Chandler AZ (US)
- Yi Li of Chandler AZ (US)
- Robin Shea McRee of Chandler AZ (US)
- Praveen Sreeramagiri of Gilbert AZ (US)
- Marcel Arlan Wall of Phoenix AZ (US)
- Hamid Azimi of Chandler AZ (US)
- Rahul N. Manepalli of Chandler AZ (US)
- Darko Grujicic of Chandler AZ (US)
- Steve Cho of Chandler AZ (US)
- Thomas L. Sounart of Chandler AZ (US)
- Jung Kyu Han of Chandler AZ (US)
- Suddhasattwa Nad of Chandler AZ (US)
- Benjamin Duong of Phoenix AZ (US)
- Shayan Kaviani of Phoenix AZ (US)
- Jason Gamba of Gilbert AZ (US)
- Robert May of Chandler AZ (US)
- Bai Nie of Chandler AZ (US)
- Whitney Bryks of Tempe AZ (US)
- Tarek Adly Ibrahim of Mesa AZ (US)
- Ravindra Vijay Tanikella of Chandler AZ (US)
- Rahul Nagaraj Manepalli of Chandler AZ (US)
- Sashi Shekhar Kandanur of Phoenix AZ (US)
- Wei Wei of Chandler AZ (US)
- Jose Fernando Waimin Almendares of Gilbert AZ (US)
- Ryan Joseph Carrazzone of Chandler AZ (US)
- Kyle Jordan Arrington of Gilbert AZ (US)
- Ziyin Lin of Chandler AZ (US)
- Dingying Xu of Chandler AZ (US)
- Hongxia Feng of Chandler AZ (US)
- Yiqun Bai of Chandler AZ (US)
- Rui Zhang of Chandler AZ (US)
- Mohit Gupta of Chandler AZ (US)
- Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)
- Inventors
- Inventors filing patents with Intel Corporation
