Category:Shuangqiang Luo of Boise ID (US)
Jump to navigation
Jump to search
Contents
Shuangqiang Luo of Boise ID (US)
Executive Summary
Shuangqiang Luo of Boise ID (US) is an inventor who has filed 6 patents. Their primary areas of innovation include ELECTRONIC MEMORY DEVICES (5 patents), ELECTRONIC MEMORY DEVICES (5 patents), ELECTRONIC MEMORY DEVICES (3 patents), and they have worked with companies such as Lodestar Licensing Group LLC (6 patents). Their most frequent collaborators include (4 collaborations), (3 collaborations), (2 collaborations).
Patent Filing Activity
_Monthly_Patent_Applications.png)
Technology Areas
_Top_Technology_Areas.png)
List of Technology Areas
- H10B41/27 (ELECTRONIC MEMORY DEVICES): 5 patents
- H10B43/27 (ELECTRONIC MEMORY DEVICES): 5 patents
- H10B41/41 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B41/35 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B43/35 (ELECTRONIC MEMORY DEVICES): 3 patents
- H10B43/40 (ELECTRONIC MEMORY DEVICES): 3 patents
- G11C5/063 (STATIC STORES (semiconductor memory devices): 2 patents
- H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 2 patents
- H01L21/76877 ({Thin films associated with contacts of capacitors}): 2 patents
- H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H10B41/10 (ELECTRONIC MEMORY DEVICES): 1 patents
- H10B43/10 (ELECTRONIC MEMORY DEVICES): 1 patents
- G11C5/025 ({Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device (geometrical lay-out of the components in integrated circuits,): 1 patents
- G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
- H01L21/76838 ({characterised by the formation and the after-treatment of the conductors (etching for patterning the conductors): 1 patents
- H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
- H01L24/14 ({of a plurality of bump connectors}): 1 patents
- H01L21/31144 ({using masks}): 1 patents
- H01L21/76804 ({by forming tapered via holes}): 1 patents
- H01L21/76805 ({the opening being a via or contact hole penetrating the underlying conductor}): 1 patents
- H01L21/76816 ({Aspects relating to the layout of the pattern or to the size of vias or trenches (layout of the interconnections per se): 1 patents
- H01L21/76826 ({by contacting the layer with gases, liquids or plasmas}): 1 patents
- H01L21/76895 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
- H01L23/535 (including internal interconnections, e.g. cross-under constructions {(internal lead connections): 1 patents
Companies
_Top_Companies.png)
List of Companies
- Lodestar Licensing Group LLC: 6 patents
Collaborators
- Indra V. Chary of Boise ID (US) (4 collaborations)
- Justin B. Dorhout of Boise ID (US) (3 collaborations)
- Rita J. Klein of Boise ID (US) (2 collaborations)
- Xuan Li (1 collaborations)
- Adeline Yii (1 collaborations)
- Lifang Xu of Boise ID (US) (1 collaborations)
- John D. Hopkins of Meridian ID (US) (1 collaborations)
- Roger W. Lindsay of Boise ID (US) (1 collaborations)
Subcategories
This category has the following 4 subcategories, out of 4 total.
I
J
L
S
Pages in category "Shuangqiang Luo of Boise ID (US)"
The following 16 pages are in this category, out of 16 total.
1
- 17805221. MICROELECTRONIC DEVICES, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS simplified abstract (Micron Technology, Inc.)
- 17823472. METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS simplified abstract (Micron Technology, Inc.)
- 17848021. MEMORY DEVICE INCLUDING HIGH-ASPECT-RATIO CONDUCTIVE CONTACTS simplified abstract (Micron Technology, Inc.)
- 17893718. FOLDED STAIRCASE VIA ROUTING FOR MEMORY simplified abstract (Micron Technology, Inc.)
- 17896775. Memory Circuitry And Method Used In Forming Memory Circuitry simplified abstract (Micron Technology, Inc.)
- 18202061. MEMORY DEVICE INCLUDING SOURCE STRUCTURE HAVING CONDUCTIVE ISLANDS OF DIFFERENT WIDTHS simplified abstract (Micron Technology, Inc.)
- 18327846. METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS simplified abstract (Micron Technology, Inc.)
- 18428836. METHODS OF FORMING MICROELECTRONIC DEVICES simplified abstract (Micron Technology, Inc.)
- 18443013. MERGED CAVITIES FOR CONDUCTOR FORMATION IN A MEMORY DIE simplified abstract (Micron Technology, Inc.)
- 18623507. METHODS OF FORMING MICROELECTRONIC DEVICES simplified abstract (Micron Technology, Inc.)
M
- Micron technology, inc. (20240186239). MICROELECTRONIC DEVICES WITH MULTIPLE STEP CONTACTS EXTENDING TO STEPPED TIERS, AND RELATED METHODS simplified abstract
- Micron technology, inc. (20240203791). Integrated Circuitry, A Memory Array Comprising Strings Of Memory Cells, A Method Used In Forming A Conductive Via, A Method Used In Forming A Memory Array Comprising Strings Of Memory Cells simplified abstract
- Micron technology, inc. (20240250033). METHODS OF FORMING MICROELECTRONIC DEVICES simplified abstract
- Micron technology, inc. (20240284672). MERGED CAVITIES FOR CONDUCTOR FORMATION IN A MEMORY DIE simplified abstract
- Micron technology, inc. (20240292623). METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED ELECTRONIC SYSTEMS simplified abstract
Categories:
- Indra V. Chary of Boise ID (US)
- Justin B. Dorhout of Boise ID (US)
- Rita J. Klein of Boise ID (US)
- Xuan Li
- Adeline Yii
- Lifang Xu of Boise ID (US)
- John D. Hopkins of Meridian ID (US)
- Roger W. Lindsay of Boise ID (US)
- Shuangqiang Luo of Boise ID (US)
- Inventors
- Inventors filing patents with Lodestar Licensing Group LLC
