Category:Minglu Liu of Chandler AZ (US)
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Minglu Liu of Chandler AZ (US)
Executive Summary
Minglu Liu of Chandler AZ (US) is an inventor who has filed 8 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (8 patents), {Multilayer substrates (multilayer metallisation on monolayer substrate (6 patents), Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate (5 patents), and they have worked with companies such as Intel Corporation (8 patents). Their most frequent collaborators include (8 collaborations), (8 collaborations), (1 collaborations).
Patent Filing Activity
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Technology Areas
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List of Technology Areas
- H01L23/15 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
- H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 6 patents
- H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 5 patents
- H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
- H01L23/49894 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 3 patents
- H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
- H01L23/645 ({Inductive arrangements (): 2 patents
- H01L23/24 (solid or gel at the normal operating temperature of the device {(): 1 patents
- H01L23/3675 (Cooling facilitated by shape of device {(): 1 patents
- H01L28/40 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/49866 ({characterised by the materials (materials of the substrates): 1 patents
- H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 1 patents
- H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
- H01L23/642 ({Capacitive arrangements (): 1 patents
- H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
- H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 1 patents
- H01L23/535 (including internal interconnections, e.g. cross-under constructions {(internal lead connections): 1 patents
- H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/17 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L25/117 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 1 patents
- H01L29/66181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/1703 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/32157 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/32165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1205 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
Companies
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List of Companies
- Intel Corporation: 8 patents
Collaborators
- Gang Duan of Chandler AZ (US) (8 collaborations)
- Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US) (8 collaborations)
- Ibrahim El Khatib of Chandler AZ (US) (1 collaborations)
- Jesse Cole Jones of Chandler AZ (US) (1 collaborations)
- Yi Li of Chandler AZ (US) (1 collaborations)
- Robin Shea McRee of Chandler AZ (US) (1 collaborations)
- Praveen Sreeramagiri of Gilbert AZ (US) (1 collaborations)
Subcategories
This category has the following 3 subcategories, out of 3 total.
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Pages in category "Minglu Liu of Chandler AZ (US)"
The following 21 pages are in this category, out of 21 total.
1
- 18071901. OVERLYING FIDUCIAL DESIGN FOR GLASS PLACEMENT ACCURACY IMPROVEMENT simplified abstract (Intel Corporation)
- 18089483. TSV-TYPE EMBEDDED MULTI-DIE INTERCONNECT BRIDGE ENABLING WITH THERMAL COMPRESSION NON-CONDUCTIVE FILM (TC-NCF) PROCESS simplified abstract (Intel Corporation)
- 18090883. PACKAGE ARCHITECTURES WITH HETEROGENEOUS INTEGRATION OF VARIOUS DEVICE THICKNESSES simplified abstract (Intel Corporation)
- 18185427. DEVICE AND METHOD FOR REAL-TIME OFFSET ADJUSTMENT OF A SEMICONDUCTOR DIE PLACEMENT simplified abstract (Intel Corporation)
- 18883752. METHODS AND APPARATUS FOR PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883759. METHODS AND APPARATUS FOR PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883781. METHODS AND APPARATUS FOR POWER DELIVERY THROUGH PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883786. METHODS AND APPARATUS FOR POWER DELIVERY THROUGH PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883796. METHODS AND APPARATUS FOR POWER DELIVERY THROUGH PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS HAVING DIFFERENT COEFFICIENTS OF THERMAL EXPANSION (Intel Corporation)
- 18883807. METHODS AND APPARATUS FOR PACKAGE SUBSTRATES WITH STACKS OF GLASS LAYERS INCLUDING INTERCONNECT BRIDGES (Intel Corporation)
- 18883825. METHODS AND APPARATUS FOR STACKS OF GLASS LAYERS INCLUDING DEEP TRENCH CAPACITORS (Intel Corporation)
- 18883861. METHODS AND APPARATUS FOR STACKS OF GLASS LAYERS INCLUDING THIN FILM CAPACITORS (Intel Corporation)
I
- Intel corporation (20240178151). OVERLYING FIDUCIAL DESIGN FOR GLASS PLACEMENT ACCURACY IMPROVEMENT simplified abstract
- Intel corporation (20240186251). SYMMETRIC DUMMY BRIDGE DESIGN FOR FLI ALIGNMENT IMPROVEMENT simplified abstract
- Intel corporation (20240186279). IN-SITU UV CURE PLACEMENT TOOL FOR ROOM TEMPERATURE CHIP/GLASS DEVICE ATTACHMENT simplified abstract
- Intel corporation (20240186280). THERMOCOMPRESSION BONDING TOOL FOR PANEL-LEVEL THERMO-COMPRESSION BONDING simplified abstract
- Intel corporation (20240186281). METHOD FOR PANEL-LEVEL THERMO-COMPRESSION BONDING simplified abstract
- Intel corporation (20240213164). TSV-TYPE EMBEDDED MULTI-DIE INTERCONNECT BRIDGE ENABLING WITH THERMAL COMPRESSION NON-CONDUCTIVE FILM (TC-NCF) PROCESS simplified abstract
- Intel corporation (20240222219). PACKAGE ARCHITECTURES WITH HETEROGENEOUS INTEGRATION OF VARIOUS DEVICE THICKNESSES simplified abstract
- Intel corporation (20240312819). DEVICE AND METHOD FOR REAL-TIME OFFSET ADJUSTMENT OF A SEMICONDUCTOR DIE PLACEMENT simplified abstract
Categories:
- Gang Duan of Chandler AZ (US)
- Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)
- Ibrahim El Khatib of Chandler AZ (US)
- Jesse Cole Jones of Chandler AZ (US)
- Yi Li of Chandler AZ (US)
- Robin Shea McRee of Chandler AZ (US)
- Praveen Sreeramagiri of Gilbert AZ (US)
- Minglu Liu of Chandler AZ (US)
- Inventors
- Inventors filing patents with Intel Corporation
