Category:James Fitzpatrick of Laguna Niguel CA (US)
Jump to navigation
Jump to search
Contents
James Fitzpatrick of Laguna Niguel CA (US)
Executive Summary
James Fitzpatrick of Laguna Niguel CA (US) is an inventor who has filed 1 patents. Their primary areas of innovation include {Replication mechanisms} (1 patents), Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers} (1 patents), {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (1 patents), and they have worked with companies such as Micron Technolgy, Inc. (1 patents). Their most frequent collaborators include (1 collaborations), (1 collaborations), (1 collaborations).
Patent Filing Activity
Technology Areas
List of Technology Areas
- G06F3/0655 ({Replication mechanisms}): 1 patents
- G06F3/0604 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
- G06F3/0679 ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 1 patents
- G06F12/02 (Addressing or allocation; Relocation (program address sequencing): 1 patents
Companies
List of Companies
- Micron Technolgy, Inc.: 1 patents
Collaborators
- Karl David Schuh of Santa Cruz CA (US) (1 collaborations)
- Kishore Kumar Muchherla of Fremont CA (US) (1 collaborations)
- Daniel Jerre Hubbard of Boise ID (US) (1 collaborations)
Subcategories
This category has the following 7 subcategories, out of 7 total.
A
D
J
K
M
S
Pages in category "James Fitzpatrick of Laguna Niguel CA (US)"
The following 26 pages are in this category, out of 26 total.
1
- 17830166. MANAGING QUAD-LEVEL CELL COMPACTION STRATEGY OF A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
- 17859468. MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
- 17897869. ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC simplified abstract (Micron Technology, Inc.)
- 17899409. TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING simplified abstract (Micron Technology, Inc.)
- 17941831. ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING simplified abstract (Micron Technology, Inc.)
- 18198623. GENERATING SEMI-SOFT BIT DATA DURING CORRECTIVE READ OPERATIONS IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
- 18432326. MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
- 18482644. Management of Programming Mode Transitions to Accommodate a Constant Size of Data Transfer between a Host System and a Memory Sub-System simplified abstract (Micron Technology, Inc.)
- 18511698. MULTI-LAYER CODE RATE ARCHITECTURE FOR COPYBACK BETWEEN PARTITIONS WITH DIFFERENT CODE RATES simplified abstract (Micron Technology, Inc.)
- 18611450. ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC simplified abstract (Micron Technology, Inc.)
- 18612028. MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL simplified abstract (Micron Technology, Inc.)
- 18657672. READ DISTURB MITIGATION BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED FOR READ CALIBRATION simplified abstract (Micron Technology, Inc.)
- 18668021. ONE-LADDER READ OF MEMORY CELLS COARSELY PROGRAMMED VIA INTERLEAVED TWO-PASS DATA PROGRAMMING TECHNIQUES simplified abstract (Micron Technology, Inc.)
- 18678949. Classification of Error Rate of Data Retrieved from Memory Cells simplified abstract (Micron Technology, Inc.)
M
- Micron technology, inc. (20240176698). MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES simplified abstract
- Micron technology, inc. (20240185915). OPTIMIZATION OF SOFT BIT WINDOWS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS simplified abstract
- Micron technology, inc. (20240231617). MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL simplified abstract
- Micron technology, inc. (20240232013). ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC simplified abstract
- Micron technology, inc. (20240265979). Selective and Dynamic Deployment of Error Correction Code Techniques in Integrated Circuit Memory Devices simplified abstract
- Micron technology, inc. (20240289218). TOUCHUP FOR MEMORY DEVICE USING EMBEDDED ENCODER/DECODER simplified abstract
- Micron technology, inc. (20240296896). READ DISTURB MITIGATION BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED FOR READ CALIBRATION simplified abstract
- Micron technology, inc. (20240304250). ONE-LADDER READ OF MEMORY CELLS COARSELY PROGRAMMED VIA INTERLEAVED TWO-PASS DATA PROGRAMMING TECHNIQUES simplified abstract
- Micron technology, inc. (20240312530). Classification of Error Rate of Data Retrieved from Memory Cells simplified abstract
- Micron technology, inc. (20240412792). SIMPLIFIED OPERATIONS TO READ MEMORY CELLS COARSELY PROGRAMMED VIA INTERLEAVED TWO-PASS DATA PROGRAMMING TECHNIQUES
- Micron technology, inc. (20240412795). TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED IN CALIBRATION OPERATIONS