Category:Hsien-Wei Chen

Hsien-Wei Chen

Executive Summary

Hsien-Wei Chen is an inventor who has filed 9 patents. Their primary areas of innovation include {Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group (5 patents), {Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected} (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (8 patents), Taiwan Semiconductor Manufacturing CO., Ltd. (1 patents). Their most frequent collaborators include (6 collaborations), (3 collaborations), (3 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 5 patents
• H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 4 patents
• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 3 patents
• H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
• H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/09 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 2 patents
• H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/1035 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/1041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/1058 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/66 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/552 (Protection against radiation, e.g. light {or electromagnetic waves}): 1 patents
• H01L24/96 ({the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting}): 1 patents
• H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
• H01L2223/6616 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2223/6672 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/95001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/96 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15174 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/585 ({comprising conductive layers or plates or strips or rods or rings (): 1 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/53295 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/0649 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/83 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/33 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06568 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06593 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06513 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1434 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06589 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06586 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06582 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3735 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/81 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3185 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13111 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13139 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/81193 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/81815 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/3511 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/50 (for integrated circuit devices, {e.g. power bus, number of leads} (): 1 patents
• H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L24/17 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/19 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/20 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/48 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/04042 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/04105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/12105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/48091 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/48227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/73265 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/73267 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/81385 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/00014 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/14 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/481 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L21/56 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/06 ({of a plurality of bonding areas}): 1 patents
• H01L23/49503 (Lead-frames {or other flat leads (): 1 patents
• H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 1 patents
• H03K19/1776 (PULSE TECHNIQUE (measuring pulse characteristics): 1 patents

Companies

List of Companies

• Taiwan Semiconductor Manufacturing Co., Ltd.: 8 patents
• Taiwan Semiconductor Manufacturing CO., Ltd.: 1 patents

Collaborators

• Ming-Fa Chen (6 collaborations)
• Shin-Puu Jeng (3 collaborations)
• Jie Chen (3 collaborations)
• Chieh-Lung Lai (2 collaborations)
• Meng-Liang Lin (2 collaborations)
• Chih-Chia Hu (2 collaborations)
• Chen-Hua Yu (2 collaborations)
• Chun-Yueh Yang (1 collaborations)
• Chun-Chiang Kuo (1 collaborations)
• Sen-Bor Jan (1 collaborations)
• Ying-Ju Chen (1 collaborations)
• Der-Chyang Yeh (1 collaborations)