Category:Hsiao-Hsuan Liu

Hsiao-Hsuan Liu

Executive Summary

Hsiao-Hsuan Liu is an inventor who has filed 4 patents. Their primary areas of innovation include {using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate} (3 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), to produce devices, e.g. integrated circuits, each consisting of a plurality of components (2 patents), and they have worked with companies such as IMEC VZW (4 patents). Their most frequent collaborators include (4 collaborations), (3 collaborations), (1 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 3 patents
• H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L21/823828 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L21/823871 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/41775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/823807 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/823864 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/306 (Chemical or electrical treatment, e.g. electrolytic etching (to form insulating layers): 1 patents
• H10B10/125 (ELECTRONIC MEMORY DEVICES): 1 patents
• H01L23/5286 ({Geometry or} layout of the interconnection structure {(): 1 patents

Companies

List of Companies

• IMEC VZW: 4 patents

Collaborators

• Boon Teik Chan (4 collaborations)
• Shairfe Muhammad Salahuddin (3 collaborations)
• Pieter Schuddinck (1 collaborations)
• Julien Ryckaert (1 collaborations)
• Bilal Chehab (1 collaborations)
• Sujith Subramanian (1 collaborations)