Category:Hiroshi MAEJIMA

Hiroshi MAEJIMA

Executive Summary

Hiroshi MAEJIMA is an inventor who has filed 10 patents. Their primary areas of innovation include {comprising cells having several storage transistors connected in series} (8 patents), Address circuits; Decoders; Word-line control circuits (7 patents), Sensing or reading circuits; Data output circuits (7 patents), and they have worked with companies such as Kioxia Corporation (9 patents), KIOXIA CORPORATION (1 patents). Their most frequent collaborators include (1 collaborations), (1 collaborations), (1 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• G11C16/0483 ({comprising cells having several storage transistors connected in series}): 8 patents
• G11C16/08 (Address circuits; Decoders; Word-line control circuits): 7 patents
• G11C16/26 (Sensing or reading circuits; Data output circuits): 7 patents
• G11C16/10 (Programming or data input circuits): 4 patents
• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 3 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2924/14511 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• G11C5/063 (STATIC STORES (semiconductor memory devices): 3 patents
• G11C16/16 (STATIC STORES (semiconductor memory devices): 2 patents
• H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 2 patents
• G11C7/06 (Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits}): 2 patents
• G11C16/3418 (STATIC STORES (semiconductor memory devices): 2 patents
• G11C16/3427 (STATIC STORES (semiconductor memory devices): 2 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H10B43/10 (ELECTRONIC MEMORY DEVICES): 1 patents
• H10B43/27 (ELECTRONIC MEMORY DEVICES): 1 patents
• H10B43/35 (ELECTRONIC MEMORY DEVICES): 1 patents
• H10B43/40 (ELECTRONIC MEMORY DEVICES): 1 patents
• G11C16/3459 ({Circuits or methods to verify correct programming of nonvolatile memory cells}): 1 patents
• H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06593 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06596 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G11C5/02 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C16/3422 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C16/04 (STATIC STORES (semiconductor memory devices): 1 patents
• G06F3/0614 ({Improving the reliability of storage systems}): 1 patents
• G06F3/0631 ({by allocating resources to storage systems}): 1 patents
• G06F3/0652 ({Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket}): 1 patents
• G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
• G06F3/0665 ({at area level, e.g. provisioning of virtual or logical volumes}): 1 patents
• G06F3/0679 ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 1 patents
• G06F12/0246 ({in block erasable memory, e.g. flash memory}): 1 patents
• G11C11/5635 ({Erasing circuits}): 1 patents
• G06F2212/1032 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G06F2212/152 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G06F2212/214 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G06F2212/7202 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C2213/71 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C16/14 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C16/24 (Bit-line control circuits): 1 patents
• G11C16/28 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C16/32 (Timing circuits): 1 patents

Companies

List of Companies

• Kioxia Corporation: 9 patents
• KIOXIA CORPORATION: 1 patents

Collaborators

• Tomoya SANUKI (1 collaborations)
• Tetsuaki UTSUMI (1 collaborations)
• Katsuaki ISOBE (1 collaborations)
• Keita KIMURA (1 collaborations)