Category:Dean D. Gans of Nampa ID (US)

Dean D. Gans of Nampa ID (US)

Executive Summary

Dean D. Gans of Nampa ID (US) is an inventor who has filed 10 patents. Their primary areas of innovation include {Single storage device} (3 patents), ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models (3 patents), with prefetch (2 patents), and they have worked with companies such as Lodestar Licensing Group LLC (10 patents). Their most frequent collaborators include (4 collaborations), (3 collaborations), (1 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• G06F3/0673 ({Single storage device}): 3 patents
• G06F13/1689 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 3 patents
• G06F12/0862 (with prefetch): 2 patents
• G06F13/20 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 2 patents
• G06F2212/1028 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 2 patents
• G06F2212/6022 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 2 patents
• G06F2212/652 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 2 patents
• G11C11/40618 (STATIC STORES (semiconductor memory devices): 2 patents
• G06F3/0604 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 2 patents
• G11C11/40611 (STATIC STORES (semiconductor memory devices): 1 patents
• G06F3/0634 ({by changing the state or mode of one or more devices}): 1 patents
• G06F3/0611 ({in relation to response time}): 1 patents
• G06F13/16 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C7/1045 ({Read-write mode select circuits}): 1 patents
• G11C2207/2272 (STATIC STORES (semiconductor memory devices): 1 patents
• G06F13/4068 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C5/02 (STATIC STORES (semiconductor memory devices): 1 patents
• G06F13/42 (Bus transfer protocol, e.g. handshake; Synchronisation): 1 patents
• G11C7/1012 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
• G11C7/1069 ({I/O lines read out arrangements}): 1 patents
• G11C11/4096 (Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches): 1 patents
• G06F13/4234 (Bus transfer protocol, e.g. handshake; Synchronisation): 1 patents
• G11C5/04 (Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports): 1 patents
• G11C5/063 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C11/4093 (Input/output [I/O] data interface arrangements, e.g. data buffers): 1 patents
• G06F11/076 (Responding to the occurrence of a fault, e.g. fault tolerance): 1 patents
• G06F11/3037 (Monitoring): 1 patents
• G06F12/0246 ({in block erasable memory, e.g. flash memory}): 1 patents
• G06F13/1668 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C11/2257 ({Word-line or row circuits}): 1 patents
• G11C11/2277 ({Verifying circuits or methods}): 1 patents
• G11C29/04 (STATIC STORES (semiconductor memory devices): 1 patents
• G06F3/0622 ({in relation to access}): 1 patents
• G06F3/0646 ({Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems}): 1 patents
• G06F12/0802 (Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches): 1 patents
• G06F2212/7203 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C7/22 (Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management): 1 patents
• G06F13/36 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• G11C7/10 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
• G11C11/40615 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C16/349 ({Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles}): 1 patents
• G11C11/4076 (Timing circuits (for regeneration management): 1 patents
• G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
• G11C11/4074 (Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits): 1 patents

Companies

List of Companies

• Lodestar Licensing Group LLC: 10 patents

Collaborators

• Robert Nasry Hasbun of San Jose CA (US) (4 collaborations)
• Sharookh Daruwalla of San Ramon CA (US) (3 collaborations)
• Timothy B. Cowles of Boise ID (US) (1 collaborations)
• Jiyun Li of Boise ID (US) (1 collaborations)
• Nathaniel J. Meier of Boise ID (US) (1 collaborations)
• Randall J. Rooney of Boise ID (US) (1 collaborations)
• Yoshiro Riho (1 collaborations)
• Shunichi Saito (1 collaborations)
• Osamu Nagashima (1 collaborations)
• Timothy M. Hollis of Meridian ID (US) (1 collaborations)
• Jeffrey P. Wright of Boise ID (US) (1 collaborations)
• John D. Porter of Boise ID (US) (1 collaborations)