Category:Chi On Chui

Chi On Chui

Executive Summary

Chi On Chui is an inventor who has filed 29 patents. Their primary areas of innovation include {using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate} (12 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (11 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (8 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (29 patents). Their most frequent collaborators include (8 collaborations), (5 collaborations), (5 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 12 patents
• H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 11 patents
• H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
• H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
• H01L29/66742 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
• H01L29/401 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
• H01L29/66553 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 6 patents
• H01L29/66795 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L21/823431 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 6 patents
• H01L29/6653 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 5 patents
• H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L29/4966 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L29/785 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L27/0924 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L21/28088 (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 3 patents
• H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L21/0228 ({deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD}): 3 patents
• H01L21/76224 ({using trench refilling with dielectric materials (trench filling with polycristalline silicon): 3 patents
• H01L21/823481 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
• H01L27/0886 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L21/823468 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
• H01L29/7851 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L29/41775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L21/823821 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L29/6684 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/78391 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/02211 ({the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers): 2 patents
• H01L21/02603 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/4983 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/6656 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 2 patents
• H01L21/28518 (from a gas or vapour, e.g. condensation): 2 patents
• H01L21/823456 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L29/45 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/7856 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/4908 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/823475 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L29/513 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/0665 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/28158 ({Making the insulator}): 2 patents
• H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/823412 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
• H01L29/41791 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L29/6681 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/823878 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H10B51/20 (ELECTRONIC MEMORY DEVICES): 1 patents
• H01L29/516 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H10B51/30 (ELECTRONIC MEMORY DEVICES): 1 patents
• H01L29/7869 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/28176 (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 1 patents
• H01L21/823842 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L29/66787 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/823807 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/02167 ({the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides (): 1 patents
• H01L21/0214 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/02263 ({deposition from the gas or vapour phase}): 1 patents
• H01L21/76232 (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 1 patents
• H01L29/66818 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/76227 (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 1 patents
• H01L21/28141 (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 1 patents
• H01L21/0234 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/31055 ({the removal being a chemical etching step, e.g. dry etching (etching per se): 1 patents
• H01L21/31116 ({by dry-etching}): 1 patents
• H01L29/4236 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/42372 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/31051 ({Planarisation of the insulating layers (): 1 patents
• H01L21/31111 ({by chemical means}): 1 patents
• H01L21/76229 (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 1 patents
• H01L21/764 (Making of isolation regions between components): 1 patents
• H01L21/823418 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L29/0649 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L28/92 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L28/75 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L28/91 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/42368 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/28194 (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 1 patents
• H01L21/28556 (from a gas or vapour, e.g. condensation): 1 patents
• H01L21/3115 (Doping the insulating layers): 1 patents
• H01L21/82345 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/02631 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/0206 ({during, before or after processing of insulating layers}): 1 patents
• H01L21/02321 ({introduction of substances into an already existing insulating layer (): 1 patents
• H01L21/02337 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/31122 (to form insulating layers thereon, e.g. for masking or by using photolithographic techniques (encapsulating layers): 1 patents
• G11C8/08 (Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines): 1 patents
• G11C29/025 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C29/12 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C29/50 (STATIC STORES (semiconductor memory devices): 1 patents
• H01L21/8221 ({Three dimensional integrated circuits stacked in different levels}): 1 patents
• G11C2029/1202 (STATIC STORES (semiconductor memory devices): 1 patents
• H01L29/41733 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L29/7834 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/30604 (Chemical or electrical treatment, e.g. electrolytic etching (to form insulating layers): 1 patents
• H01L21/3065 (Plasma etching; Reactive-ion etching): 1 patents
• H01L21/76843 ({formed in openings in a dielectric}): 1 patents
• H01L2029/7857 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/823462 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/823857 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/823871 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L27/088 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L27/0922 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/1079 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/66606 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/66621 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/7853 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

List of Companies

• Taiwan Semiconductor Manufacturing Co., Ltd.: 29 patents

Collaborators

• Hsin-Yi Lee (8 collaborations)
• Sai-Hooi Yeong (5 collaborations)
• Yung-Cheng Lu (5 collaborations)
• Weng Chang (5 collaborations)
• Meng-Han Lin (4 collaborations)
• Cheng-Lung Hung (4 collaborations)
• Che-Hao Chang (4 collaborations)
• Wen-Kai Lin (3 collaborations)
• Xiong-Fei Yu (3 collaborations)
• Wan-Yi Kao (2 collaborations)
• Chung-Ting Ko (2 collaborations)
• Shu-Han Chen (2 collaborations)
• Cheng-Hao Hou (2 collaborations)
• Ji-Cheng Chen (2 collaborations)
• Pei Ying Lai (2 collaborations)
• Chia-Wei Hsu (2 collaborations)
• Bo-Cyuan Lu (1 collaborations)
• Hsin-Che Chiang (1 collaborations)
• Tai-Chun Huang (1 collaborations)
• Chia-En Huang (1 collaborations)
• Bo-Feng Young (1 collaborations)
• Hung Cheng Lin (1 collaborations)
• Yu-Cheng Shiau (1 collaborations)
• Chunyao Wang (1 collaborations)
• Chih-Tang Peng (1 collaborations)
• Sung-En Lin (1 collaborations)
• Tsung-Ju Chen (1 collaborations)
• Ta-Hsiang Kung (1 collaborations)
• Shin-Hung Tsai (1 collaborations)
• Da-Yuan Lee (1 collaborations)
• Kuei-Lun Lin (1 collaborations)
• Yen-Fu Chen (1 collaborations)
• Po-Ting Lin (1 collaborations)
• Chia-Yuan Chang (1 collaborations)
• Szu-Ying Chen (1 collaborations)
• Mao-Lin Huang (1 collaborations)
• Lung-Kun Chu (1 collaborations)
• Huang-Lin Chao of Hillsboro OR (US) (1 collaborations)
• Hsin-Han Tsai (1 collaborations)
• Chung-Chiang Wu (1 collaborations)
• Cheng-I Lin (1 collaborations)
• Hsueh-Ju Chen (1 collaborations)
• Tsung-Da Lin (1 collaborations)
• Pei-Yu Wang (1 collaborations)
• Yoh-Rong Liu (1 collaborations)
• Li-Chi Yu (1 collaborations)
• Sen-Hong Syue (1 collaborations)
• Heng-Chia Su (1 collaborations)
• Li-Fong Lin (1 collaborations)
• Zhen-Cheng Wu (1 collaborations)