Category:Chen-Hua Yu

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Chen-Hua Yu

Executive Summary

Chen-Hua Yu is an inventor who has filed 43 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (9 patents), {Multilayer substrates (multilayer metallisation on monolayer substrate (8 patents), Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor} (8 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (43 patents). Their most frequent collaborators include (9 collaborations), (8 collaborations), (6 collaborations).

Patent Filing Activity

Chen-Hua Yu Monthly Patent Applications.png

Technology Areas

Chen-Hua Yu Top Technology Areas.png

List of Technology Areas

  • H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 9 patents
  • H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 8 patents
  • H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 8 patents
  • H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 8 patents
  • H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
  • H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
  • H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 8 patents
  • H01L21/56 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 7 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 6 patents
  • H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
  • H01L23/5383 ({Multilayer substrates (): 6 patents
  • H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 6 patents
  • H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 6 patents
  • H01L24/17 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L2225/1058 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 5 patents
  • H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 5 patents
  • H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 5 patents
  • H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L24/81 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L21/561 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L21/76898 ({formed through a semiconductor substrate}): 4 patents
  • H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • G02B6/13 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 4 patents
  • H01L23/3121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • G02B6/12004 (of the integrated circuit kind (electric integrated circuits): 4 patents
  • H01L24/09 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L21/565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L24/19 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L23/3114 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L21/563 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 3 patents
  • H01L24/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L24/96 ({the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting}): 3 patents
  • H01L24/48 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2225/1041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2924/182 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • G02B2006/12121 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 3 patents
  • G02B6/4214 (Coupling light guides with opto-electronic elements): 3 patents
  • H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 3 patents
  • H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 3 patents
  • H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2224/32245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2224/0231 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L24/14 ({of a plurality of bump connectors}): 3 patents
  • H01L24/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L21/76802 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 3 patents
  • H01L23/31 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L24/29 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 3 patents
  • H01L24/20 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2225/1035 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2924/3511 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/08235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/32145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2225/1023 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • G02B6/1225 (of the integrated circuit kind (electric integrated circuits): 2 patents
  • H01L23/3677 (Cooling facilitated by shape of device {(): 2 patents
  • H01L24/33 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/33181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/73253 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/473 (by flowing liquids {(): 2 patents
  • H01L23/3135 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • G02B6/4239 (Coupling light guides with opto-electronic elements): 2 patents
  • G02B2006/12104 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 2 patents
  • G02B6/136 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 2 patents
  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/02373 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2924/1433 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L24/06 ({of a plurality of bonding areas}): 2 patents
  • G02B6/132 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 2 patents
  • G02B2006/12061 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 2 patents
  • H01L2224/02375 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L24/83 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2924/1632 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 2 patents
  • H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/49811 ({Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads (): 2 patents
  • H01L2224/214 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L25/167 (the devices being of types provided for in two or more different main groups of groups): 2 patents
  • H01L23/3675 (Cooling facilitated by shape of device {(): 2 patents
  • H01L23/49861 ({Lead-frames fixed on or encapsulated in insulating substrates (): 2 patents
  • H01L23/528 ({Geometry or} layout of the interconnection structure {(): 2 patents
  • H01L23/4006 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/2919 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2924/1437 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/04105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/12105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/73267 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/175 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/81224 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16148 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/48229 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/95001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06513 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06544 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/37001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • G02B6/122 (of the integrated circuit kind (electric integrated circuits): 1 patents
  • G02B6/12019 (of the integrated circuit kind (electric integrated circuits): 1 patents
  • G02B6/4243 (Coupling light guides with opto-electronic elements): 1 patents
  • H01L21/6835 ({using temporarily an auxiliary support}): 1 patents
  • H01L23/147 ({Semiconductor insulating substrates (semiconductor conductive substrates): 1 patents
  • H01S5/02315 (Support members, e.g. bases or carriers): 1 patents
  • H01S5/0232 (Lead-frames): 1 patents
  • H01S5/02345 (DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL): 1 patents
  • H01S5/028 (DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL): 1 patents
  • H01L2224/48225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/3736 ({Metallic materials (): 1 patents
  • H01L2224/29124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29155 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29166 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29172 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • G02B6/262 (Optical coupling means (): 1 patents
  • G02B2006/12102 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
  • G02B6/30 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
  • H01L23/3171 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • H01L23/525 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/293 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/3192 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/5225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/5329 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/552 (Protection against radiation, e.g. light {or electromagnetic waves}): 1 patents
  • H01L24/11 ({Manufacturing methods (for bumps on insulating substrates): 1 patents
  • H01L23/5286 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • G02B6/4295 (Coupling light guides with opto-electronic elements): 1 patents
  • H01L2224/02381 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4878 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L23/315 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83359 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2021/60022 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/49866 ({characterised by the materials (materials of the substrates): 1 patents
  • H01L23/49894 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
  • H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/14 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8234 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/35 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/0401 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/211 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/2101 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/2902 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/14104 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8134 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H04B10/50 (Transmitters): 1 patents
  • H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4882 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L23/44 (the complete device being wholly immersed in a fluid other than air {(): 1 patents
  • H01L23/3735 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/16196 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/16587 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29187 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/82896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/02379 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/544 (Marks applied to semiconductor devices {or parts}, e.g. registration marks, {alignment structures, wafer maps (test patterns for characterising or monitoring manufacturing processes): 1 patents
  • H01L21/76895 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
  • H01L21/77 (Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate (electrically programmable read-only memories or multistep manufacturing processes therefor): 1 patents
  • H01L2224/02311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/02313 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/0239 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
  • H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L2224/16146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/818 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1434 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • G02B6/43 (Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections): 1 patents
  • G02B6/4204 (Coupling light guides with opto-electronic elements): 1 patents
  • G02B6/4253 (Coupling light guides with opto-electronic elements): 1 patents
  • G02B2006/12123 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
  • H01L2224/05022 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05571 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05624 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05647 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05666 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05684 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08237 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13109 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13111 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13116 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13139 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13144 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13155 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/13164 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80357 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80379 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/0504 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/0544 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/05494 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/0665 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/07025 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1432 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/14361 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • G02B6/0006 (Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings): 1 patents
  • G02B6/124 (of the integrated circuit kind (electric integrated circuits): 1 patents
  • G02B6/4244 (Coupling light guides with opto-electronic elements): 1 patents
  • G02B6/4283 (Coupling light guides with opto-electronic elements): 1 patents
  • H01L23/367 (Cooling facilitated by shape of device {(): 1 patents
  • H01L23/4012 ({for stacked arrangements of a plurality of semiconductor devices (assemblies per se): 1 patents
  • H01L23/50 (for integrated circuit devices, {e.g. power bus, number of leads} (): 1 patents
  • H01L2224/04042 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/48091 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/48227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/73265 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/81385 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/00014 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/14 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/481 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L24/92 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/33505 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/33519 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80006 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8083 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83005 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8383 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/92142 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06589 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/023 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/107 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/568 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/76877 ({Thin films associated with contacts of capacitors}): 1 patents
  • H01L2224/19 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83101 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/92244 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/18162 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4871 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L21/78 (with subsequent division of the substrate into plural individual devices (cutting to change the surface-physical characteristics or shape of semiconductor bodies): 1 patents
  • H01L22/12 ({for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions (electrical measurement of diffusions): 1 patents
  • H01L2924/19103 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

Chen-Hua Yu Top Companies.png

List of Companies

  • Taiwan Semiconductor Manufacturing Co., Ltd.: 43 patents

Collaborators

Subcategories

This category has the following 12 subcategories, out of 12 total.

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