Applied Materials, Inc. patent applications on September 12th, 2024
Patent Applications by Applied Materials, Inc. on September 12th, 2024
Applied Materials, Inc.: 18 patent applications
Applied Materials, Inc. has applied for patents in the areas of H01J37/32 (7), C23C16/455 (4), H01L21/02 (3), H01L21/687 (3), C23C16/56 (2) C23C14/351 (1), H01L21/67103 (1), H05B3/0047 (1), H01L29/1054 (1), H01L21/76862 (1)
With keywords such as: layer, process, substrate, plasma, chamber, silicon, material, metal, deposition, and surface in patent application abstracts.
Patent Applications by Applied Materials, Inc.
Inventor(s): Thomas Werner Zilbauer of Gauting (DE) for applied materials, inc., Andreas Lopp of Freigericht (DE) for applied materials, inc.
IPC Code(s): C23C14/35, C23C14/00, C23C14/08, C23C14/14, C23C14/34, H01J37/32, H01J37/34
CPC Code(s): C23C14/351
Abstract: a sputter deposition source for depositing a material on a substrate is described. the sputter deposition source includes an array of magnetron sputter cathodes arranged in a row for coating the substrate in a deposition area on a front side of the array. at least one magnetron sputter cathode of the array includes a first rotary target rotatable around a first rotation axis (a); and a first magnet assembly arranged in the first rotary target and configured to provide a closed plasma racetrack (p) on a surface of the first rotary target that extends along the first rotation axis (a) on a first side and on a second side of the at least one magnetron sputter cathode. further described is a magnetron sputter cathode for a sputter deposition source and a method of depositing a material on a substrate.
Inventor(s): Thomas Joseph Knisley of Livonia MI (US) for applied materials, inc., Bhaskar Jyoti Bhuyan of San Jose CA (US) for applied materials, inc., Mark Saly of Santa Clara CA (US) for applied materials, inc., Shalini Tripathi of Detroit MI (US) for applied materials, inc., Charles H. Winter of Bloomfield Hills MI (US) for applied materials, inc., Zachary J. Devereaux of Webberville MI (US) for applied materials, inc.
IPC Code(s): C23C16/18, C07F11/00
CPC Code(s): C23C16/18
Abstract: metal complexes with nitrile ligands of the type moxl, where m is molybdenum or tungsten, x is a halogen, each l is independently an organonitrile ligand with the general formula ncr, where each r is independently a c2-c18 group. metal complexes with dinitrile bidentate ligands of the type moxl′, where l′ is a dintrile ligand, and dinitrile bridging ligands of the type (mox)l′, where l′ is a dinitrile bridging ligand connecting the two metal atoms. methods of making and using the metal complexes are described.
Inventor(s): Harshil Kashyap of San Diego CA (US) for applied materials, inc., Andrew C. Kummel of San Diego CA (US) for applied materials, inc., Ajay Kumar Yadav of Santa Clara CA (US) for applied materials, inc., Keith T. Wong of Mountain View CA (US) for applied materials, inc., Srinivas Nemani of Saratoga CA (US) for applied materials, inc., Ellie Yieh of San Jose CA (US) for applied materials, inc.
IPC Code(s): C23C16/455, C23C16/24, C23C16/40
CPC Code(s): C23C16/45529
Abstract: described herein is a method for performing an atomic layer deposition process to form a silicon doped oxide film on a surface of the substrate. the oxide film may be a hafnium-zirconium oxide film, or a zirconium oxide film. the atomic layer deposition process may include forming the oxide layers and a silicon layer using a hydrogen peroxide as at least one of the precursors used in formation of the oxide layers.
Inventor(s): Christopher S. OLSEN of Fremont CA (US) for applied materials, inc., Theresa K. GUARINI of San Jose CA (US) for applied materials, inc., Jeffrey TOBIN of Mountain View CA (US) for applied materials, inc., Lara HAWRYLCHAK of Gilroy CA (US) for applied materials, inc., Peter STONE of Los Gatos CA (US) for applied materials, inc., Chi Wei LO of San Jose CA (US) for applied materials, inc., Saurabh CHOPRA of Santa Clara CA (US) for applied materials, inc.
IPC Code(s): C30B25/18, C30B29/06, C30B29/08
CPC Code(s): C30B25/186
Abstract: a process for cleaning a substrate includes removing carbon containing contaminants from a native oxide layer on a surface of a substrate by performing a reducing process using a hydrogen containing plasma, and after removing carbon containing contaminants, removing the native oxide layer from the substrate by performing an etch process using a fluorine containing plasma.
20240302812. FABRICATION TOOL CALIBRATION_simplified_abstract_(applied materials, inc.)
Inventor(s): Gautham Bammanahalli of Newark CA (US) for applied materials, inc., Nathaniel Moore of San Jose CA (US) for applied materials, inc.
IPC Code(s): G05B19/401
CPC Code(s): G05B19/401
Abstract: a method for calibrating a fabrication system including selecting, from multiple recipes, a calibration recipe including a first process parameter for performing a fabrication process on a substrate, including: for each recipe and for two or more substrates, characterization data representative of the fabrication process performed on the two or more substrates using the recipe is received. a second process parameter is determined from the first and second states of the substrates, and a process relationship is determined between the first process parameter and the second process parameter for the recipe. the calibration recipe is selected from the multiple recipes based on the respective process relationships, a threshold variation for the process relationship is determined between the first and the second process parameter; and the calibration recipe and the threshold variation are provided for calibrating the fabrication system.
Inventor(s): Sandip NIYOGI of Oakland CA (US) for applied materials, inc., Wei LIU of Beijing (CN) for applied materials, inc., Dileep Venkata Sai VADLADI of Sunnyvale CA (US) for applied materials, inc., Lily HUANG of Santa Clara CA (US) for applied materials, inc.
IPC Code(s): H01J37/32, H01L21/02
CPC Code(s): H01J37/32449
Abstract: embodiments of the present disclosure generally relate to inductively coupled plasma sources and plasma processing apparatus. in at least one embodiment, a plasma processing method includes introducing a gas including helium and nitrogen into a gas injection channel of a plasma source. the method includes generating a plasma within the gas injection channel. the plasma includes helium radicals and nitrogen radicals. the method includes delivering the plasma from the plasma source to a process chamber including a substrate. the method includes producing a treated substrate by processing the substrate with the plasma within the process chamber, in which processing the substrate includes contacting the plasma including the helium radicals and nitrogen radicals with a first side of the substrate.
Inventor(s): Laksheswar Kalita of Milpitas CA (US) for applied materials, inc., Joseph Behnke of San Jose CA (US) for applied materials, inc., Ryan Pakulski of Brentwood CA (US) for applied materials, inc., Christopher L. Beaudry of San Jose CA (US) for applied materials, inc., Jonathan Strahle of San Francisco CA (US) for applied materials, inc.
IPC Code(s): H01J37/32, C23C16/40, C23C16/44, C23C16/455, C23C16/458, C23C16/50, C23C16/56
CPC Code(s): H01J37/32495
Abstract: the present technology is generally directed to semiconductor processing systems and methods. systems and methods include a chamber having a plurality of chamber components, such as a pedestal, a lid stack, a faceplate, electrode, and a showerhead. the faceplate is supported with the lid stack and defines a plurality of first apertures and the showerhead is positioned between the faceplate and the pedestal and defines a plurality of second apertures. in systems and methods, the faceplate, the showerhead, the lid stack, the pedestal, or a combination thereof include an yttrium fluoride, yttrium oxyfluoride, or both yttrium fluoroide and yttrium oxyfluoride coating having a thickness of greater than 10 �m on at least a portion of the respective chamber component or combination thereof.
Inventor(s): Tiefeng SHI of San Jose CA (US) for applied materials, inc., Gang FU of Cupertino CA (US) for applied materials, inc., Keith A. MILLER of Mountain View CA (US) for applied materials, inc.
IPC Code(s): H01J37/32, G06N3/09
CPC Code(s): H01J37/32944
Abstract: methods, apparatuses and systems for detecting and managing arc events during a plasma chamber process include receiving impedance data measured during a plasma chamber process, analyzing the impedance data to determine if an arc event is occurring during the plasma chamber process, and if it is determined that an arc event is occurring, an action is taken to suppress an arc of the arc event. in some instances, a machine learning model that has been trained to recognize when an arc event is occurring from received measurement data is used to determine if an arc event is occurring.
Inventor(s): Mehdi Vaez-Iravani of Los Gatos CA (US) for applied materials, inc., Todd J. Egan of Fremont CA (US) for applied materials, inc., Kyle Ross Tantiwong of Livermore CA (US) for applied materials, inc.
IPC Code(s): H01J37/32, C23C14/34, C23C14/54, C23C16/44, C23C16/52, G01N21/01, H01J37/34
CPC Code(s): H01J37/32972
Abstract: implementations disclosed describe a system that includes a deposition chamber, a light source to produce an incident beam of light, wherein the incident beam of light is to illuminate a region of the deposition chamber, and a camera to collect a scattered light originating from the illuminated region of the deposition chamber, wherein the scattered light is to be produced upon interaction of the first incident beam of light with particles inside the illuminated region of the deposition chamber. the described system may optionally have a processing device, coupled to the camera, to generate scattering data for a plurality of locations of the illuminated region, wherein the scattering data for each location comprises intensity of the scattered light originating from this location.
Inventor(s): Chuanxi YANG of Los Altos CA (US) for applied materials, inc., Hang YU of Woodland CA (US) for applied materials, inc., Sanjay KAMATH of Fremont CA (US) for applied materials, inc., Deenesh PADHI of Sunnyvale CA (US) for applied materials, inc., Honggun KIM of San Jose CA (US) for applied materials, inc., Euhngi LEE of Santa Clara CA (US) for applied materials, inc., Zubin HUANG of Santa Clara CA (US) for applied materials, inc., Diwakar N. KEDLAYA of San Jose CA (US) for applied materials, inc., Rui CHENG of Santa Clara CA (US) for applied materials, inc., Karthik JANAKIRAMAN of San Jose CA (US) for applied materials, inc.
IPC Code(s): H01L21/02, C23C16/02, C23C16/34, C23C16/513
CPC Code(s): H01L21/0217
Abstract: capacitor devices containing silicon boron nitride with high boron concentration are provided. in one or more examples, a capacitor device is provided and contains a stopper layer containing silicon boron nitride and disposed on a substrate, a dielectric layer disposed on the stopper layer, vias formed within the dielectric layer and the stopper layer, metal contacts disposed on bottoms of the vias, a nitride barrier layer containing a metal nitride material and disposed on walls of the vias and disposed on the metal contacts, and an oxide layer disposed within the vias on the nitride barrier layer, wherein the oxide layer contains one or more holes or voids formed therein. the silicon boron nitride contains about 18 atomic percent (at %) to about 50 at % of boron.
Inventor(s): Akshay Gunaji of Karnataka (IN) for applied materials, inc., Tejas Umesh Ulavi of Fremont CA (US) for applied materials, inc., Sanjeev Baluja of Campbell CA (US) for applied materials, inc.
IPC Code(s): H01L21/67, C23C16/455, C23C16/46, F27D5/00, H01L21/687, H05B3/22
CPC Code(s): H01L21/67103
Abstract: a heater assembly having a top seal and a second seal configured to account for deviation in processing heights and motor runoff of a heater standoff. the top seal is positioned between a shield plate and a top plate and the bottom seal is positioned between a heater mounting base and the heater standoff.
Inventor(s): Nicholas Michael Bergantz of San Jose CA (US) for applied materials, inc., Jeffrey Hudgens of San Francisco CA (US) for applied materials, inc., Doug McAllister of San Ramon CA (US) for applied materials, inc., Helder Lee of San Jose CA (US) for applied materials, inc.
IPC Code(s): H01L21/67, H01L21/673
CPC Code(s): H01L21/67265
Abstract: a system includes a factory interface, a load port connected to the factory interface, and a system controller. the system controller is to, responsive to detecting that a container is received at the load port, determine a type of parts for storage at the container. one or more mapping patterns associated with the determined type of parts is identified. a detection system of robot arm(s) of the factory interface is moved according to the identified mapping pattern(s) to detect one or more parts stored by the container. a mapping of the container is determined based on the movement of the robot arm(s). the mapping indicates regions of the container that stores detected parts and a position of each of the detected parts. based on the mapping, the robot arm(s) either remove a detected part form the container or place an additional part in the container.
20240304486. DIFFERENTIAL SUBSTRATE BACKSIDE COOLING_simplified_abstract_(applied materials, inc.)
Inventor(s): Yogananda Sarode Vishwanath of Bangalore (IN) for applied materials, inc., Anand Kumar of Bangalore (IN) for applied materials, inc.
IPC Code(s): H01L21/683, H01J37/32, H01L21/687
CPC Code(s): H01L21/6833
Abstract: an electrostatic chuck (esc) having a ceramic body including embedded electrodes and having a first diameter. three or more regions are defined on a surface and arranged concentrically on the surface, each region includes a retaining ring arranged on the surface and defining an outer edge of the region, and supportive structures arranged on the surface and within the region. the supportive structures are configured to support a surface of a substrate when the substrate is retained by the esc. the esc includes conduits formed in the ceramic body and configured to independently introduce a gas into each region through the ceramic body and to the first surface. each region is configured to retain a corresponding positive gas pressure within the region and the surface of the substrate, and the one or more embedded electrodes are configured to generate a retaining force on the surface of the substrate.
Inventor(s): Hui CHEN of Tempe AZ (US) for applied materials, inc., Xinning LUAN of Tempe AZ (US) for applied materials, inc., Kirk Allen FISHER of Tempe AZ (US) for applied materials, inc., Shawn Joseph BONHAM of Mesa AZ (US) for applied materials, inc., Aimee S. ERHARDT of Tempe AZ (US) for applied materials, inc., Zhepeng CONG of San Jose CA (US) for applied materials, inc., Shaofeng CHEN of Austin TX (US) for applied materials, inc., Schubert S. CHU of San Francisco CA (US) for applied materials, inc., James M. AMOS of Apache Junction AZ (US) for applied materials, inc., Philip Michael AMOS of Apache Junction AZ (US) for applied materials, inc., John NEWMAN of Chandler AZ (US) for applied materials, inc.
IPC Code(s): H01L21/687, C23C16/32, C23C16/458
CPC Code(s): H01L21/68757
Abstract: a susceptor for use in a processing chamber for supporting a wafer includes a susceptor substrate having a front side and a back side opposite the front side, and a coating layer deposited on the susceptor substrate. the front side has a pocket configured to hold a wafer to be processed in a processing chamber, the pocket being textured with a first pattern. the back side is textured with a second pattern.
Inventor(s): Tsung-Han Yang of San Jose CA (US) for applied materials, inc., Zhen Liu of Santa Clara CA (US) for applied materials, inc., Yongqian Gao of Sunnyvale CA (US) for applied materials, inc., Michael S. Jackson of Sunnyvale CA (US) for applied materials, inc., Rongjun Wang of Dublin CA (US) for applied materials, inc.
IPC Code(s): H01L21/768, C23C16/14, C23C16/455, C23C16/56, H01J37/32
CPC Code(s): H01L21/76862
Abstract: a method of forming a semiconductor device structure by utilizing a hydrogen plasma treatment to promote selective deposition is disclosed. in some embodiments, the method includes forming a metal layer within at least one feature on the semiconductor device structure. the method includes exposing the metal layer to a hydrogen plasma treatment. the hydrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal film growth. in some embodiments, the hydrogen plasma treatment comprises substantially only hydrogen ions.
20240304671. Methods For Forming Gate Structures_simplified_abstract_(applied materials, inc.)
Inventor(s): Nicolas Louis BREIL of San Jose CA (US) for applied materials, inc., Balasubramanian PRANATHARTHIHARAN of San Jose CA (US) for applied materials, inc.
IPC Code(s): H01L29/10, H01L21/02, H01L21/8234, H01L27/088, H01L29/06, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H01L29/1054
Abstract: a method for forming a gate structure uses epitaxial growth to form the layers of the gate structure. the method includes epitaxially growing a first silicon germanium layer with a first germanium percentage on a silicon substrate, growing a first silicon layer on the first silicon germanium layer, growing a second silicon germanium layer with a second germanium percentage greater than the first germanium percentage, growing a second silicon layer on the second silicon germanium layer, selectively etching a portion of the first silicon germanium layer to form a recess; selectively depositing a low-k dielectric material to fill the recess, and selectively oxidizing the second silicon germanium layer throughout to form a silicon germanium oxide layer.
Inventor(s): Yao-Hung YANG of Santa Clara CA (US) for applied materials, inc., Shantanu Rajiv GADGIL of Santa Clara CA (US) for applied materials, inc., Kaushik RAO of Santa Clara CA (US) for applied materials, inc., Ngoc LE of Santa Clara CA (US) for applied materials, inc., Jeffrey Donald OLSON of Castro Valley CA (US) for applied materials, inc.
IPC Code(s): H05B3/00, B23K1/19, H05B3/02
CPC Code(s): H05B3/0047
Abstract: embodiments of lamp housings for a process chamber are provided herein. in some embodiments, a lamp housing for a process chamber includes: a first plate having a plurality of first openings; a copper plate having a plurality of second openings; a plurality of tubes brazed via a braze alloy to the first plate at first ends of the plurality of tubes and brazed to the copper plate via the braze alloy at second ends of the plurality of tubes, wherein the plurality of tubes have central openings that are aligned with the plurality of first openings and the plurality of second openings, and wherein the braze alloy comprises a nickel containing alloy or a copper containing alloy, wherein the copper containing alloy does not include gold; and an annular jacket circumscribing the plurality of tubes and brazed to the first plate via the braze alloy.
Inventor(s): Hao-Ling Tang of Campbell CA (US) for applied materials, inc., Arvind Kumar of Austin TX (US) for applied materials, inc., Mahendra Pakala of Saratoga CA (US) for applied materials, inc., Keith Tatseun Wong of North Bend WA (US) for applied materials, inc., Yi-Hsuan Hsiao of San Jose CA (US) for applied materials, inc., Dongqing Yang of Pleasanton CA (US) for applied materials, inc., Mark Conrad of Cohoes NY (US) for applied materials, inc., Rio Soedibyo of Ballston Spa NY (US) for applied materials, inc., Minrui Yu of San Jose CA (US) for applied materials, inc.
IPC Code(s): H10B43/27, H10B43/35
CPC Code(s): H10B43/27
Abstract: two-dimensional (2d) materials formed in very thin layers improve the operation of semiconductor devices. however, forming a contact on 2d material tends to damage and penetrate the 2d material. a relatively gentle etch process has been developed that is very selective to the 2d material and allows vertical holes to be etched down to the 2d material without damaging or penetrating the 2d material. a low-power deposition process forms a protective liner when performing the metal fill to further prevent damage to the 2d material when forming the metal contacts in the holes. these processes allow a vertical metal contact to be formed on a planar 2d material or a vertical sidewall contact be formed in a 3d nand without damaging the 2d material. this increases the contact area, reduces the contact resistance, and improves the performance of the 2d material in the device.
Applied Materials, Inc. patent applications on September 12th, 2024
- Applied Materials, Inc.
- C23C14/35
- C23C14/00
- C23C14/08
- C23C14/14
- C23C14/34
- H01J37/32
- H01J37/34
- CPC C23C14/351
- Applied materials, inc.
- C23C16/18
- C07F11/00
- CPC C23C16/18
- C23C16/455
- C23C16/24
- C23C16/40
- CPC C23C16/45529
- C30B25/18
- C30B29/06
- C30B29/08
- CPC C30B25/186
- G05B19/401
- CPC G05B19/401
- H01L21/02
- CPC H01J37/32449
- C23C16/44
- C23C16/458
- C23C16/50
- C23C16/56
- CPC H01J37/32495
- G06N3/09
- CPC H01J37/32944
- C23C14/54
- C23C16/52
- G01N21/01
- CPC H01J37/32972
- C23C16/02
- C23C16/34
- C23C16/513
- CPC H01L21/0217
- H01L21/67
- C23C16/46
- F27D5/00
- H01L21/687
- H05B3/22
- CPC H01L21/67103
- H01L21/673
- CPC H01L21/67265
- H01L21/683
- CPC H01L21/6833
- C23C16/32
- CPC H01L21/68757
- H01L21/768
- C23C16/14
- CPC H01L21/76862
- H01L29/10
- H01L21/8234
- H01L27/088
- H01L29/06
- H01L29/423
- H01L29/66
- H01L29/775
- H01L29/786
- CPC H01L29/1054
- H05B3/00
- B23K1/19
- H05B3/02
- CPC H05B3/0047
- H10B43/27
- H10B43/35
- CPC H10B43/27
