Applied Materials, Inc. patent applications on October 10th, 2024
Patent Applications by Applied Materials, Inc. on October 10th, 2024
Applied Materials, Inc.: 23 patent applications
Applied Materials, Inc. has applied for patents in the areas of C23C16/455 (4), H01L21/67 (4), H01L21/687 (3), H01L21/683 (3), H01J37/32 (3) H01J37/05 (2), H10K59/122 (2), H01L21/67103 (1), H10B12/485 (1), H10B12/315 (1)
With keywords such as: substrate, portion, gas, disposed, surface, process, include, layer, assembly, and electrode in patent application abstracts.
Patent Applications by Applied Materials, Inc.
20240337020. GAS INJECTOR FOR EPITAXY AND CVD CHAMBER_simplified_abstract_(applied materials, inc.)
Inventor(s): Tetsuya ISHIKAWA of San Jose CA (US) for applied materials, inc., Swaminathan T. SRINIVASAN of Pleasanton CA (US) for applied materials, inc., Matthias BAUER of Sunnyvale CA (US) for applied materials, inc., Ala MORADIAN of Sunnyvale CA (US) for applied materials, inc., Manjunath SUBBANNA of Bangalore (IN) for applied materials, inc., Kartik Bhupendra SHAH of Saratoga CA (US) for applied materials, inc., Errol Antonio C. SANCHEZ of Tracy CA (US) for applied materials, inc., Sohrab ZOKAEI of Los Altos CA (US) for applied materials, inc., Michael R. RICE of Pleasanton CA (US) for applied materials, inc., Peter REIMER of Los Altos CA (US) for applied materials, inc.
IPC Code(s): C23C16/455, B01J4/00, C23C16/44
CPC Code(s): C23C16/4558
Abstract: the present disclosure generally relates to gas inject apparatus for a process chamber for processing of semiconductor substrates. the gas inject apparatus include one or more gas injectors which are configured to be coupled to the process chamber. each of the gas injectors are configured to receive a process gas and distribute the process gas across one or more gas outlets. the gas injectors include a plurality of pathways, a fin array, and a baffle array. the gas injectors are individually heated. a gas mixture assembly is also utilized to control the concentration of process gases flown into a process volume from each of the gas injectors. the gas mixture assembly enables the concentration as well as the flow rate of the process gases to be controlled.
20240337040. PLATING SEAL WITH IMPROVED SURFACE_simplified_abstract_(applied materials, inc.)
Inventor(s): Kyle M. Hanson of Kalispell MT (US) for applied materials, inc.
IPC Code(s): C25D17/00, B29C64/124
CPC Code(s): C25D17/004
Abstract: the present technology includes monolithic electroplating seals, such as electroplating seals formed utilizing additive manufacturing. seals include an external seal member and an internal seal member. the external seal member includes an inner annular radius, an outer annular radius, and an external seal member body defined between an exterior surface and an interior surface opposite the exterior surface. the exterior surface is formed from at least one polymer layer having a porosity of less than or about 10 vol. % and the external seal member body includes a filler. the internal seal member is formed integrally with and extends along at least a portion of the interior surface of the external seal member from the inner annular radius towards the outer annular radius. the internal seal member includes a deformable thermoplastic elastomer.
Inventor(s): Muhannad Mustafa of Milpitas CA (US) for applied materials, inc., Sanjeev Baluja of Campbell CA (US) for applied materials, inc.
IPC Code(s): F16J15/10, C23C16/44, C23C16/455
CPC Code(s): F16J15/104
Abstract: embodiments of the present disclosure are related to directed to a pressure seal for a process chamber. the pressure seal comprises a bottom portion, a compressible middle portion on the bottom portion, and a top portion on the compressible middle portion. the disclosed pressure seal is configured to reduce pumping time of a process region in an interior volume of a processing chamber compared to a process chamber that does not include a pressure seal. processing chambers including the disclosed pressure seal are configured to process a semiconductor substrate at high temperatures, such as a temperature of greater than or equal to 350� c. methods of sealing a processing chamber using the disclosed pressure seal are also described.
20240337449. REGENERATOR FOR FORELINE HEATING_simplified_abstract_(applied materials, inc.)
Inventor(s): Santosh S. Nesarkar of Bangalore (IN) for applied materials, inc., Harinath Reghunathannair of Bengaluru (IN) for applied materials, inc., Sathishkumar Kummamoorthy of Bangalore (IN) for applied materials, inc.
IPC Code(s): F28D17/04, F28D17/02, H01J37/32, H01L21/67
CPC Code(s): F28D17/04
Abstract: semiconductor processing systems and system components are described for providing regenerative heating to a foreline component. a system includes a plasma-based processing chamber. the processing chamber includes one or more fluid paths configured to circulate a heat transfer fluid. the system also includes one or more vacuum systems configured to exhaust process gases from the processing chamber, the one or more vacuum systems including one or more vacuum pumps and a foreline vent. the system includes a foreline regenerator. the foreline regenerator includes a regenerator shell at least partially surrounding the foreline vent, the regenerator shell including a heat transfer fluid input and a heat transfer fluid output, wherein the heat transfer fluid input is coupled to an output of the processing chamber.
Inventor(s): Zhepeng CONG of San Jose CA (US) for applied materials, inc., Nimrod SMITH of Cupertino CA (US) for applied materials, inc., Ashur J. ATANOS of San Jose CA (US) for applied materials, inc., Tao SHENG of Santa Clara CA (US) for applied materials, inc.
IPC Code(s): G01J5/00, C23C16/458, C23C16/46, G01J5/08, G01J5/0801
CPC Code(s): G01J5/0007
Abstract: the present disclosure relates to systems, apparatus, and methods for monitoring plate temperature for semiconductor manufacturing. in one or more embodiments, a system for processing substrates and applicable for semiconductor manufacturing includes a chamber body including one or more sidewalls. the system includes a lid and a window, the one or more sidewalls, the window, and the lid at least partially defining an internal volume. the system includes one or more heat sources configured to heat the internal volume, a substrate support disposed in the internal volume, and a first optical sensor configured to detect energy having a first wavelength that is less than 4.0 microns. the system includes a second optical sensor configured to detect energy having a second wavelength that is less than the first wavelength.
Inventor(s): Kevin MESSER of Mountain View CA (US) for applied materials, inc., David Alexander SELL of Santa Clara CA (US) for applied materials, inc., Samarth BHARGAVA of Saratoga CA (US) for applied materials, inc.
IPC Code(s): G02B6/122, G02B6/12
CPC Code(s): G02B6/1223
Abstract: embodiments of the present disclosure generally relate to augmented reality waveguide combiners. the waveguides includes a waveguide substrate, having a substrate refractive index (ri) n, a slab waveguide layer disposed over the waveguide substrate, the slab waveguide layer having a slab ri nand a slab depth d, the slab depth dfrom a lower surface to an upper surface of the slab waveguide layer, at least one grating defined by a plurality of grating structures, the grating structures are disposed in, on, or over the slab waveguide layer, and a superstrate between and over the grating structures, the superstrate having a superstrate ri nand an interface with the slab waveguide layer. the slab ri nis greater than the substrate ri nand the slab ri nis greater than the superstrate ri n.
Inventor(s): Alexandre Likhanskii of Malden MA (US) for applied materials, inc., Nirbhav Singh Chopra of Princeton NJ (US) for applied materials, inc., Peter F. Kurunczi of Cambridge MA (US) for applied materials, inc., Anthony Renau of West Newbury MA (US) for applied materials, inc., Joseph C. Olson of Beverly MA (US) for applied materials, inc., Frank Sinclair of Hartland ME (US) for applied materials, inc.
IPC Code(s): H01J37/05, H01J37/147, H01J37/317
CPC Code(s): H01J37/05
Abstract: an apparatus may include an electrodynamic mass analysis (edma) assembly disposed downstream from the convergent ion beam assembly. the edma assembly may include a first stage, comprising a first upper electrode, disposed above a beam axis, and a first lower electrode, disposed below the beam axis, opposite the first upper electrode. the edma assembly may also include a second stage, disposed downstream of the first stage and comprising a second upper electrode, disposed above the beam axis, and a second lower electrode, disposed below the beam axis. the edma assembly may further include a deflection assembly, disposed between the first stage and the second stage, the deflection assembly comprising a blocker, disposed along the beam axis, an upper deflection electrode, disposed on a first side of the blocker, and a lower deflection electrode, disposed on a second side of the blocker.
Inventor(s): Alexandre Likhanskii of Malden MA (US) for applied materials, inc., Peter F. Kurunczi of Cambridge MA (US) for applied materials, inc., Nirbhav Singh Chopra of Princeton NJ (US) for applied materials, inc., Anthony Renau of West Newbury MA (US) for applied materials, inc., Joseph C. Olson of Beverly MA (US) for applied materials, inc., Frank Sinclair of Hartland ME (US) for applied materials, inc.
IPC Code(s): H01J37/05, H01J37/147, H01J37/317
CPC Code(s): H01J37/05
Abstract: an apparatus, including an electrodynamic mass analysis (edma) assembly. the edma assembly may include a first upper electrode, disposed above a beam axis; and a first lower electrode, disposed below the beam axis, opposite the first upper electrode, the edma assembly arranged to receive a first rf voltage signal at a first frequency. the apparatus may include a deflection assembly, disposed downstream to the edma assembly, the deflection assembly comprising a blocker, disposed along the beam axis. the apparatus may include an energy spread reducer (esr), disposed downstream to the deflection assembly, the energy spread reducer arranged to receive a second rf voltage signal at a second frequency, twice the first frequency. the esr may include an upper esr electrode, disposed above the beam axis; and a lower esr electrode, disposed below the beam axis.
20240339301. CCP GAS DELIVERY NOZZLE_simplified_abstract_(applied materials, inc.)
Inventor(s): Yogananda Sarode Vishwanath of Bangalore (IN) for applied materials, inc., Andrew Nguyen of San Jose CA (US) for applied materials, inc., Tom K. Cho of Los Altos Hills CA (US) for applied materials, inc.
IPC Code(s): H01J37/32, B33Y10/00, B33Y80/00
CPC Code(s): H01J37/3244
Abstract: example structures, methods, and systems for additive manufacturing of components of source and gas delivery nozzle assembly are disclosed. one example structure includes a unitary gas distribution nozzle assembly that includes an upper electrode portion and a lower electrode portion joined by multiple joining structures, and one or more gas zone divider walls positioned between the upper electrode portion and the lower electrode portion. the unitary gas distribution nozzle assembly is of a single material. each of the multiple joining structures is positioned between the upper electrode portion and the lower electrode portion. each of the multiple joining structures is configured to transfer radio-frequency (rf) energy and thermal energy between the upper electrode portion and the lower electrode portion. the one or more gas zone divider walls are configured to separate a region between the upper electrode portion and the lower electrode portion into two or more plenum chambers.
Inventor(s): Yogananda Sarode Vishwanath of Bangalore (IN) for applied materials, inc., Andrew Nguyen of San Jose CA (US) for applied materials, inc., Tom K. Cho of Los Altos Hills CA (US) for applied materials, inc.
IPC Code(s): H01J37/32, B33Y80/00
CPC Code(s): H01J37/32449
Abstract: systems, methods, and apparatus including designs embodied in machine-readable media for a gas break used in semiconductor processing systems. the apparatus includes a gas break structure comprising an insulating material and having one or more gas flow paths formed within a body of the gas break structure, the gas break structure configured to provide a specified impedance when coupled between a grounded gas distribution manifold and an electrically charged gas delivery nozzle, the gas break structure further comprising an internal structure having a specified geometry comprising a repeating structure and one or more empty gaps between elements of the repeating structure. the gas break can be formed using additive manufacturing.
20240339316. PROCESSES FOR DEPOSITING SIB FILMS_simplified_abstract_(applied materials, inc.)
Inventor(s): Aykut AYDIN of Sunnyvale CA (US) for applied materials, inc., Rui CHENG of Santa Clara CA (US) for applied materials, inc., Karthik JANAKIRAMAN of San Jose CA (US) for applied materials, inc., Abhijit Basu MALLICK of Fremont CA (US) for applied materials, inc., Takehito KOSHIZAWA of San Jose CA (US) for applied materials, inc., Bo QI of San Jose CA (US) for applied materials, inc.
IPC Code(s): H01L21/02
CPC Code(s): H01L21/02123
Abstract: embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. in an embodiment, a spacer-defined patterning process is provided. the process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than sih. the process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.
20240339318. SEGMENTED FORMATION OF GATE INTERFACE_simplified_abstract_(applied materials, inc.)
Inventor(s): Steven C. H. HUNG of Sunnyvale CA (US) for applied materials, inc., Theresa Kramer GUARINI of San Jose CA (US) for applied materials, inc., Johanes F. SWENBERG of Los Gatos CA (US) for applied materials, inc.
IPC Code(s): H01L21/02, C23C8/16, C23C8/36, C23C8/80, C23C16/02, C23C16/40, C23C16/455, C23C16/52, C23C16/56, C23C28/04
CPC Code(s): H01L21/02332
Abstract: a method of forming a semiconductor structure includes performing a first deposition process to deposit a first high-k dielectric layer on a surface of a substrate, performing an interface formation process to form an interfacial layer on the surface of the substrate, performing a second deposition process to deposit a second high-k dielectric layer on the interfacial layer, performing a plasma nitridation process to insert nitrogen atoms in the first high-k dielectric layer and the second high-k dielectric layer, and performing an anneal process to passivate chemical bonds in the first high-k dielectric layer and the second high-k dielectric layer.
Inventor(s): Banqiu WU of San Jose CA (US) for applied materials, inc., Khalid MAKHAMREH of Los Gatos CA (US) for applied materials, inc., Eliyahu Shlomo DAGAN of Sunnyvale CA (US) for applied materials, inc.
IPC Code(s): H01L21/265, H01L21/324
CPC Code(s): H01L21/26513
Abstract: methods and apparatus for contacting a substrate with a plasma at a pressure from about 300 torr to about 1000 torr for a period of time sufficient to heat a top portion of the substrate having a depth of less than about 200 nm, to a temperature high enough for annealing, and the temperature of the substrate at a depth of greater than or equal to about 200 nm is less than or equal to about 450� c.
20240339341. AUTOMATIC CONTROL OF SUBSTRATES_simplified_abstract_(applied materials, inc.)
Inventor(s): Mauro Cimino of San Jose CA (US) for applied materials, inc.
IPC Code(s): H01L21/67, H01L21/683, H01L21/687
CPC Code(s): H01L21/67103
Abstract: the present technology includes methods and systems for improving substrate processing. methods and systems include disposing a substrate on a pedestal that includes a plurality of heating zones each with an independent heater, processing the substrate according to an initial substrate processing recipe that includes an initial pedestal temperature, collecting initial substrate feedback of one or more substrate properties and providing the data as a first input to a substrate control algorithm. methods include generating a substrate model based upon one or more modeling tests of the substrate, providing the generated substrate model as a second input to the substrate control algorithm, controlling the heater power or heater temperature to achieve a targeted substrate property in one or more substrate regions. methods include where the correction is calculated and performed by a processor running the substrate control algorithm based upon the first input and the second input.
20240339342. EPI CHAMBER WITH FULL WAFER LASER HEATING_simplified_abstract_(applied materials, inc.)
Inventor(s): Shu-Kwan Danny LAU of Sunnyvale CA (US) for applied materials, inc., Adel George TANNOUS of Santa Clara CA (US) for applied materials, inc., Patrick C. GENIS of Boulder Creek CA (US) for applied materials, inc., Zhiyuan YE of San Jose CA (US) for applied materials, inc.
IPC Code(s): H01L21/67
CPC Code(s): H01L21/67115
Abstract: an apparatus for heating a substrate within a thermal processing chamber is disclosed. the apparatus includes a chamber body, a gas inlet, a gas outlet, an upper window, a lower window, a substrate support, and an upper heating device. the upper heating device is a laser heating device and includes one or more laser assemblies. the laser assemblies include light sources, a cooling plate, optical fibers, and irradiation windows.
20240339347. INTEGRATED SUBSTRATE MEASUREMENT SYSTEM_simplified_abstract_(applied materials, inc.)
Inventor(s): Patricia Schulze of Giddings TX (US) for applied materials, inc., Gregory John Freeman of Austin TX (US) for applied materials, inc., Michael Kutney of Santa Clara CA (US) for applied materials, inc., Arunkumar Ramachandraiah of Bengaluru (IN) for applied materials, inc., Chih Chung Chou of San Jose CA (US) for applied materials, inc., Zhaozhao Zhu of Milpitas CA (US) for applied materials, inc., Ozkan Celik of Cedar Park TX (US) for applied materials, inc.
IPC Code(s): H01L21/68, G01B11/24, H01L21/683, H01L21/687
CPC Code(s): H01L21/681
Abstract: an optical measurement device comprises a substrate holder to secure a substrate, a plurality of actuators to move the substrate holder relative to a plurality of axes, a first sensor to generate one or more first measurements or images of a first plurality of target positions on the substrate, and a second sensor to generate one or more second measurements of a second plurality of target positions on the substrate. the optical measurement device further comprises a plate, wherein the substrate holder, the plurality of actuators, the first sensor and the second sensor are each mounted to the plate, and wherein the plate provides vibration isolation from a factory interface to which the optical measurement device mounts. the optical measurement device further comprises a processing device that executes instructions to control the plurality of actuators and process the first measurements or images and the second measurements.
Inventor(s): Joseph Sommers of Roseville CA (US) for applied materials, inc., Joseph Behnke of San Jose CA (US) for applied materials, inc., Alexander Sulyman of San Francisco CA (US) for applied materials, inc., Jaeyong Cho of Mesa AZ (US) for applied materials, inc.
IPC Code(s): H01L21/683, H01L21/67, H01L21/673
CPC Code(s): H01L21/6833
Abstract: embodiments disclosed herein include an electrostatic chuck (esc). in an embodiment, the esc comprises a substrate with a first surface, where the first surface has a first surface roughness. the esc may further comprise a plurality of mesas extending up from the first surface. in an embodiment, the plurality of mesas each include a second surface, where the second surface has a second surface roughness. in an embodiment the first surface roughness and the second surface roughness both have an average surface roughness ra of approximately 0.3 �m or lower.
20240339352. SUSCEPTOR FOR PROCESS CHAMBER_simplified_abstract_(applied materials, inc.)
Inventor(s): Zhepeng CONG of San Jose CA (US) for applied materials, inc., Nimrod SMITH of Cupertino CA (US) for applied materials, inc., Zuoming ZHU of Sunnyvale CA (US) for applied materials, inc., Surendra Singh SRIVASTAVA of Santa Clara CA (US) for applied materials, inc.
IPC Code(s): H01L21/687
CPC Code(s): H01L21/68742
Abstract: a substrate support assembly is provided including: a susceptor assembly that includes an inner portion having an inner body, an outer rim disposed around the inner body, and a plurality of recessed portions, each recessed portion recessed relative to a lower surface of the inner body; and an outer portion positioned around the inner portion, the outer portion including an inner ledge. the outer rim of the inner portion is positioned on the inner ledge of the outer portion; and a first plurality of lift pins. each lift pin of the first plurality of lift pins underlies one of the recessed portions of the inner portion of the susceptor assembly.
Inventor(s): Jesus Candelario Mendoza-Gutierrez of San Jose CA (US) for applied materials, inc., Aaron Dangerfield of San Jose CA (US) for applied materials, inc., Bhaskar Jyoti Bhuyan of San Jose CA (US) for applied materials, inc., Mark Saly of Santa Clara CA (US) for applied materials, inc., Yang Zhou of Milpitas CA (US) for applied materials, inc., Yong Jin Kim of Albany CA (US) for applied materials, inc., Carmen Leal Cervantes of Mountain View CA (US) for applied materials, inc., Ge Qu of Sunnyvale CA (US) for applied materials, inc., Zhiyuan Wu of San Jose CA (US) for applied materials, inc., Feng Chen of San Jose CA (US) for applied materials, inc., Kevin Kashefi of Santa Clara CA (US) for applied materials, inc.
IPC Code(s): H01L21/768, C23C16/18, C23C16/455, C23C16/56
CPC Code(s): H01L21/76846
Abstract: methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. the methods include selectively depositing a self-assembled monolayer (sam) on the bottom of the gap. the sam has a general formula i to xix, wherein r, r′, r, r, r, r, and rare independently selected from hydrogen (h), alkyl, alkene, alkyne, and aryl, n is from 1 to 20, m is from 1 to 20, x is from 1 to 2, and y is from 1 to 2. a barrier layer is formed on the sam before selectively depositing a metal liner on the barrier layer. the sam is removed after selectively depositing the metal liner on the barrier layer.
Inventor(s): Zhijun Chen of San Jose CA (US) for applied materials, inc., Fredrick Fishburn of Aptos CA (US) for applied materials, inc., Milan Pesic of Paoli PA (US) for applied materials, inc.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/315
Abstract: the present technology includes vertical cell dynamic random-access memory (dram) array access transistors with improved hole distribution. the arrays include a plurality of bit lines arranged in a first horizontal direction and a plurality of word lines arranged in a second horizontal direction. the arrays include a plurality of channels extending in a vertical direction orthogonal to the first direction and the second horizontal direction, such that the plurality of bit lines intersect with a source/drain region of the plurality of channels, and the plurality of word lines intersect with gate regions of the plurality of channels. in addition, arrays include a p-doped bridge extending between a first channel of the plurality of channels and a second channel of the plurality of channels, where the first channel is spaced apart from the second channel in a row extending in the second horizontal direction.
Inventor(s): Sony VARGHESE of Manchester MA (US) for applied materials, inc., Tong LIU of San Jose CA (US) for applied materials, inc., Zhijun CHEN of San Jose CA (US) for applied materials, inc., Balasubramanian PRANATHARTHIHARAN of Santa Clara CA (US) for applied materials, inc.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/485
Abstract: a semiconductor structure includes a first active region and a second active region on a substrate, a metal plug electrically connected to the first active region via a contact layer and an interface layer, a bit line electrically connected to the second active region via a bit line contact plug, and a bit line spacer encapsulating the bit line, wherein the first active region and the second active region are lightly n-type doped, the substrate is p-type doped, and the contact layer is epitaxially grown and n-type doped with a graded doping profile that increases from an interface with the first active region to an interface with the interface layer.
Inventor(s): Ji-young CHOUNG of Hwaseong-si (KR) for applied materials, inc., Chung-Chia CHEN of Hsinchu City (TW) for applied materials, inc., Yu Hsin LIN of Zhubei City (TW) for applied materials, inc., Jungmin LEE of Santa Clara CA (US) for applied materials, inc., Dieter HAAS of Santa Clara CA (US) for applied materials, inc., Si Kyoung KIM of Gwangju-si (KR) for applied materials, inc.
IPC Code(s): H10K59/122, H10K50/84, H10K71/16, H10K102/10
CPC Code(s): H10K59/122
Abstract: sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in an organic light-emitting diode (oled) display are described herein. the overhang structures are permanent to the sub-pixel circuit. the overhang structures include a conductive oxide. a first configuration of the overhang structures includes a base portion and a top portion with the top portion disposed on the base portion. in a first sub-configuration, the base portion includes the conductive oxide of at least one of a tco material or a tmo material. in a second sub-configuration, the base portion includes a metal alloy material and the conductive oxide of a metal oxide surface. a second configuration of the overhang structures includes the base portion and the top portion with a body portion disposed between the base portion and the top portion. the body portion includes the metal alloy body and the metal oxide surface.
Inventor(s): Jungmin LEE of Santa Clara CA (US) for applied materials, inc., Chung-chia CHEN of Hsinchu City (TW) for applied materials, inc., Ji Young CHOUNG of Hwaseong-si (KR) for applied materials, inc., Yu-Hsin LIN of Zhubei City (TW) for applied materials, inc.
IPC Code(s): H10K59/122, H10K59/12, H10K59/80
CPC Code(s): H10K59/122
Abstract: embodiments described herein relate to a sub-pixel. the sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (oled) material, and a cathode. the anode is defined by adjacent first pixel isolation structures (pis) and adjacent second pis. the overhang structures are disposed on the first pis. the overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. a bottom surface of the second structure extends laterally past an upper surface of the first structure. the first structure is disposed over the first pis. separation structures are disposed over the second pis. the oled material is disposed over the anode and an upper surface of the separation structures. the cathode disposed over the oled material and an upper surface of the separation structures.
Applied Materials, Inc. patent applications on October 10th, 2024
- Applied Materials, Inc.
- C23C16/455
- B01J4/00
- C23C16/44
- CPC C23C16/4558
- Applied materials, inc.
- C25D17/00
- B29C64/124
- CPC C25D17/004
- F16J15/10
- CPC F16J15/104
- F28D17/04
- F28D17/02
- H01J37/32
- H01L21/67
- CPC F28D17/04
- G01J5/00
- C23C16/458
- C23C16/46
- G01J5/08
- G01J5/0801
- CPC G01J5/0007
- G02B6/122
- G02B6/12
- CPC G02B6/1223
- H01J37/05
- H01J37/147
- H01J37/317
- CPC H01J37/05
- B33Y10/00
- B33Y80/00
- CPC H01J37/3244
- CPC H01J37/32449
- H01L21/02
- CPC H01L21/02123
- C23C8/16
- C23C8/36
- C23C8/80
- C23C16/02
- C23C16/40
- C23C16/52
- C23C16/56
- C23C28/04
- CPC H01L21/02332
- H01L21/265
- H01L21/324
- CPC H01L21/26513
- H01L21/683
- H01L21/687
- CPC H01L21/67103
- CPC H01L21/67115
- H01L21/68
- G01B11/24
- CPC H01L21/681
- H01L21/673
- CPC H01L21/6833
- CPC H01L21/68742
- H01L21/768
- C23C16/18
- CPC H01L21/76846
- H10B12/00
- CPC H10B12/315
- CPC H10B12/485
- H10K59/122
- H10K50/84
- H10K71/16
- H10K102/10
- CPC H10K59/122
- H10K59/12
- H10K59/80
