Apple inc. (20240162182). Asymmetric Stackup Structure for SoC Package Substrates simplified abstract
Contents
- 1 Asymmetric Stackup Structure for SoC Package Substrates
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 Asymmetric Stackup Structure for SoC Package Substrates - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
Asymmetric Stackup Structure for SoC Package Substrates
Organization Name
Inventor(s)
Yikang Deng of San Jose CA (US)
Taegui Kim of San Jose CA (US)
Yifan Kao of Taoyuan City (TW)
Jun Chung Hsu of Cupertino CA (US)
Asymmetric Stackup Structure for SoC Package Substrates - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240162182 titled 'Asymmetric Stackup Structure for SoC Package Substrates
Simplified Explanation
The abstract describes an asymmetric stackup structure for an SoC package substrate, which includes a substrate with insulating material layers, a recess for an integrated passive device, build-up layers, and via paths to connect contacts.
- The package substrate has an asymmetric stackup structure.
- It includes a substrate with insulating material layers.
- A recess is formed in the upper surface of the substrate for an integrated passive device.
- Build-up layers are formed on top of the substrate.
- Via paths are formed through the build-up layers and substrate to connect contacts.
Potential Applications
This technology could be applied in the development of advanced System on Chip (SoC) packages, high-performance electronic devices, and integrated circuits.
Problems Solved
This innovation solves the problem of efficiently connecting contacts on different surfaces of a substrate in a compact and reliable manner.
Benefits
The benefits of this technology include improved signal integrity, reduced signal loss, increased packaging density, and enhanced overall performance of electronic devices.
Potential Commercial Applications
The potential commercial applications of this technology include semiconductor manufacturing, telecommunications equipment, consumer electronics, and automotive electronics.
Possible Prior Art
One possible prior art for this technology could be the use of traditional symmetric stackup structures in package substrates for integrated circuits.
Unanswered Questions
1. How does this asymmetric stackup structure compare to traditional symmetric stackup structures in terms of performance and reliability? 2. Are there any specific design considerations or limitations when implementing this technology in different types of electronic devices?
Original Abstract Submitted
an asymmetric stackup structure for an soc package substrate is disclosed. the package substrate may include a substrate with one or more insulating material layers. a first recess may be formed in an upper surface of the substrate. the recess may be formed down to a conductive layer in the substrate. an integrated passive device may be positioned in the recess. a plurality of build-up layers may be formed on top of the substrate. at least one via path may be formed through the build-up layers and the substrate to connect contacts on the lower surface of the substrate to contacts on the upper surface of the build-up layers.
