18906428. CACHE STRUCTURE AND UTILIZATION (Intel Corporation)

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CACHE STRUCTURE AND UTILIZATION

Organization Name

Intel Corporation

Inventor(s)

Altug Koker of El Dorado Hills CA US

Lakshminarayanan Striramassarma of Folsom CA US

Aravindh Anantaraman of Folsom CA US

Valentin Andrei of San Jose CA US

Abhishek R. Appu of El Dorado Hills CA US

Sean Coleman of Folsom CA US

Varghese George of Folsom CA US

Pattabhiraman K of Bangalore KA IN

Mike Macpherson of Portland OR US

Subramaniam Maiyuran of Gold River CA US

ElMoustapha Ould-ahmed-vall of Chandler AZ US

Vasanth Ranganathan of El Dorado Hills CA US

Joydeep Ray of Folsom CA US

Jayakrishna P S of Bangalore KA IN

Prasoonkumar Surti of Folsom CA US

CACHE STRUCTURE AND UTILIZATION

This abstract first appeared for US patent application 18906428 titled 'CACHE STRUCTURE AND UTILIZATION

Original Abstract Submitted

Embodiments are generally directed to cache structure and utilization. An embodiment of an apparatus includes one or more processors including a graphics processor; a memory for storage of data for processing by the one or more processors; and a cache to cache data from the memory; wherein the apparatus is to provide for dynamic overfetching of cache lines for the cache, including receiving a read request and accessing the cache for the requested data, and upon a miss in the cache, overfetching data from memory or a higher level cache in addition to fetching the requested data, wherein the overfetching of data is based at least in part on a current overfetch boundary, and provides for data is to be prefetched extending to the current overfetch boundary.