18815124. Transistor and Methods of Forming Integrated Circuitry (Micron Technology, Inc.)
Contents
Transistor and Methods of Forming Integrated Circuitry
Organization Name
Inventor(s)
Hung-Wei Liu of Meridian ID (US)
Sameer Chhajed of Boise ID (US)
Jeffery B. Hull of Boise ID (US)
Anish A. Khandekar of Boise ID (US)
Transistor and Methods of Forming Integrated Circuitry
This abstract first appeared for US patent application 18815124 titled 'Transistor and Methods of Forming Integrated Circuitry
Original Abstract Submitted
A transistor comprises a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region. At least one of the top source/drain region, the bottom source/drain region, and the channel region are crystalline. All crystal grains within the at least one of the top source/drain region, the bottom source/drain region, and the channel region have average crystal sizes within 0.064 μmof one another. Other embodiments, including methods, are disclosed.
