18743605. DYNAMIC VARIABLE BIT WIDTH NEURAL PROCESSOR simplified abstract (Apple Inc.)

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DYNAMIC VARIABLE BIT WIDTH NEURAL PROCESSOR

Organization Name

Apple Inc.

Inventor(s)

Paolo Di Febbo of Sunnyvale CA (US)

Waleed Abdulla of Mountain View CA (US)

Chaminda N. Vidanagamachchi of San Jose CA (US)

Yohan Rajan of Cupertino CA (US)

DYNAMIC VARIABLE BIT WIDTH NEURAL PROCESSOR - A simplified explanation of the abstract

This abstract first appeared for US patent application 18743605 titled 'DYNAMIC VARIABLE BIT WIDTH NEURAL PROCESSOR

The abstract describes an electronic device with a neural processor containing multiple neural engine circuits operating in different modes of bit width. These circuits can work together to perform computations in various modes, generating output data based on input data and kernel coefficients.

  • The electronic device includes a neural processor with multiple neural engine circuits.
  • The neural engine circuits operate in different modes of bit width.
  • Each circuit has multiply circuits that can generate output data by multiplying input data with kernel coefficients.
  • The circuits can work together in a combined computation circuit to generate output data of different bit widths.
  • The device can switch between modes to perform computations efficiently based on the requirements.

Potential Applications: - Artificial intelligence - Machine learning - Signal processing - Robotics - Autonomous vehicles

Problems Solved: - Efficient computation in neural networks - Adaptability to different data types and processing requirements - Optimization of processing power and resources

Benefits: - Improved performance in neural network applications - Flexibility in handling different types of data - Energy efficiency in computation - Enhanced accuracy in processing tasks - Scalability for complex neural network models

Commercial Applications: Title: Advanced Neural Processor for AI Applications This technology can be used in various industries such as: - Healthcare for medical imaging analysis - Finance for fraud detection and risk assessment - Automotive for autonomous driving systems - Manufacturing for quality control and predictive maintenance - Retail for personalized recommendation systems

Questions about the technology: 1. How does the neural processor optimize computation efficiency in different modes? 2. What are the key advantages of using multiple neural engine circuits in the electronic device?


Original Abstract Submitted

Embodiments relate to an electronic device that includes a neural processor having multiple neural engine circuits that operate in multiple modes of different bit width. A neural engine circuit may include a first multiply circuit and a second multiply circuit. The first and second multiply circuits may be combined to work as a part of a combined computation circuit. In a first mode, the first multiply circuit generates first output data of a first bit width by multiplying first input data with a first kernel coefficient. The second multiply circuit generates second output data of the first bit width by multiplying second input data with a second kernel coefficient. In a second mode, the combined computation circuit generates third output data of a second bit width by multiplying third input data with a third kernel coefficient.