18675997. LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
Contents
- 1 LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Key Features and Innovation
- 1.6 Potential Applications
- 1.7 Problems Solved
- 1.8 Benefits
- 1.9 Commercial Applications
- 1.10 Questions about Memory Sub-System Low Power Mode
- 1.11 Original Abstract Submitted
LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE
Organization Name
Inventor(s)
Shuai Xu of Santa Clara CA (US)
Michele Piccardi of Cupertino CA (US)
Arvind Muralidharan of Folsom CA (US)
Qisong Lin of El Dorado Hills CA (US)
Scott A. Stoller of Boise ID (US)
LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18675997 titled 'LOW POWER MANAGEMENT FOR SLEEP MODE OPERATION OF A MEMORY DEVICE
Simplified Explanation
The patent application describes a method to reduce power consumption in a memory sub-system by putting a standby circuit associated with a memory device into a low power mode.
Key Features and Innovation
- Standby circuit enters low power mode to reduce power consumption.
- Reference voltage supplied to voltage regulator in low power mode.
- Voltage regulator supplies standby current level to memory device, lower than active mode.
Potential Applications
This technology can be applied in various electronic devices that use memory systems, such as smartphones, tablets, laptops, and IoT devices.
Problems Solved
This technology addresses the issue of high power consumption in memory sub-systems, leading to improved energy efficiency and longer battery life in electronic devices.
Benefits
- Reduced power consumption in memory sub-systems.
- Extended battery life in electronic devices.
- Improved energy efficiency.
Commercial Applications
- This technology can be utilized in the development of energy-efficient electronic devices, leading to cost savings for manufacturers and improved user experience for consumers.
Questions about Memory Sub-System Low Power Mode
How does the low power mode in the memory sub-system reduce power consumption?
The low power mode in the memory sub-system reduces power consumption by causing the standby circuit associated with the memory device to enter a state where it consumes less power compared to the active mode.
What are the potential benefits of implementing this low power mode in memory sub-systems?
Implementing this low power mode in memory sub-systems can lead to reduced energy consumption, extended battery life in electronic devices, and improved overall energy efficiency.
Original Abstract Submitted
In a memory sub-system, causing a standby circuit associated with a memory device to enter into a low power mode. In the low power mode, causing a reference voltage to be supplied to a voltage regulator, wherein the reference voltage causes the voltage regulator to supply a standby current level to the memory device, where the standby current level is lower than a current level supplied when the memory device is in an active mode.
