18674664. SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL MITIGATION (Micron Technology, Inc.)
Contents
SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL MITIGATION
Organization Name
Inventor(s)
Bharat Bhushan of Taichung (TW)
Amy R. Griffin of Boise ID (US)
Kunal R. Parekh of Boise ID (US)
Akshay N. Singh of Meridian ID (US)
SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL MITIGATION
This abstract first appeared for US patent application 18674664 titled 'SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL MITIGATION
Original Abstract Submitted
A semiconductor device is provided. The semiconductor device includes a logic die, a first plurality of stacked memory dies electrically coupled with the logic die at a first location above a back side surface of the logic die, a second plurality of stacked memory dies electrically coupled with the logic die at a second location above the back side surface of logic die, a first dielectric material disposed above the back side surface of the logic die and between the first plurality of stacked memory dies and the second plurality of stacked memory dies, and a dummy die disposed above the first dielectric material and coupled to the first plurality of stacked memory dies and the second plurality of stacked memory dies, wherein the dummy die is coupled to back side surfaces of the first plurality and second plurality of stacked memory dies through a second dielectric layer having dielectric-dielectric fusion bonding.
