18666063. PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY RELIABILITY simplified abstract (Micron Technology, Inc.)
Contents
PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY RELIABILITY
Organization Name
Inventor(s)
Yu-Chung Lien of San Jose CA (US)
Zhenming Zhou of San Jose CA (US)
PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY RELIABILITY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18666063 titled 'PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY RELIABILITY
Simplified Explanation: The patent application describes a system with a memory device and a processing device that can receive programming commands and determine the reliability of memory cells. The processing device then performs a two-pass programming operation on a subset of memory cells, including a delay based on the reliability metric.
- The system includes a memory device and a processing device.
- The processing device receives programming commands for memory cells.
- It determines the reliability of a subset of memory cells.
- A delay is calculated based on the reliability metric.
- A two-pass programming operation is performed on the subset of memory cells, including the calculated delay.
Key Features and Innovation: - Memory device and processing device interaction. - Reliability metric calculation for memory cells. - Two-pass programming operation with delay. - Enhanced programming efficiency and reliability.
Potential Applications: - Data storage systems. - Embedded systems. - IoT devices. - Consumer electronics. - Automotive applications.
Problems Solved: - Improving reliability of memory cells. - Enhancing programming efficiency. - Reducing errors in memory programming.
Benefits: - Increased data integrity. - Improved system performance. - Enhanced overall reliability. - Reduced programming errors.
Commercial Applications: Title: Enhanced Memory Programming System for Improved Reliability This technology can be utilized in various industries such as data storage, embedded systems, IoT devices, consumer electronics, and automotive applications to enhance memory programming efficiency and reliability, leading to improved system performance and data integrity.
Prior Art: Further research can be conducted in the field of memory programming systems, reliability metrics for memory cells, and two-pass programming operations to identify any existing technologies or patents related to the described innovation.
Frequently Updated Research: Stay updated on advancements in memory programming systems, reliability metrics for memory cells, and programming efficiency to ensure the latest developments are considered in implementing this technology.
Questions about Memory Programming Systems: 1. How does the two-pass programming operation improve memory cell reliability? 2. What are the potential challenges in implementing reliability metrics for memory cells?
Original Abstract Submitted
A system includes a memory device and a processing device operatively coupled to the memory device. The processing device is to receive a programming command with respect to a set of memory cells. The processing device is further to determine a value of a metric reflecting reliability of a subset of the set of memory cells. The processing device is further to determine a delay based on the value of the metric. The processing device is further to perform a two-pass programming operation with respect to the subset of memory cells. The two-pass programming operation includes the delay.
