18660190. SEMICONDUCTOR DIE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
SEMICONDUCTOR DIE
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Yen-Kun Lai of New Taipei City (TW)
Chien-Hao Hsu of Hsinchu County (TW)
Wei-Hsiang Tu of Hsinchu City (TW)
Kuo-Chin Chang of Chiayi City (TW)
Mirng-ji Lii of Hsinchu County (TW)
SEMICONDUCTOR DIE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18660190 titled 'SEMICONDUCTOR DIE
The semiconductor die described in the patent application consists of a semiconductor substrate, an interconnect structure, and a conductive bump. The interconnect structure is connected to the semiconductor substrate and is made up of stacked interconnect layers, each containing a dielectric layer and embedded interconnect wiring.
- The interconnect structure includes stacked interconnect layers with dielectric layers and interconnect wiring.
- The interconnect wiring in the first interconnect layer has a first via and second vias on the same level height.
- The conductive bump on the interconnect structure has a base portion and a protruding portion connected to it.
Potential Applications: - This technology can be used in the manufacturing of advanced semiconductor devices. - It can improve the performance and reliability of integrated circuits.
Problems Solved: - Enhances the electrical connectivity and signal transmission within semiconductor devices. - Provides a more efficient and compact design for semiconductor interconnect structures.
Benefits: - Improved electrical performance and signal integrity. - Enhanced reliability and durability of semiconductor devices.
Commercial Applications: Title: Advanced Semiconductor Interconnect Technology for Enhanced Performance This technology can be applied in the production of high-performance electronic devices such as smartphones, computers, and IoT devices. It can also benefit the aerospace and automotive industries by providing more reliable and efficient semiconductor components.
Questions about the technology: 1. How does this semiconductor interconnect technology compare to traditional methods in terms of performance and reliability? 2. What are the potential cost implications of implementing this advanced technology in semiconductor manufacturing processes?
Original Abstract Submitted
A semiconductor die includes a semiconductor substrate, an interconnect structure, and a conductive bump. The interconnect structure is disposed on and electrically connected to the semiconductor substrate. The interconnect structure includes stacked interconnect layers. Each of the stacked interconnect layers includes a dielectric layer and an interconnect wiring embedded in the dielectric layer. The interconnect wiring of a first interconnect layer among the stacked interconnect layers further includes a first via and second vias. The first via electrically connected to the interconnect wiring. The second vias connected to the interconnect wiring, and the first via and the second vias are located on a same level height. The conductive bump is disposed on the interconnect structure. The conductive bump includes a base portion and a protruding portion connected to the base portion, and the base portion is between the protruding portion and the first via.
