18646951. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18646951 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application includes a package substrate with a recessed portion on its top surface, a lower semiconductor chip placed in the recessed portion, and an upper semiconductor chip on top of the lower chip and substrate, with a width greater than that of the lower chip.
- The package features a plurality of first bumps directly connecting the package substrate and the upper semiconductor chip, as well as a plurality of second bumps directly connecting the lower semiconductor chip and the upper semiconductor chip.
- The pitch of the second bumps is less than that of the first bumps, indicating a specific arrangement for optimal performance.
Potential Applications: - This semiconductor package design could be used in various electronic devices such as smartphones, tablets, and computers. - It could also be applied in automotive electronics, industrial machinery, and other high-tech equipment.
Problems Solved: - This innovation addresses the need for efficient and reliable connections between semiconductor chips and package substrates. - It optimizes the space utilization within the package, allowing for more compact and powerful electronic devices.
Benefits: - Improved performance and reliability of electronic devices. - Enhanced thermal management due to the efficient design of the semiconductor package.
Commercial Applications: - The technology could be of interest to semiconductor manufacturers, electronics companies, and research institutions looking to enhance the performance of their products. - It could lead to the development of more advanced and compact electronic devices, catering to the growing demand for high-performance gadgets.
Questions about the Semiconductor Package Design: 1. How does the pitch of the second bumps affect the overall performance of the semiconductor package? 2. What are the specific advantages of having an upper semiconductor chip with a width greater than that of the lower chip?
Original Abstract Submitted
A semiconductor package comprising a package substrate that has a recessed portion on a top surface thereof, a lower semiconductor chip in the recessed portion of the package substrate, an upper semiconductor chip on the lower semiconductor chip and the package substrate and having a width greater than that of the lower semiconductor chip, a plurality of first bumps directly between the package substrate and the upper semiconductor chip, and a plurality of second bumps directly between the lower semiconductor chip and the upper semiconductor chip. A pitch of the second bumps is less than that of the first bumps.
