18626390. MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD simplified abstract (CANON KABUSHIKI KAISHA)
Contents
MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD
Organization Name
Inventor(s)
DAISUKE Shiraishi of Tokyo (JP)
MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18626390 titled 'MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD
Simplified Explanation: The memory control apparatus described in the patent application manages access to a DRAM with multiple banks by generating access commands, storing them in a buffer, generating bank-designated refresh requests, and issuing DRAM commands based on the stored access commands and refresh requests.
Key Features and Innovation:
- Generation of access commands in response to access requests for the DRAM
- Storage of access commands in a buffer
- Generation of bank-designated refresh requests for the DRAM
- Issuance of DRAM commands based on access commands and refresh requests
- Exclusion of specific banks based on attribute information added to access requests
Potential Applications: This technology can be applied in various systems requiring efficient memory control, such as servers, data centers, and high-performance computing devices.
Problems Solved:
- Efficient management of access to a DRAM with multiple banks
- Optimization of refresh requests for improved memory performance
Benefits:
- Enhanced memory access efficiency
- Improved overall system performance
- Reduction in memory access latency
Commercial Applications: The technology can be utilized in server systems, data centers, and high-performance computing devices to enhance memory management and optimize system performance, potentially leading to increased productivity and cost savings for businesses.
Prior Art: Readers interested in exploring prior art related to this technology can start by researching memory control systems for DRAMs, refresh request optimization, and attribute-based bank exclusion techniques in memory management.
Frequently Updated Research: Researchers in the field of memory control systems and DRAM optimization may provide updates on advancements in memory management techniques, refresh request algorithms, and attribute-based exclusion methods for memory access control.
Questions about Memory Control Apparatus: 1. What are the key components of the memory control apparatus described in the patent application? 2. How does the exclusion of specific banks based on attribute information contribute to the efficiency of memory access control?
Original Abstract Submitted
A memory control apparatus that controls access to a DRAM including a plurality of banks, the memory control apparatus comprising: a first generation unit configured to generate an access command in response to an access request for the DRAM, and store the generated access command in a buffer; a second generation unit configured to generate a bank-designated refresh request for the DRAM; and an issuing unit configured to issue a DRAM command to the DRAM based on the access command stored in the buffer and the refresh request generated by the second generation unit, wherein the second generation unit determines a bank to which the refresh request is to be given, from among banks remaining after a bank selected based on attribute information added to the access request has been excluded from the plurality of banks.
